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Commit bff8f8c2 authored by Simon Horman's avatar Simon Horman
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ARM: dts: r8a7793: add soc node 

Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.

The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node.  To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.

This patch should not introduce any functional change.
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 93a4a46f
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Showing with 1193 additions and 1132 deletions
arch/arm/boot/dts/r8a7793.dtsi
View file @ bff8f8c2
......@@ -15,7 +15,6 @@
/ {
compatible = "renesas,r8a7793";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
......@@ -74,31 +73,20 @@ L2_CA15: cache-controller-0 {
};
};
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
apmu@e6152000 {
compatible = "renesas,r8a7793-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&thermal>;
trips {
cpu-crit {
temperature = <95000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
};
};
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
......@@ -116,7 +104,8 @@ gic: interrupt-controller@f1001000 {
};
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6050000 0 0x50>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
......@@ -130,7 +119,8 @@ gpio0: gpio@e6050000 {
};
gpio1: gpio@e6051000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6051000 0 0x50>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
......@@ -144,7 +134,8 @@ gpio1: gpio@e6051000 {
};
gpio2: gpio@e6052000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6052000 0 0x50>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
......@@ -158,7 +149,8 @@ gpio2: gpio@e6052000 {
};
gpio3: gpio@e6053000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6053000 0 0x50>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
......@@ -172,7 +164,8 @@ gpio3: gpio@e6053000 {
};
gpio4: gpio@e6054000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6054000 0 0x50>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
......@@ -186,7 +179,8 @@ gpio4: gpio@e6054000 {
};
gpio5: gpio@e6055000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6055000 0 0x50>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
......@@ -200,7 +194,8 @@ gpio5: gpio@e6055000 {
};
gpio6: gpio@e6055400 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6055400 0 0x50>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
......@@ -214,7 +209,8 @@ gpio6: gpio@e6055400 {
};
gpio7: gpio@e6055800 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6055800 0 0x50>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
......@@ -239,16 +235,9 @@ thermal: thermal@e61f0000 {
#thermal-sensor-cells = <0>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
cmt0: timer@ffca0000 {
compatible = "renesas,r8a7793-cmt0", "renesas,rcar-gen2-cmt0";
compatible = "renesas,r8a7793-cmt0",
"renesas,rcar-gen2-cmt0";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
......@@ -261,7 +250,8 @@ cmt0: timer@ffca0000 {
};
cmt1: timer@e6130000 {
compatible = "renesas,r8a7793-cmt1", "renesas,rcar-gen2-cmt1";
compatible = "renesas,r8a7793-cmt1",
"renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
......@@ -300,7 +290,8 @@ irqc0: interrupt-controller@e61c0000 {
};
dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
compatible = "renesas,dmac-r8a7793",
"renesas,rcar-dmac";
reg = <0 0xe6700000 0 0x20000>;
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
......@@ -332,7 +323,8 @@ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
};
dmac1: dma-controller@e6720000 {
compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
compatible = "renesas,dmac-r8a7793",
"renesas,rcar-dmac";
reg = <0 0xe6720000 0 0x20000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
......@@ -364,7 +356,8 @@ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
};
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
compatible = "renesas,dmac-r8a7793",
"renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
......@@ -394,7 +387,8 @@ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
};
audma1: dma-controller@ec720000 {
compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
compatible = "renesas,dmac-r8a7793",
"renesas,rcar-dmac";
reg = <0 0xec720000 0 0x10000>;
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
......@@ -423,11 +417,14 @@ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
dma-channels = <13>;
};
/* The memory map in the User's Manual maps the cores to bus numbers */
/* The memory map in the User's Manual maps the cores to
* bus numbers
*/
i2c0: i2c@e6508000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
compatible = "renesas,i2c-r8a7793",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
......@@ -440,7 +437,8 @@ i2c0: i2c@e6508000 {
i2c1: i2c@e6518000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
compatible = "renesas,i2c-r8a7793",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
......@@ -453,7 +451,8 @@ i2c1: i2c@e6518000 {
i2c2: i2c@e6530000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
compatible = "renesas,i2c-r8a7793",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
......@@ -466,7 +465,8 @@ i2c2: i2c@e6530000 {
i2c3: i2c@e6540000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
compatible = "renesas,i2c-r8a7793",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
......@@ -479,7 +479,8 @@ i2c3: i2c@e6540000 {
i2c4: i2c@e6520000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
compatible = "renesas,i2c-r8a7793",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
......@@ -493,7 +494,8 @@ i2c5: i2c@e6528000 {
/* doesn't need pinmux */
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
compatible = "renesas,i2c-r8a7793",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 925>;
......@@ -507,7 +509,8 @@ i2c6: i2c@e60b0000 {
/* doesn't need pinmux */
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
compatible = "renesas,iic-r8a7793",
"renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
......@@ -523,7 +526,8 @@ i2c6: i2c@e60b0000 {
i2c7: i2c@e6500000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
compatible = "renesas,iic-r8a7793",
"renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
......@@ -539,7 +543,8 @@ i2c7: i2c@e6500000 {
i2c8: i2c@e6510000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
compatible = "renesas,iic-r8a7793",
"renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
......@@ -603,7 +608,8 @@ sdhi2: sd@ee160000 {
};
mmcif0: mmc@ee200000 {
compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
compatible = "renesas,mmcif-r8a7793",
"renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 315>;
......@@ -753,8 +759,8 @@ scifb2: serial@e6ce0000 {
};
scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
"renesas,scif";
compatible = "renesas,scif-r8a7793",
"renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
......@@ -769,8 +775,8 @@ scif0: serial@e6e60000 {
};
scif1: serial@e6e68000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
"renesas,scif";
compatible = "renesas,scif-r8a7793",
"renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
......@@ -785,8 +791,8 @@ scif1: serial@e6e68000 {
};
scif2: serial@e6e58000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
"renesas,scif";
compatible = "renesas,scif-r8a7793",
"renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e58000 0 64>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
......@@ -801,8 +807,8 @@ scif2: serial@e6e58000 {
};
scif3: serial@e6ea8000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
"renesas,scif";
compatible = "renesas,scif-r8a7793",
"renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ea8000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
......@@ -817,8 +823,8 @@ scif3: serial@e6ea8000 {
};
scif4: serial@e6ee0000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
"renesas,scif";
compatible = "renesas,scif-r8a7793",
"renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ee0000 0 64>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
......@@ -833,8 +839,8 @@ scif4: serial@e6ee0000 {
};
scif5: serial@e6ee8000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
"renesas,scif";
compatible = "renesas,scif-r8a7793",
"renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ee8000 0 64>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
......@@ -929,7 +935,8 @@ ether: ethernet@ee700000 {
};
vin0: video@e6ef0000 {
compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
compatible = "renesas,vin-r8a7793",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef0000 0 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
......@@ -939,7 +946,8 @@ vin0: video@e6ef0000 {
};
vin1: video@e6ef1000 {
compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
compatible = "renesas,vin-r8a7793",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef1000 0 0x1000>;
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
......@@ -949,7 +957,8 @@ vin1: video@e6ef1000 {
};
vin2: video@e6ef2000 {
compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
compatible = "renesas,vin-r8a7793",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef2000 0 0x1000>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>;
......@@ -1005,7 +1014,8 @@ du_out_lvds0: endpoint {
};
can0: can@e6e80000 {
compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
compatible = "renesas,can-r8a7793",
"renesas,rcar-gen2-can";
reg = <0 0xe6e80000 0 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
......@@ -1017,7 +1027,8 @@ can0: can@e6e80000 {
};
can1: can@e6e88000 {
compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
compatible = "renesas,can-r8a7793",
"renesas,rcar-gen2-can";
reg = <0 0xe6e88000 0 0x1000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
......@@ -1028,69 +1039,6 @@ can1: can@e6e88000 {
status = "disabled";
};
/* External root clock */
extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
/*
* The external audio clocks are configured as 0 Hz fixed frequency
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
/* External CAN clock */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
/* Special CPG clocks */
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a7793-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
clocks = <&extal_clk>, <&usb_extal_clk>;
clock-names = "extal", "usb_extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
};
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7793-rst";
reg = <0 0xe6160000 0 0x0100>;
......@@ -1108,7 +1056,8 @@ sysc: system-controller@e6180000 {
};
ipmmu_sy0: mmu@e6280000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
compatible = "renesas,ipmmu-r8a7793",
"renesas,ipmmu-vmsa";
reg = <0 0xe6280000 0 0x1000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
......@@ -1117,7 +1066,8 @@ ipmmu_sy0: mmu@e6280000 {
};
ipmmu_sy1: mmu@e6290000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
compatible = "renesas,ipmmu-r8a7793",
"renesas,ipmmu-vmsa";
reg = <0 0xe6290000 0 0x1000>;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
......@@ -1125,7 +1075,8 @@ ipmmu_sy1: mmu@e6290000 {
};
ipmmu_ds: mmu@e6740000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
compatible = "renesas,ipmmu-r8a7793",
"renesas,ipmmu-vmsa";
reg = <0 0xe6740000 0 0x1000>;
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
......@@ -1134,7 +1085,8 @@ ipmmu_ds: mmu@e6740000 {
};
ipmmu_mp: mmu@ec680000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
compatible = "renesas,ipmmu-r8a7793",
"renesas,ipmmu-vmsa";
reg = <0 0xec680000 0 0x1000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
......@@ -1142,7 +1094,8 @@ ipmmu_mp: mmu@ec680000 {
};
ipmmu_mx: mmu@fe951000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
compatible = "renesas,ipmmu-r8a7793",
"renesas,ipmmu-vmsa";
reg = <0 0xfe951000 0 0x1000>;
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
......@@ -1151,7 +1104,8 @@ ipmmu_mx: mmu@fe951000 {
};
ipmmu_rt: mmu@ffc80000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
compatible = "renesas,ipmmu-r8a7793",
"renesas,ipmmu-vmsa";
reg = <0 0xffc80000 0 0x1000>;
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
......@@ -1159,7 +1113,8 @@ ipmmu_rt: mmu@ffc80000 {
};
ipmmu_gp: mmu@e62a0000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
compatible = "renesas,ipmmu-r8a7793",
"renesas,ipmmu-vmsa";
reg = <0 0xe62a0000 0 0x1000>;
interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
......@@ -1198,20 +1153,25 @@ rcar_sound: sound@ec500000 {
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7793_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
"src.9", "src.8", "src.7", "src.6", "src.5",
"src.4", "src.3", "src.2", "src.1", "src.0",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0",
"src.9", "src.8", "src.7", "src.6",
"src.5", "src.4", "src.3", "src.2",
"src.1", "src.0",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
<&cpg 1006>, <&cpg 1007>,
<&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>,
<&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0";
status = "disabled";
......@@ -1282,54 +1242,155 @@ src9: src-9 {
rcar_sound,ssi {
ssi0: ssi-0 {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
dmas = <&audma0 0x01>, <&audma1 0x02>,
<&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
dmas = <&audma0 0x03>, <&audma1 0x04>,
<&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
dmas = <&audma0 0x05>, <&audma1 0x06>,
<&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
dmas = <&audma0 0x07>, <&audma1 0x08>,
<&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
dmas = <&audma0 0x09>, <&audma1 0x0a>,
<&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>,
<&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>,
<&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
dmas = <&audma0 0x0f>, <&audma1 0x10>,
<&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
dmas = <&audma0 0x11>, <&audma1 0x12>,
<&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
dmas = <&audma0 0x13>, <&audma1 0x14>,
<&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
};
};
};
/* Special CPG clocks */
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a7793-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
clocks = <&extal_clk>, <&usb_extal_clk>;
clock-names = "extal", "usb_extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&thermal>;
trips {
cpu-crit {
temperature = <95000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
};
};
};
timer {
compatible = "arm,armv7-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External root clock */
extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
/*
* The external audio clocks are configured as 0 Hz fixed frequency
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
/* External CAN clock */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
};
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