Commit c049ecc5 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'timers-core-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull clockevent/clocksource updates from Thomas Gleixner:

 - Device tree bindings for MT8186

 - Tell the kernel that the RISC-V SBI timer stops in deeper power
   states

 - Make device tree parsing in sp804 more robust

 - Dead code removal and tiny fixes here and there

 - Add the missing SPDX identifiers

* tag 'timers-core-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource/drivers/oxnas-rps: Fix irq_of_parse_and_map() return value
  clocksource/drivers/timer-ti-dm: Remove unnecessary NULL check
  clocksource/drivers/timer-sun5i: Convert to SPDX identifier
  clocksource/drivers/timer-sun4i: Convert to SPDX identifier
  clocksource/drivers/pistachio: Convert to SPDX identifier
  clocksource/drivers/orion: Convert to SPDX identifier
  clocksource/drivers/lpc32xx: Convert to SPDX identifier
  clocksource/drivers/digicolor: Convert to SPDX identifier
  clocksource/drivers/armada-370-xp: Convert to SPDX identifier
  clocksource/drivers/mips-gic-timer: Convert to SPDX identifier
  clocksource/drivers/jcore: Convert to SPDX identifier
  clocksource/drivers/bcm_kona: Convert to SPDX identifier
  clocksource/drivers/sp804: Avoid error on multiple instances
  clocksource/drivers/riscv: Events are stopped during CPU suspend
  clocksource/drivers/ixp4xx: Drop boardfile probe path
  dt-bindings: timer: Add compatible for Mediatek MT8186
parents bc1e02c3 57963a92
...@@ -23,6 +23,7 @@ Required properties: ...@@ -23,6 +23,7 @@ Required properties:
For those SoCs that use SYST For those SoCs that use SYST
* "mediatek,mt8183-timer" for MT8183 compatible timers (SYST) * "mediatek,mt8183-timer" for MT8183 compatible timers (SYST)
* "mediatek,mt8186-timer" for MT8186 compatible timers (SYST)
* "mediatek,mt8192-timer" for MT8192 compatible timers (SYST) * "mediatek,mt8192-timer" for MT8192 compatible timers (SYST)
* "mediatek,mt8195-timer" for MT8195 compatible timers (SYST) * "mediatek,mt8195-timer" for MT8195 compatible timers (SYST)
* "mediatek,mt7629-timer" for MT7629 compatible timers (SYST) * "mediatek,mt7629-timer" for MT7629 compatible timers (SYST)
......
...@@ -80,7 +80,7 @@ config IXP4XX_TIMER ...@@ -80,7 +80,7 @@ config IXP4XX_TIMER
bool "Intel XScale IXP4xx timer driver" if COMPILE_TEST bool "Intel XScale IXP4xx timer driver" if COMPILE_TEST
depends on HAS_IOMEM depends on HAS_IOMEM
select CLKSRC_MMIO select CLKSRC_MMIO
select TIMER_OF if OF select TIMER_OF
help help
Enables support for the Intel XScale IXP4xx SoC timer. Enables support for the Intel XScale IXP4xx SoC timer.
......
/* // SPDX-License-Identifier: GPL-2.0
* Copyright (C) 2012 Broadcom Corporation // Copyright (C) 2012 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/init.h> #include <linux/init.h>
#include <linux/irq.h> #include <linux/irq.h>
......
// SPDX-License-Identifier: GPL-2.0
/* /*
* J-Core SoC PIT/clocksource driver * J-Core SoC PIT/clocksource driver
* *
* Copyright (C) 2015-2016 Smart Energy Instruments, Inc. * Copyright (C) 2015-2016 Smart Energy Instruments, Inc.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/ */
#include <linux/kernel.h> #include <linux/kernel.h>
......
/* // SPDX-License-Identifier: GPL-2.0
* This file is subject to the terms and conditions of the GNU General Public // Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
*/
#define pr_fmt(fmt) "mips-gic-timer: " fmt #define pr_fmt(fmt) "mips-gic-timer: " fmt
......
// SPDX-License-Identifier: GPL-2.0
/* /*
* Marvell Armada 370/XP SoC timer handling. * Marvell Armada 370/XP SoC timer handling.
* *
...@@ -7,10 +8,6 @@ ...@@ -7,10 +8,6 @@
* Gregory CLEMENT <gregory.clement@free-electrons.com> * Gregory CLEMENT <gregory.clement@free-electrons.com>
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com> * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* *
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
* Timer 0 is used as free-running clocksource, while timer 1 is * Timer 0 is used as free-running clocksource, while timer 1 is
* used as clock_event_device. * used as clock_event_device.
* *
......
// SPDX-License-Identifier: GPL-2.0
/* /*
* Conexant Digicolor timer driver * Conexant Digicolor timer driver
* *
...@@ -11,10 +12,6 @@ ...@@ -11,10 +12,6 @@
* Copyright (C) 2013 Maxime Ripard * Copyright (C) 2013 Maxime Ripard
* *
* Maxime Ripard <maxime.ripard@free-electrons.com> * Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/ */
/* /*
......
...@@ -19,8 +19,6 @@ ...@@ -19,8 +19,6 @@
#include <linux/of_address.h> #include <linux/of_address.h>
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
/* Goes away with OF conversion */
#include <linux/platform_data/timer-ixp4xx.h>
/* /*
* Constants to make it easy to access Timer Control/Status registers * Constants to make it easy to access Timer Control/Status registers
...@@ -263,28 +261,6 @@ static struct platform_driver ixp4xx_timer_driver = { ...@@ -263,28 +261,6 @@ static struct platform_driver ixp4xx_timer_driver = {
}; };
builtin_platform_driver(ixp4xx_timer_driver); builtin_platform_driver(ixp4xx_timer_driver);
/**
* ixp4xx_timer_setup() - Timer setup function to be called from boardfiles
* @timerbase: physical base of timer block
* @timer_irq: Linux IRQ number for the timer
* @timer_freq: Fixed frequency of the timer
*/
void __init ixp4xx_timer_setup(resource_size_t timerbase,
int timer_irq,
unsigned int timer_freq)
{
void __iomem *base;
base = ioremap(timerbase, 0x100);
if (!base) {
pr_crit("IXP4xx: can't remap timer\n");
return;
}
ixp4xx_timer_register(base, timer_irq, timer_freq);
}
EXPORT_SYMBOL_GPL(ixp4xx_timer_setup);
#ifdef CONFIG_OF
static __init int ixp4xx_of_timer_init(struct device_node *np) static __init int ixp4xx_of_timer_init(struct device_node *np)
{ {
void __iomem *base; void __iomem *base;
...@@ -315,4 +291,3 @@ static __init int ixp4xx_of_timer_init(struct device_node *np) ...@@ -315,4 +291,3 @@ static __init int ixp4xx_of_timer_init(struct device_node *np)
return ret; return ret;
} }
TIMER_OF_DECLARE(ixp4xx, "intel,ixp4xx-timer", ixp4xx_of_timer_init); TIMER_OF_DECLARE(ixp4xx, "intel,ixp4xx-timer", ixp4xx_of_timer_init);
#endif
// SPDX-License-Identifier: GPL-2.0
/* /*
* Clocksource driver for NXP LPC32xx/18xx/43xx timer * Clocksource driver for NXP LPC32xx/18xx/43xx timer
* *
...@@ -6,11 +7,6 @@ ...@@ -6,11 +7,6 @@
* Based on: * Based on:
* time-efm32 Copyright (C) 2013 Pengutronix * time-efm32 Copyright (C) 2013 Pengutronix
* mach-lpc32xx/timer.c Copyright (C) 2009 - 2010 NXP Semiconductors * mach-lpc32xx/timer.c Copyright (C) 2009 - 2010 NXP Semiconductors
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
*/ */
#define pr_fmt(fmt) "%s: " fmt, __func__ #define pr_fmt(fmt) "%s: " fmt, __func__
......
// SPDX-License-Identifier: GPL-2.0
/* /*
* Marvell Orion SoC timer handling. * Marvell Orion SoC timer handling.
* *
* Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* *
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
* Timer 0 is used as free-running clocksource, while timer 1 is * Timer 0 is used as free-running clocksource, while timer 1 is
* used as clock_event_device. * used as clock_event_device.
*/ */
......
...@@ -236,7 +236,7 @@ static int __init oxnas_rps_timer_init(struct device_node *np) ...@@ -236,7 +236,7 @@ static int __init oxnas_rps_timer_init(struct device_node *np)
} }
rps->irq = irq_of_parse_and_map(np, 0); rps->irq = irq_of_parse_and_map(np, 0);
if (rps->irq < 0) { if (!rps->irq) {
ret = -EINVAL; ret = -EINVAL;
goto err_iomap; goto err_iomap;
} }
......
// SPDX-License-Identifier: GPL-2.0
/* /*
* Pistachio clocksource based on general-purpose timers * Pistachio clocksource based on general-purpose timers
* *
* Copyright (C) 2015 Imagination Technologies * Copyright (C) 2015 Imagination Technologies
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/ */
#define pr_fmt(fmt) "%s: " fmt, __func__ #define pr_fmt(fmt) "%s: " fmt, __func__
......
...@@ -34,7 +34,7 @@ static int riscv_clock_next_event(unsigned long delta, ...@@ -34,7 +34,7 @@ static int riscv_clock_next_event(unsigned long delta,
static unsigned int riscv_clock_event_irq; static unsigned int riscv_clock_event_irq;
static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = { static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
.name = "riscv_timer_clockevent", .name = "riscv_timer_clockevent",
.features = CLOCK_EVT_FEAT_ONESHOT, .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP,
.rating = 100, .rating = 100,
.set_next_event = riscv_clock_next_event, .set_next_event = riscv_clock_next_event,
}; };
......
...@@ -259,6 +259,11 @@ static int __init sp804_of_init(struct device_node *np, struct sp804_timer *time ...@@ -259,6 +259,11 @@ static int __init sp804_of_init(struct device_node *np, struct sp804_timer *time
struct clk *clk1, *clk2; struct clk *clk1, *clk2;
const char *name = of_get_property(np, "compatible", NULL); const char *name = of_get_property(np, "compatible", NULL);
if (initialized) {
pr_debug("%pOF: skipping further SP804 timer device\n", np);
return 0;
}
base = of_iomap(np, 0); base = of_iomap(np, 0);
if (!base) if (!base)
return -ENXIO; return -ENXIO;
...@@ -270,11 +275,6 @@ static int __init sp804_of_init(struct device_node *np, struct sp804_timer *time ...@@ -270,11 +275,6 @@ static int __init sp804_of_init(struct device_node *np, struct sp804_timer *time
writel(0, timer1_base + timer->ctrl); writel(0, timer1_base + timer->ctrl);
writel(0, timer2_base + timer->ctrl); writel(0, timer2_base + timer->ctrl);
if (initialized || !of_device_is_available(np)) {
ret = -EINVAL;
goto err;
}
clk1 = of_clk_get(np, 0); clk1 = of_clk_get(np, 0);
if (IS_ERR(clk1)) if (IS_ERR(clk1))
clk1 = NULL; clk1 = NULL;
......
// SPDX-License-Identifier: GPL-2.0
/* /*
* Allwinner A1X SoCs timer handling. * Allwinner A1X SoCs timer handling.
* *
...@@ -8,10 +9,6 @@ ...@@ -8,10 +9,6 @@
* Based on code from * Based on code from
* Allwinner Technology Co., Ltd. <www.allwinnertech.com> * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
* Benn Huang <benn@allwinnertech.com> * Benn Huang <benn@allwinnertech.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/ */
#include <linux/clk.h> #include <linux/clk.h>
......
// SPDX-License-Identifier: GPL-2.0
/* /*
* Allwinner SoCs hstimer driver. * Allwinner SoCs hstimer driver.
* *
* Copyright (C) 2013 Maxime Ripard * Copyright (C) 2013 Maxime Ripard
* *
* Maxime Ripard <maxime.ripard@free-electrons.com> * Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/ */
#include <linux/clk.h> #include <linux/clk.h>
......
...@@ -828,7 +828,6 @@ static int omap_dm_timer_probe(struct platform_device *pdev) ...@@ -828,7 +828,6 @@ static int omap_dm_timer_probe(struct platform_device *pdev)
cpu_pm_register_notifier(&timer->nb); cpu_pm_register_notifier(&timer->nb);
} }
if (pdata)
timer->errata = pdata->timer_errata; timer->errata = pdata->timer_errata;
timer->pdev = pdev; timer->pdev = pdev;
......
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __TIMER_IXP4XX_H
#define __TIMER_IXP4XX_H
#include <linux/ioport.h>
void __init ixp4xx_timer_setup(resource_size_t timerbase,
int timer_irq,
unsigned int timer_freq);
#endif
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