Commit c114574e authored by Russell King's avatar Russell King Committed by David S. Miller

net: phy: add PHY_INTERFACE_MODE_10GBASER

Recent discussion has revealed that the use of PHY_INTERFACE_MODE_10GKR
is incorrect. Add a 10GBASE-R definition, document both the -R and -KR
versions, and the fact that 10GKR was used incorrectly.
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent aea6a1eb
...@@ -267,6 +267,24 @@ Some of the interface modes are described below: ...@@ -267,6 +267,24 @@ Some of the interface modes are described below:
duplex, pause or other settings. This is dependent on the MAC and/or duplex, pause or other settings. This is dependent on the MAC and/or
PHY behaviour. PHY behaviour.
``PHY_INTERFACE_MODE_10GBASER``
This is the IEEE 802.3 Clause 49 defined 10GBASE-R protocol used with
various different mediums. Please refer to the IEEE standard for a
definition of this.
Note: 10GBASE-R is just one protocol that can be used with XFI and SFI.
XFI and SFI permit multiple protocols over a single SERDES lane, and
also defines the electrical characteristics of the signals with a host
compliance board plugged into the host XFP/SFP connector. Therefore,
XFI and SFI are not PHY interface types in their own right.
``PHY_INTERFACE_MODE_10GKR``
This is the IEEE 802.3 Clause 49 defined 10GBASE-R with Clause 73
autonegotiation. Please refer to the IEEE standard for further
information.
Note: due to legacy usage, some 10GBASE-R usage incorrectly makes
use of this definition.
Pause frames / flow control Pause frames / flow control
=========================== ===========================
......
...@@ -100,9 +100,11 @@ typedef enum { ...@@ -100,9 +100,11 @@ typedef enum {
PHY_INTERFACE_MODE_2500BASEX, PHY_INTERFACE_MODE_2500BASEX,
PHY_INTERFACE_MODE_RXAUI, PHY_INTERFACE_MODE_RXAUI,
PHY_INTERFACE_MODE_XAUI, PHY_INTERFACE_MODE_XAUI,
/* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
PHY_INTERFACE_MODE_10GKR, PHY_INTERFACE_MODE_10GBASER,
PHY_INTERFACE_MODE_USXGMII, PHY_INTERFACE_MODE_USXGMII,
/* 10GBASE-KR - with Clause 73 AN */
PHY_INTERFACE_MODE_10GKR,
PHY_INTERFACE_MODE_MAX, PHY_INTERFACE_MODE_MAX,
} phy_interface_t; } phy_interface_t;
...@@ -176,10 +178,12 @@ static inline const char *phy_modes(phy_interface_t interface) ...@@ -176,10 +178,12 @@ static inline const char *phy_modes(phy_interface_t interface)
return "rxaui"; return "rxaui";
case PHY_INTERFACE_MODE_XAUI: case PHY_INTERFACE_MODE_XAUI:
return "xaui"; return "xaui";
case PHY_INTERFACE_MODE_10GKR: case PHY_INTERFACE_MODE_10GBASER:
return "10gbase-kr"; return "10gbase-r";
case PHY_INTERFACE_MODE_USXGMII: case PHY_INTERFACE_MODE_USXGMII:
return "usxgmii"; return "usxgmii";
case PHY_INTERFACE_MODE_10GKR:
return "10gbase-kr";
default: default:
return "unknown"; return "unknown";
} }
......
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