Commit c11d5dbb authored by Christian Marangi's avatar Christian Marangi Committed by David S. Miller

net: phy: aquantia: move priv and hw stat to header

In preparation for LEDs support, move priv and hw stat to header to
reference priv struct also in other .c outside aquantia.main
Signed-off-by: default avatarChristian Marangi <ansuelsmth@gmail.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a23b0034
...@@ -87,6 +87,18 @@ ...@@ -87,6 +87,18 @@
#define VEND1_GLOBAL_RSVD_STAT9_MODE GENMASK(7, 0) #define VEND1_GLOBAL_RSVD_STAT9_MODE GENMASK(7, 0)
#define VEND1_GLOBAL_RSVD_STAT9_1000BT2 0x23 #define VEND1_GLOBAL_RSVD_STAT9_1000BT2 0x23
/* MDIO_MMD_C22EXT */
#define MDIO_C22EXT_STAT_SGMII_RX_GOOD_FRAMES 0xd292
#define MDIO_C22EXT_STAT_SGMII_RX_BAD_FRAMES 0xd294
#define MDIO_C22EXT_STAT_SGMII_RX_FALSE_CARRIER 0xd297
#define MDIO_C22EXT_STAT_SGMII_TX_GOOD_FRAMES 0xd313
#define MDIO_C22EXT_STAT_SGMII_TX_BAD_FRAMES 0xd315
#define MDIO_C22EXT_STAT_SGMII_TX_FALSE_CARRIER 0xd317
#define MDIO_C22EXT_STAT_SGMII_TX_COLLISIONS 0xd318
#define MDIO_C22EXT_STAT_SGMII_TX_LINE_COLLISIONS 0xd319
#define MDIO_C22EXT_STAT_SGMII_TX_FRAME_ALIGN_ERR 0xd31a
#define MDIO_C22EXT_STAT_SGMII_TX_RUNT_FRAMES 0xd31b
#define VEND1_GLOBAL_INT_STD_STATUS 0xfc00 #define VEND1_GLOBAL_INT_STD_STATUS 0xfc00
#define VEND1_GLOBAL_INT_VEND_STATUS 0xfc01 #define VEND1_GLOBAL_INT_VEND_STATUS 0xfc01
...@@ -113,6 +125,32 @@ ...@@ -113,6 +125,32 @@
#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2 BIT(1) #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2 BIT(1)
#define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 BIT(0) #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3 BIT(0)
struct aqr107_hw_stat {
const char *name;
int reg;
int size;
};
#define SGMII_STAT(n, r, s) { n, MDIO_C22EXT_STAT_SGMII_ ## r, s }
static const struct aqr107_hw_stat aqr107_hw_stats[] = {
SGMII_STAT("sgmii_rx_good_frames", RX_GOOD_FRAMES, 26),
SGMII_STAT("sgmii_rx_bad_frames", RX_BAD_FRAMES, 26),
SGMII_STAT("sgmii_rx_false_carrier_events", RX_FALSE_CARRIER, 8),
SGMII_STAT("sgmii_tx_good_frames", TX_GOOD_FRAMES, 26),
SGMII_STAT("sgmii_tx_bad_frames", TX_BAD_FRAMES, 26),
SGMII_STAT("sgmii_tx_false_carrier_events", TX_FALSE_CARRIER, 8),
SGMII_STAT("sgmii_tx_collisions", TX_COLLISIONS, 8),
SGMII_STAT("sgmii_tx_line_collisions", TX_LINE_COLLISIONS, 8),
SGMII_STAT("sgmii_tx_frame_alignment_err", TX_FRAME_ALIGN_ERR, 16),
SGMII_STAT("sgmii_tx_runt_frames", TX_RUNT_FRAMES, 22),
};
#define AQR107_SGMII_STAT_SZ ARRAY_SIZE(aqr107_hw_stats)
struct aqr107_priv {
u64 sgmii_stats[AQR107_SGMII_STAT_SZ];
};
#if IS_REACHABLE(CONFIG_HWMON) #if IS_REACHABLE(CONFIG_HWMON)
int aqr_hwmon_probe(struct phy_device *phydev); int aqr_hwmon_probe(struct phy_device *phydev);
#else #else
......
...@@ -84,49 +84,12 @@ ...@@ -84,49 +84,12 @@
#define MDIO_AN_RX_VEND_STAT3 0xe832 #define MDIO_AN_RX_VEND_STAT3 0xe832
#define MDIO_AN_RX_VEND_STAT3_AFR BIT(0) #define MDIO_AN_RX_VEND_STAT3_AFR BIT(0)
/* MDIO_MMD_C22EXT */
#define MDIO_C22EXT_STAT_SGMII_RX_GOOD_FRAMES 0xd292
#define MDIO_C22EXT_STAT_SGMII_RX_BAD_FRAMES 0xd294
#define MDIO_C22EXT_STAT_SGMII_RX_FALSE_CARRIER 0xd297
#define MDIO_C22EXT_STAT_SGMII_TX_GOOD_FRAMES 0xd313
#define MDIO_C22EXT_STAT_SGMII_TX_BAD_FRAMES 0xd315
#define MDIO_C22EXT_STAT_SGMII_TX_FALSE_CARRIER 0xd317
#define MDIO_C22EXT_STAT_SGMII_TX_COLLISIONS 0xd318
#define MDIO_C22EXT_STAT_SGMII_TX_LINE_COLLISIONS 0xd319
#define MDIO_C22EXT_STAT_SGMII_TX_FRAME_ALIGN_ERR 0xd31a
#define MDIO_C22EXT_STAT_SGMII_TX_RUNT_FRAMES 0xd31b
/* Sleep and timeout for checking if the Processor-Intensive /* Sleep and timeout for checking if the Processor-Intensive
* MDIO operation is finished * MDIO operation is finished
*/ */
#define AQR107_OP_IN_PROG_SLEEP 1000 #define AQR107_OP_IN_PROG_SLEEP 1000
#define AQR107_OP_IN_PROG_TIMEOUT 100000 #define AQR107_OP_IN_PROG_TIMEOUT 100000
struct aqr107_hw_stat {
const char *name;
int reg;
int size;
};
#define SGMII_STAT(n, r, s) { n, MDIO_C22EXT_STAT_SGMII_ ## r, s }
static const struct aqr107_hw_stat aqr107_hw_stats[] = {
SGMII_STAT("sgmii_rx_good_frames", RX_GOOD_FRAMES, 26),
SGMII_STAT("sgmii_rx_bad_frames", RX_BAD_FRAMES, 26),
SGMII_STAT("sgmii_rx_false_carrier_events", RX_FALSE_CARRIER, 8),
SGMII_STAT("sgmii_tx_good_frames", TX_GOOD_FRAMES, 26),
SGMII_STAT("sgmii_tx_bad_frames", TX_BAD_FRAMES, 26),
SGMII_STAT("sgmii_tx_false_carrier_events", TX_FALSE_CARRIER, 8),
SGMII_STAT("sgmii_tx_collisions", TX_COLLISIONS, 8),
SGMII_STAT("sgmii_tx_line_collisions", TX_LINE_COLLISIONS, 8),
SGMII_STAT("sgmii_tx_frame_alignment_err", TX_FRAME_ALIGN_ERR, 16),
SGMII_STAT("sgmii_tx_runt_frames", TX_RUNT_FRAMES, 22),
};
#define AQR107_SGMII_STAT_SZ ARRAY_SIZE(aqr107_hw_stats)
struct aqr107_priv {
u64 sgmii_stats[AQR107_SGMII_STAT_SZ];
};
static int aqr107_get_sset_count(struct phy_device *phydev) static int aqr107_get_sset_count(struct phy_device *phydev)
{ {
return AQR107_SGMII_STAT_SZ; return AQR107_SGMII_STAT_SZ;
......
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