Commit c15a40c9 authored by Raju P.L.S.S.S.N's avatar Raju P.L.S.S.S.N Committed by Greg Kroah-Hartman

soc: qcom: rpmh-rsc: Clear active mode configuration for wake TCS

commit 15b3bf61 upstream.

For RSCs that have sleep & wake TCS but no dedicated active TCS, wake
TCS can be re-purposed to send active requests. Once the active requests
are sent and response is received, the active mode configuration needs
to be cleared so that controller can use wake TCS for sending wake
requests.

Introduce enable_tcs_irq() to enable completion IRQ for repurposed TCSes.

Fixes: 2de4b8d3 (drivers: qcom: rpmh-rsc: allow active requests from wake TCS)
Signed-off-by: default avatarRaju P.L.S.S.S.N <rplsssn@codeaurora.org>
[mkshah: call enable_tcs_irq() within drv->lock, update commit message]
Signed-off-by: default avatarMaulik Shah <mkshah@codeaurora.org>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1586703004-13674-6-git-send-email-mkshah@codeaurora.orgSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 8644121c
...@@ -201,6 +201,42 @@ static const struct tcs_request *get_req_from_tcs(struct rsc_drv *drv, ...@@ -201,6 +201,42 @@ static const struct tcs_request *get_req_from_tcs(struct rsc_drv *drv,
return NULL; return NULL;
} }
static void __tcs_set_trigger(struct rsc_drv *drv, int tcs_id, bool trigger)
{
u32 enable;
/*
* HW req: Clear the DRV_CONTROL and enable TCS again
* While clearing ensure that the AMC mode trigger is cleared
* and then the mode enable is cleared.
*/
enable = read_tcs_reg(drv, RSC_DRV_CONTROL, tcs_id, 0);
enable &= ~TCS_AMC_MODE_TRIGGER;
write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable);
enable &= ~TCS_AMC_MODE_ENABLE;
write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable);
if (trigger) {
/* Enable the AMC mode on the TCS and then trigger the TCS */
enable = TCS_AMC_MODE_ENABLE;
write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable);
enable |= TCS_AMC_MODE_TRIGGER;
write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable);
}
}
static void enable_tcs_irq(struct rsc_drv *drv, int tcs_id, bool enable)
{
u32 data;
data = read_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, 0);
if (enable)
data |= BIT(tcs_id);
else
data &= ~BIT(tcs_id);
write_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, data);
}
/** /**
* tcs_tx_done: TX Done interrupt handler * tcs_tx_done: TX Done interrupt handler
*/ */
...@@ -237,6 +273,14 @@ static irqreturn_t tcs_tx_done(int irq, void *p) ...@@ -237,6 +273,14 @@ static irqreturn_t tcs_tx_done(int irq, void *p)
} }
trace_rpmh_tx_done(drv, i, req, err); trace_rpmh_tx_done(drv, i, req, err);
/*
* If wake tcs was re-purposed for sending active
* votes, clear AMC trigger & enable modes and
* disable interrupt for this TCS
*/
if (!drv->tcs[ACTIVE_TCS].num_tcs)
__tcs_set_trigger(drv, i, false);
skip: skip:
/* Reclaim the TCS */ /* Reclaim the TCS */
write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, i, 0); write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, i, 0);
...@@ -244,6 +288,13 @@ static irqreturn_t tcs_tx_done(int irq, void *p) ...@@ -244,6 +288,13 @@ static irqreturn_t tcs_tx_done(int irq, void *p)
write_tcs_reg(drv, RSC_DRV_IRQ_CLEAR, 0, BIT(i)); write_tcs_reg(drv, RSC_DRV_IRQ_CLEAR, 0, BIT(i));
spin_lock(&drv->lock); spin_lock(&drv->lock);
clear_bit(i, drv->tcs_in_use); clear_bit(i, drv->tcs_in_use);
/*
* Disable interrupt for WAKE TCS to avoid being
* spammed with interrupts coming when the solver
* sends its wake votes.
*/
if (!drv->tcs[ACTIVE_TCS].num_tcs)
enable_tcs_irq(drv, i, false);
spin_unlock(&drv->lock); spin_unlock(&drv->lock);
if (req) if (req)
rpmh_tx_done(req, err); rpmh_tx_done(req, err);
...@@ -285,28 +336,6 @@ static void __tcs_buffer_write(struct rsc_drv *drv, int tcs_id, int cmd_id, ...@@ -285,28 +336,6 @@ static void __tcs_buffer_write(struct rsc_drv *drv, int tcs_id, int cmd_id,
write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, tcs_id, cmd_enable); write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, tcs_id, cmd_enable);
} }
static void __tcs_trigger(struct rsc_drv *drv, int tcs_id)
{
u32 enable;
/*
* HW req: Clear the DRV_CONTROL and enable TCS again
* While clearing ensure that the AMC mode trigger is cleared
* and then the mode enable is cleared.
*/
enable = read_tcs_reg(drv, RSC_DRV_CONTROL, tcs_id, 0);
enable &= ~TCS_AMC_MODE_TRIGGER;
write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable);
enable &= ~TCS_AMC_MODE_ENABLE;
write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable);
/* Enable the AMC mode on the TCS and then trigger the TCS */
enable = TCS_AMC_MODE_ENABLE;
write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable);
enable |= TCS_AMC_MODE_TRIGGER;
write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable);
}
static int check_for_req_inflight(struct rsc_drv *drv, struct tcs_group *tcs, static int check_for_req_inflight(struct rsc_drv *drv, struct tcs_group *tcs,
const struct tcs_request *msg) const struct tcs_request *msg)
{ {
...@@ -377,10 +406,12 @@ static int tcs_write(struct rsc_drv *drv, const struct tcs_request *msg) ...@@ -377,10 +406,12 @@ static int tcs_write(struct rsc_drv *drv, const struct tcs_request *msg)
tcs->req[tcs_id - tcs->offset] = msg; tcs->req[tcs_id - tcs->offset] = msg;
set_bit(tcs_id, drv->tcs_in_use); set_bit(tcs_id, drv->tcs_in_use);
if (msg->state == RPMH_ACTIVE_ONLY_STATE && tcs->type != ACTIVE_TCS)
enable_tcs_irq(drv, tcs_id, true);
spin_unlock(&drv->lock); spin_unlock(&drv->lock);
__tcs_buffer_write(drv, tcs_id, 0, msg); __tcs_buffer_write(drv, tcs_id, 0, msg);
__tcs_trigger(drv, tcs_id); __tcs_set_trigger(drv, tcs_id, true);
done_write: done_write:
spin_unlock_irqrestore(&tcs->lock, flags); spin_unlock_irqrestore(&tcs->lock, flags);
......
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