Commit c217ab7a authored by Heiner Kallweit's avatar Heiner Kallweit Committed by David S. Miller

r8169: enable ASPM L1.2 if system vendor flags it as safe

On some systems there are compatibility issues with ASPM L1.2 and
RTL8125, therefore this state is disabled per default. To allow for
the L1.2 power saving on not affected systems, Realtek provides
vendors that successfully tested ASPM L1.2 the option to flag this
state as safe. According to Realtek this flag will be set first on
certain Chromebox devices.
Suggested-by: default avatarChun-Hao Lin <hau@realtek.com>
Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2fbafb82
...@@ -2684,7 +2684,26 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable) ...@@ -2684,7 +2684,26 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)
if (enable && tp->aspm_manageable) { if (enable && tp->aspm_manageable) {
RTL_W8(tp, Config5, RTL_R8(tp, Config5) | ASPM_en); RTL_W8(tp, Config5, RTL_R8(tp, Config5) | ASPM_en);
RTL_W8(tp, Config2, RTL_R8(tp, Config2) | ClkReqEn); RTL_W8(tp, Config2, RTL_R8(tp, Config2) | ClkReqEn);
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_60 ... RTL_GIGA_MAC_VER_63:
/* reset ephy tx/rx disable timer */
r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
/* chip can trigger L1.2 */
r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, BIT(2));
break;
default:
break;
}
} else { } else {
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_60 ... RTL_GIGA_MAC_VER_63:
r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
break;
default:
break;
}
RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn); RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en); RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
} }
...@@ -5251,6 +5270,16 @@ static void rtl_init_mac_address(struct rtl8169_private *tp) ...@@ -5251,6 +5270,16 @@ static void rtl_init_mac_address(struct rtl8169_private *tp)
rtl_rar_set(tp, mac_addr); rtl_rar_set(tp, mac_addr);
} }
/* register is set if system vendor successfully tested ASPM 1.2 */
static bool rtl_aspm_is_safe(struct rtl8169_private *tp)
{
if (tp->mac_version >= RTL_GIGA_MAC_VER_60 &&
r8168_mac_ocp_read(tp, 0xc0b2) & 0xf)
return true;
return false;
}
static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
struct rtl8169_private *tp; struct rtl8169_private *tp;
...@@ -5329,7 +5358,9 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -5329,7 +5358,9 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
* Chips from RTL8168h partially have issues with L1.2, but seem * Chips from RTL8168h partially have issues with L1.2, but seem
* to work fine with L1 and L1.1. * to work fine with L1 and L1.1.
*/ */
if (tp->mac_version >= RTL_GIGA_MAC_VER_45) if (rtl_aspm_is_safe(tp))
rc = 0;
else if (tp->mac_version >= RTL_GIGA_MAC_VER_45)
rc = pci_disable_link_state(pdev, PCIE_LINK_STATE_L1_2); rc = pci_disable_link_state(pdev, PCIE_LINK_STATE_L1_2);
else else
rc = pci_disable_link_state(pdev, PCIE_LINK_STATE_L1); rc = pci_disable_link_state(pdev, PCIE_LINK_STATE_L1);
......
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