Commit c23be4ae authored by Andres Rodriguez's avatar Andres Rodriguez Committed by Alex Deucher

drm/amdgpu: add plumbing for ctx priority changes v2

Introduce amdgpu_ctx_priority_override(). A mechanism to override a
context's priority.

An override can be terminated by setting the override to
AMD_SCHED_PRIORITY_UNSET.

v2: change refcounted interface for a direct set
Signed-off-by: default avatarAndres Rodriguez <andresx7@gmail.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f3d19bf8
...@@ -735,7 +735,9 @@ struct amdgpu_ctx { ...@@ -735,7 +735,9 @@ struct amdgpu_ctx {
spinlock_t ring_lock; spinlock_t ring_lock;
struct dma_fence **fences; struct dma_fence **fences;
struct amdgpu_ctx_ring rings[AMDGPU_MAX_RINGS]; struct amdgpu_ctx_ring rings[AMDGPU_MAX_RINGS];
bool preamble_presented; bool preamble_presented;
enum amd_sched_priority init_priority;
enum amd_sched_priority override_priority;
}; };
struct amdgpu_ctx_mgr { struct amdgpu_ctx_mgr {
...@@ -752,6 +754,8 @@ int amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx, struct amdgpu_ring *ring, ...@@ -752,6 +754,8 @@ int amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx, struct amdgpu_ring *ring,
struct dma_fence *fence, uint64_t *seq); struct dma_fence *fence, uint64_t *seq);
struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx, struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
struct amdgpu_ring *ring, uint64_t seq); struct amdgpu_ring *ring, uint64_t seq);
void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
enum amd_sched_priority priority);
int amdgpu_ctx_ioctl(struct drm_device *dev, void *data, int amdgpu_ctx_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp); struct drm_file *filp);
......
...@@ -72,6 +72,8 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev, ...@@ -72,6 +72,8 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
} }
ctx->reset_counter = atomic_read(&adev->gpu_reset_counter); ctx->reset_counter = atomic_read(&adev->gpu_reset_counter);
ctx->init_priority = priority;
ctx->override_priority = AMD_SCHED_PRIORITY_UNSET;
/* create context entity for each ring */ /* create context entity for each ring */
for (i = 0; i < adev->num_rings; i++) { for (i = 0; i < adev->num_rings; i++) {
...@@ -362,6 +364,33 @@ struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx, ...@@ -362,6 +364,33 @@ struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
return fence; return fence;
} }
void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
enum amd_sched_priority priority)
{
int i;
struct amdgpu_device *adev = ctx->adev;
struct amd_sched_rq *rq;
struct amd_sched_entity *entity;
struct amdgpu_ring *ring;
enum amd_sched_priority ctx_prio;
ctx->override_priority = priority;
ctx_prio = (ctx->override_priority == AMD_SCHED_PRIORITY_UNSET) ?
ctx->init_priority : ctx->override_priority;
for (i = 0; i < adev->num_rings; i++) {
ring = adev->rings[i];
entity = &ctx->rings[i].entity;
rq = &ring->sched.sched_rq[ctx_prio];
if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
continue;
amd_sched_entity_set_rq(entity, rq);
}
}
void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr) void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr)
{ {
mutex_init(&mgr->lock); mutex_init(&mgr->lock);
......
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