Commit c301b327 authored by Enric Balletbo i Serra's avatar Enric Balletbo i Serra Committed by Heiko Stuebner

arm64: dts: rockchip: add usb3-phy otg-port support for rk3399

Add the usb3 phyter for the USB3.0 OTG controller.
Signed-off-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent b7e63d95
...@@ -411,8 +411,8 @@ usbdrd_dwc3_0: dwc3 { ...@@ -411,8 +411,8 @@ usbdrd_dwc3_0: dwc3 {
reg = <0x0 0xfe800000 0x0 0x100000>; reg = <0x0 0xfe800000 0x0 0x100000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
dr_mode = "otg"; dr_mode = "otg";
phys = <&u2phy0_otg>; phys = <&u2phy0_otg>, <&tcphy0_usb3>;
phy-names = "usb2-phy"; phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide"; phy_type = "utmi_wide";
snps,dis_enblslpm_quirk; snps,dis_enblslpm_quirk;
snps,dis-u2-freeclk-exists-quirk; snps,dis-u2-freeclk-exists-quirk;
...@@ -444,8 +444,8 @@ usbdrd_dwc3_1: dwc3 { ...@@ -444,8 +444,8 @@ usbdrd_dwc3_1: dwc3 {
reg = <0x0 0xfe900000 0x0 0x100000>; reg = <0x0 0xfe900000 0x0 0x100000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
dr_mode = "otg"; dr_mode = "otg";
phys = <&u2phy1_otg>; phys = <&u2phy1_otg>, <&tcphy1_usb3>;
phy-names = "usb2-phy"; phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide"; phy_type = "utmi_wide";
snps,dis_enblslpm_quirk; snps,dis_enblslpm_quirk;
snps,dis-u2-freeclk-exists-quirk; snps,dis-u2-freeclk-exists-quirk;
......
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