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Commit c328666d authored by Neil Armstrong's avatar Neil Armstrong Committed by Kevin Hilman
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ARM64: dts: amlogic: Add Meson GX dtsi from GXBB 

Move all non-gxbb specific nodes to a common GX dtsi.
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent 1001354c
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arch/arm64/boot/dts/amlogic/meson-gx.dtsi 0 → 100644
View file @ c328666d
/*
* Copyright (c) 2016 BayLibre, SAS.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*
* Copyright (c) 2016 Endless Computers, Inc.
* Author: Carlo Caione <carlo@endlessm.com>
*
* Copyright (c) 2016 Andreas Färber
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
};
};
arm-pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
};
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "xtal";
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
cbus: cbus@c1100000 {
compatible = "simple-bus";
reg = <0x0 0xc1100000 0x0 0x100000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
uart_A: serial@84c0 {
compatible = "amlogic,meson-uart";
reg = <0x0 0x84c0 0x0 0x14>;
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>;
status = "disabled";
};
};
gic: interrupt-controller@c4301000 {
compatible = "arm,gic-400";
reg = <0x0 0xc4301000 0 0x1000>,
<0x0 0xc4302000 0 0x2000>,
<0x0 0xc4304000 0 0x2000>,
<0x0 0xc4306000 0 0x2000>;
interrupt-controller;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
#interrupt-cells = <3>;
#address-cells = <0>;
};
aobus: aobus@c8100000 {
compatible = "simple-bus";
reg = <0x0 0xc8100000 0x0 0x100000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
uart_AO: serial@4c0 {
compatible = "amlogic,meson-uart";
reg = <0x0 0x004c0 0x0 0x14>;
interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>;
status = "disabled";
};
};
periphs: periphs@c8834000 {
compatible = "simple-bus";
reg = <0x0 0xc8834000 0x0 0x2000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
};
hiubus: hiubus@c883c000 {
compatible = "simple-bus";
reg = <0x0 0xc883c000 0x0 0x2000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
};
apb: apb@d0000000 {
compatible = "simple-bus";
reg = <0x0 0xd0000000 0x0 0x200000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
};
};
};
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
View file @ c328666d
...@@ -40,9 +40,7 @@ ...@@ -40,9 +40,7 @@
* OTHER DEALINGS IN THE SOFTWARE. * OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include <dt-bindings/gpio/gpio.h> #include "meson-gx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/meson-gxbb-gpio.h> #include <dt-bindings/gpio/meson-gxbb-gpio.h>
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
#include <dt-bindings/clock/gxbb-clkc.h> #include <dt-bindings/clock/gxbb-clkc.h>
...@@ -51,56 +49,6 @@ ...@@ -51,56 +49,6 @@
/ { / {
compatible = "amlogic,meson-gxbb"; compatible = "amlogic,meson-gxbb";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
};
};
arm-pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
firmware { firmware {
sm: secure-monitor { sm: secure-monitor {
...@@ -126,31 +74,7 @@ bid: bid@46 { ...@@ -126,31 +74,7 @@ bid: bid@46 {
}; };
}; };
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
};
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "xtal";
#clock-cells = <0>;
};
soc { soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
usb0_phy: phy@c0000000 { usb0_phy: phy@c0000000 {
compatible = "amlogic,meson-gxbb-usb2-phy"; compatible = "amlogic,meson-gxbb-usb2-phy";
#phy-cells = <0>; #phy-cells = <0>;
...@@ -170,500 +94,439 @@ usb1_phy: phy@c0000020 { ...@@ -170,500 +94,439 @@ usb1_phy: phy@c0000020 {
status = "disabled"; status = "disabled";
}; };
cbus: cbus@c1100000 { usb0: usb@c9000000 {
compatible = "simple-bus"; compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
reg = <0x0 0xc1100000 0x0 0x100000>; reg = <0x0 0xc9000000 0x0 0x40000>;
#address-cells = <2>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
#size-cells = <2>; clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; clock-names = "otg";
phys = <&usb0_phy>;
phy-names = "usb2-phy";
dr_mode = "host";
status = "disabled";
};
reset: reset-controller@4404 { usb1: usb@c9100000 {
compatible = "amlogic,meson-gxbb-reset"; compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
reg = <0x0 0x04404 0x0 0x20>; reg = <0x0 0xc9100000 0x0 0x40000>;
#reset-cells = <1>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
}; clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
clock-names = "otg";
phys = <&usb1_phy>;
phy-names = "usb2-phy";
dr_mode = "host";
status = "disabled";
};
uart_A: serial@84c0 { ethmac: ethernet@c9410000 {
compatible = "amlogic,meson-uart"; compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
reg = <0x0 0x84c0 0x0 0x14>; reg = <0x0 0xc9410000 0x0 0x10000
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 0x0 0xc8834540 0x0 0x4>;
clocks = <&xtal>; interrupts = <0 8 1>;
status = "disabled"; interrupt-names = "macirq";
}; clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_MPLL2>;
clock-names = "stmmaceth", "clkin0", "clkin1";
phy-mode = "rgmii";
status = "disabled";
};
};
};
&cbus {
reset: reset-controller@4404 {
compatible = "amlogic,meson-gxbb-reset";
reg = <0x0 0x04404 0x0 0x20>;
#reset-cells = <1>;
};
uart_B: serial@84dc {
compatible = "amlogic,meson-uart";
reg = <0x0 0x84dc 0x0 0x14>;
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>;
status = "disabled";
};
pwm_ab: pwm@8550 {
compatible = "amlogic,meson-gxbb-pwm";
reg = <0x0 0x08550 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@8650 {
compatible = "amlogic,meson-gxbb-pwm";
reg = <0x0 0x08650 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_ef: pwm@86c0 {
compatible = "amlogic,meson-gxbb-pwm";
reg = <0x0 0x086c0 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
uart_C: serial@8700 {
compatible = "amlogic,meson-uart";
reg = <0x0 0x8700 0x0 0x14>;
interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>;
status = "disabled";
};
watchdog@98d0 {
compatible = "amlogic,meson-gxbb-wdt";
reg = <0x0 0x098d0 0x0 0x10>;
clocks = <&xtal>;
};
spifc: spi@8c80 {
compatible = "amlogic,meson-gxbb-spifc";
reg = <0x0 0x08c80 0x0 0x80>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_SPI>;
status = "disabled";
};
i2c_A: i2c@8500 {
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x08500 0x0 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_I2C>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c_B: i2c@87c0 {
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x087c0 0x0 0x20>;
interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_I2C>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c_C: i2c@87e0 {
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x087e0 0x0 0x20>;
interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_I2C>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
&aobus {
pinctrl_aobus: pinctrl@14 {
compatible = "amlogic,meson-gxbb-aobus-pinctrl";
#address-cells = <2>;
#size-cells = <2>;
ranges;
uart_B: serial@84dc { gpio_ao: bank@14 {
compatible = "amlogic,meson-uart"; reg = <0x0 0x00014 0x0 0x8>,
reg = <0x0 0x84dc 0x0 0x14>; <0x0 0x0002c 0x0 0x4>,
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; <0x0 0x00024 0x0 0x8>;
clocks = <&xtal>; reg-names = "mux", "pull", "gpio";
status = "disabled"; gpio-controller;
#gpio-cells = <2>;
};
uart_ao_a_pins: uart_ao_a {
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a";
function = "uart_ao";
}; };
};
pwm_ab: pwm@8550 { remote_input_ao_pins: remote_input_ao {
compatible = "amlogic,meson-gxbb-pwm"; mux {
reg = <0x0 0x08550 0x0 0x10>; groups = "remote_input_ao";
#pwm-cells = <3>; function = "remote_input_ao";
status = "disabled";
}; };
};
pwm_cd: pwm@8650 { i2c_ao_pins: i2c_ao {
compatible = "amlogic,meson-gxbb-pwm"; mux {
reg = <0x0 0x08650 0x0 0x10>; groups = "i2c_sck_ao",
#pwm-cells = <3>; "i2c_sda_ao";
status = "disabled"; function = "i2c_ao";
}; };
};
pwm_ef: pwm@86c0 { pwm_ao_a_3_pins: pwm_ao_a_3 {
compatible = "amlogic,meson-gxbb-pwm"; mux {
reg = <0x0 0x086c0 0x0 0x10>; groups = "pwm_ao_a_3";
#pwm-cells = <3>; function = "pwm_ao_a_3";
status = "disabled";
}; };
};
uart_C: serial@8700 { pwm_ao_a_6_pins: pwm_ao_a_6 {
compatible = "amlogic,meson-uart"; mux {
reg = <0x0 0x8700 0x0 0x14>; groups = "pwm_ao_a_6";
interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>; function = "pwm_ao_a_6";
clocks = <&xtal>;
status = "disabled";
}; };
};
watchdog@98d0 { pwm_ao_a_12_pins: pwm_ao_a_12 {
compatible = "amlogic,meson-gxbb-wdt"; mux {
reg = <0x0 0x098d0 0x0 0x10>; groups = "pwm_ao_a_12";
clocks = <&xtal>; function = "pwm_ao_a_12";
}; };
};
spifc: spi@8c80 { pwm_ao_b_pins: pwm_ao_b {
compatible = "amlogic,meson-gxbb-spifc"; mux {
reg = <0x0 0x08c80 0x0 0x80>; groups = "pwm_ao_b";
#address-cells = <1>; function = "pwm_ao_b";
#size-cells = <0>;
clocks = <&clkc CLKID_SPI>;
status = "disabled";
}; };
};
};
clkc_AO: clock-controller@040 {
compatible = "amlogic,gxbb-aoclkc";
reg = <0x0 0x00040 0x0 0x4>;
#clock-cells = <1>;
#reset-cells = <1>;
};
ir: ir@580 {
compatible = "amlogic,meson-gxbb-ir";
reg = <0x0 0x00580 0x0 0x40>;
interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
pwm_ab_AO: pwm@550 {
compatible = "amlogic,meson-gxbb-pwm";
reg = <0x0 0x0550 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
i2c_AO: i2c@500 {
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x500 0x0 0x20>;
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_AO_I2C>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
&periphs {
rng {
compatible = "amlogic,meson-rng";
reg = <0x0 0x0 0x0 0x4>;
};
pinctrl_periphs: pinctrl@4b0 {
compatible = "amlogic,meson-gxbb-periphs-pinctrl";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpio: bank@4b0 {
reg = <0x0 0x004b0 0x0 0x28>,
<0x0 0x004e8 0x0 0x14>,
<0x0 0x00120 0x0 0x14>,
<0x0 0x00430 0x0 0x40>;
reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller;
#gpio-cells = <2>;
};
i2c_A: i2c@8500 { emmc_pins: emmc {
compatible = "amlogic,meson-gxbb-i2c"; mux {
reg = <0x0 0x08500 0x0 0x20>; groups = "emmc_nand_d07",
interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; "emmc_cmd",
clocks = <&clkc CLKID_I2C>; "emmc_clk";
#address-cells = <1>; function = "emmc";
#size-cells = <0>;
status = "disabled";
}; };
};
i2c_B: i2c@87c0 { nor_pins: nor {
compatible = "amlogic,meson-gxbb-i2c"; mux {
reg = <0x0 0x087c0 0x0 0x20>; groups = "nor_d",
interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; "nor_q",
clocks = <&clkc CLKID_I2C>; "nor_c",
#address-cells = <1>; "nor_cs";
#size-cells = <0>; function = "nor";
status = "disabled";
}; };
};
i2c_C: i2c@87e0 { sdcard_pins: sdcard {
compatible = "amlogic,meson-gxbb-i2c"; mux {
reg = <0x0 0x087e0 0x0 0x20>; groups = "sdcard_d0",
interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; "sdcard_d1",
clocks = <&clkc CLKID_I2C>; "sdcard_d2",
#address-cells = <1>; "sdcard_d3",
#size-cells = <0>; "sdcard_cmd",
status = "disabled"; "sdcard_clk";
function = "sdcard";
}; };
}; };
gic: interrupt-controller@c4301000 { sdio_pins: sdio {
compatible = "arm,gic-400"; mux {
reg = <0x0 0xc4301000 0 0x1000>, groups = "sdio_d0",
<0x0 0xc4302000 0 0x2000>, "sdio_d1",
<0x0 0xc4304000 0 0x2000>, "sdio_d2",
<0x0 0xc4306000 0 0x2000>; "sdio_d3",
interrupt-controller; "sdio_cmd",
interrupts = <GIC_PPI 9 "sdio_clk";
(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; function = "sdio";
#interrupt-cells = <3>;
#address-cells = <0>;
};
aobus: aobus@c8100000 {
compatible = "simple-bus";
reg = <0x0 0xc8100000 0x0 0x100000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
pinctrl_aobus: pinctrl@14 {
compatible = "amlogic,meson-gxbb-aobus-pinctrl";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpio_ao: bank@14 {
reg = <0x0 0x00014 0x0 0x8>,
<0x0 0x0002c 0x0 0x4>,
<0x0 0x00024 0x0 0x8>;
reg-names = "mux", "pull", "gpio";
gpio-controller;
#gpio-cells = <2>;
};
uart_ao_a_pins: uart_ao_a {
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a";
function = "uart_ao";
};
};
remote_input_ao_pins: remote_input_ao {
mux {
groups = "remote_input_ao";
function = "remote_input_ao";
};
};
i2c_ao_pins: i2c_ao {
mux {
groups = "i2c_sck_ao",
"i2c_sda_ao";
function = "i2c_ao";
};
};
pwm_ao_a_3_pins: pwm_ao_a_3 {
mux {
groups = "pwm_ao_a_3";
function = "pwm_ao_a_3";
};
};
pwm_ao_a_6_pins: pwm_ao_a_6 {
mux {
groups = "pwm_ao_a_6";
function = "pwm_ao_a_6";
};
};
pwm_ao_a_12_pins: pwm_ao_a_12 {
mux {
groups = "pwm_ao_a_12";
function = "pwm_ao_a_12";
};
};
pwm_ao_b_pins: pwm_ao_b {
mux {
groups = "pwm_ao_b";
function = "pwm_ao_b";
};
};
}; };
};
clkc_AO: clock-controller@040 { sdio_irq_pins: sdio_irq {
compatible = "amlogic,gxbb-aoclkc"; mux {
reg = <0x0 0x00040 0x0 0x4>; groups = "sdio_irq";
#clock-cells = <1>; function = "sdio";
#reset-cells = <1>;
}; };
};
uart_AO: serial@4c0 { uart_a_pins: uart_a {
compatible = "amlogic,meson-uart"; mux {
reg = <0x0 0x004c0 0x0 0x14>; groups = "uart_tx_a",
interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; "uart_rx_a";
clocks = <&xtal>; function = "uart_a";
status = "disabled";
}; };
};
ir: ir@580 { uart_b_pins: uart_b {
compatible = "amlogic,meson-gxbb-ir"; mux {
reg = <0x0 0x00580 0x0 0x40>; groups = "uart_tx_b",
interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; "uart_rx_b";
status = "disabled"; function = "uart_b";
}; };
};
pwm_ab_AO: pwm@550 { uart_c_pins: uart_c {
compatible = "amlogic,meson-gxbb-pwm"; mux {
reg = <0x0 0x0550 0x0 0x10>; groups = "uart_tx_c",
#pwm-cells = <3>; "uart_rx_c";
status = "disabled"; function = "uart_c";
}; };
};
i2c_AO: i2c@500 { i2c_a_pins: i2c_a {
compatible = "amlogic,meson-gxbb-i2c"; mux {
reg = <0x0 0x500 0x0 0x20>; groups = "i2c_sck_a",
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; "i2c_sda_a";
clocks = <&clkc CLKID_AO_I2C>; function = "i2c_a";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
}; };
}; };
periphs: periphs@c8834000 { i2c_b_pins: i2c_b {
compatible = "simple-bus"; mux {
reg = <0x0 0xc8834000 0x0 0x2000>; groups = "i2c_sck_b",
#address-cells = <2>; "i2c_sda_b";
#size-cells = <2>; function = "i2c_b";
ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>; };
};
rng { i2c_c_pins: i2c_c {
compatible = "amlogic,meson-rng"; mux {
reg = <0x0 0x0 0x0 0x4>; groups = "i2c_sck_c",
"i2c_sda_c";
function = "i2c_c";
}; };
};
pinctrl_periphs: pinctrl@4b0 { eth_pins: eth_c {
compatible = "amlogic,meson-gxbb-periphs-pinctrl"; mux {
#address-cells = <2>; groups = "eth_mdio",
#size-cells = <2>; "eth_mdc",
ranges; "eth_clk_rx_clk",
"eth_rx_dv",
gpio: bank@4b0 { "eth_rxd0",
reg = <0x0 0x004b0 0x0 0x28>, "eth_rxd1",
<0x0 0x004e8 0x0 0x14>, "eth_rxd2",
<0x0 0x00120 0x0 0x14>, "eth_rxd3",
<0x0 0x00430 0x0 0x40>; "eth_rgmii_tx_clk",
reg-names = "mux", "pull", "pull-enable", "gpio"; "eth_tx_en",
gpio-controller; "eth_txd0",
#gpio-cells = <2>; "eth_txd1",
}; "eth_txd2",
"eth_txd3";
emmc_pins: emmc { function = "eth";
mux {
groups = "emmc_nand_d07",
"emmc_cmd",
"emmc_clk";
function = "emmc";
};
};
nor_pins: nor {
mux {
groups = "nor_d",
"nor_q",
"nor_c",
"nor_cs";
function = "nor";
};
};
sdcard_pins: sdcard {
mux {
groups = "sdcard_d0",
"sdcard_d1",
"sdcard_d2",
"sdcard_d3",
"sdcard_cmd",
"sdcard_clk";
function = "sdcard";
};
};
sdio_pins: sdio {
mux {
groups = "sdio_d0",
"sdio_d1",
"sdio_d2",
"sdio_d3",
"sdio_cmd",
"sdio_clk";
function = "sdio";
};
};
sdio_irq_pins: sdio_irq {
mux {
groups = "sdio_irq";
function = "sdio";
};
};
uart_a_pins: uart_a {
mux {
groups = "uart_tx_a",
"uart_rx_a";
function = "uart_a";
};
};
uart_b_pins: uart_b {
mux {
groups = "uart_tx_b",
"uart_rx_b";
function = "uart_b";
};
};
uart_c_pins: uart_c {
mux {
groups = "uart_tx_c",
"uart_rx_c";
function = "uart_c";
};
};
i2c_a_pins: i2c_a {
mux {
groups = "i2c_sck_a",
"i2c_sda_a";
function = "i2c_a";
};
};
i2c_b_pins: i2c_b {
mux {
groups = "i2c_sck_b",
"i2c_sda_b";
function = "i2c_b";
};
};
i2c_c_pins: i2c_c {
mux {
groups = "i2c_sck_c",
"i2c_sda_c";
function = "i2c_c";
};
};
eth_pins: eth_c {
mux {
groups = "eth_mdio",
"eth_mdc",
"eth_clk_rx_clk",
"eth_rx_dv",
"eth_rxd0",
"eth_rxd1",
"eth_rxd2",
"eth_rxd3",
"eth_rgmii_tx_clk",
"eth_tx_en",
"eth_txd0",
"eth_txd1",
"eth_txd2",
"eth_txd3";
function = "eth";
};
};
pwm_a_x_pins: pwm_a_x {
mux {
groups = "pwm_a_x";
function = "pwm_a_x";
};
};
pwm_a_y_pins: pwm_a_y {
mux {
groups = "pwm_a_y";
function = "pwm_a_y";
};
};
pwm_b_pins: pwm_b {
mux {
groups = "pwm_b";
function = "pwm_b";
};
};
pwm_d_pins: pwm_d {
mux {
groups = "pwm_d";
function = "pwm_d";
};
};
pwm_e_pins: pwm_e {
mux {
groups = "pwm_e";
function = "pwm_e";
};
};
pwm_f_x_pins: pwm_f_x {
mux {
groups = "pwm_f_x";
function = "pwm_f_x";
};
};
pwm_f_y_pins: pwm_f_y {
mux {
groups = "pwm_f_y";
function = "pwm_f_y";
};
};
}; };
}; };
hiubus: hiubus@c883c000 { pwm_a_x_pins: pwm_a_x {
compatible = "simple-bus"; mux {
reg = <0x0 0xc883c000 0x0 0x2000>; groups = "pwm_a_x";
#address-cells = <2>; function = "pwm_a_x";
#size-cells = <2>; };
ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>; };
clkc: clock-controller@0 { pwm_a_y_pins: pwm_a_y {
compatible = "amlogic,gxbb-clkc"; mux {
#clock-cells = <1>; groups = "pwm_a_y";
reg = <0x0 0x0 0x0 0x3db>; function = "pwm_a_y";
}; };
};
mailbox: mailbox@404 { pwm_b_pins: pwm_b {
compatible = "amlogic,meson-gxbb-mhu"; mux {
reg = <0 0x404 0 0x4c>; groups = "pwm_b";
interrupts = <0 208 IRQ_TYPE_EDGE_RISING>, function = "pwm_b";
<0 209 IRQ_TYPE_EDGE_RISING>,
<0 210 IRQ_TYPE_EDGE_RISING>;
#mbox-cells = <1>;
}; };
}; };
apb: apb@d0000000 { pwm_d_pins: pwm_d {
compatible = "simple-bus"; mux {
reg = <0x0 0xd0000000 0x0 0x200000>; groups = "pwm_d";
#address-cells = <2>; function = "pwm_d";
#size-cells = <2>; };
ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
}; };
usb0: usb@c9000000 { pwm_e_pins: pwm_e {
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; mux {
reg = <0x0 0xc9000000 0x0 0x40000>; groups = "pwm_e";
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; function = "pwm_e";
clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; };
clock-names = "otg";
phys = <&usb0_phy>;
phy-names = "usb2-phy";
dr_mode = "host";
status = "disabled";
}; };
usb1: usb@c9100000 { pwm_f_x_pins: pwm_f_x {
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; mux {
reg = <0x0 0xc9100000 0x0 0x40000>; groups = "pwm_f_x";
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; function = "pwm_f_x";
clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; };
clock-names = "otg";
phys = <&usb1_phy>;
phy-names = "usb2-phy";
dr_mode = "host";
status = "disabled";
}; };
ethmac: ethernet@c9410000 { pwm_f_y_pins: pwm_f_y {
compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; mux {
reg = <0x0 0xc9410000 0x0 0x10000 groups = "pwm_f_y";
0x0 0xc8834540 0x0 0x4>; function = "pwm_f_y";
interrupts = <0 8 1>; };
interrupt-names = "macirq";
clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_MPLL2>;
clock-names = "stmmaceth", "clkin0", "clkin1";
phy-mode = "rgmii";
status = "disabled";
}; };
}; };
}; };
&hiubus {
clkc: clock-controller@0 {
compatible = "amlogic,gxbb-clkc";
#clock-cells = <1>;
reg = <0x0 0x0 0x0 0x3db>;
};
mailbox: mailbox@404 {
compatible = "amlogic,meson-gxbb-mhu";
reg = <0 0x404 0 0x4c>;
interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
<0 209 IRQ_TYPE_EDGE_RISING>,
<0 210 IRQ_TYPE_EDGE_RISING>;
#mbox-cells = <1>;
};
};
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