Commit c3a694ac authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'omap-for-v4.17/dt-pt2-signed' of...

Merge tag 'omap-for-v4.17/dt-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Pull "Second set of dts changes for omap variants for v4.17" from Tony Lindgren:

This series of patches configures few new drivers and adds
omap5 specific nodes:

- Enable USB OTG mode for xhci on am437x

- A series of changes to configure aux control module instance
  on omap5 mostly to get the audio clocks configured

- A series of changes to update droid4 for MDM6600 modem USB PHY
  and UART1 pinctrl

* tag 'omap-for-v4.17/dt-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap4-droid4: Configure uart1 pins
  ARM: dts: omap4-droid4: Configure MDM6600 USB PHY
  ARM: dts: omap4-droid4: Fix USB PHY port naming
  ARM: dts: omap5-board-common: Add phandle for mclk clock for twl6040
  ARM: dts: omap5: add fref_xtal_ck support
  ARM: dts: omap5: add support for control module wkup pad config
  dt-bindings: omap5: ctrl: Support for control module wkup pad config
  ARM: dts: am43xx: Enable dual-role mode for USB1
parents 190e3138 984c7706
......@@ -25,6 +25,7 @@ Required properties:
"ti,omap4-scm-padconf-wkup"
"ti,omap5-scm-core"
"ti,omap5-scm-padconf-core"
"ti,omap5-scm-wkup-pad-conf"
"ti,dra7-scm-core"
- reg: Contains Control Module register address range
(base address and length)
......
......@@ -805,7 +805,7 @@ &usb2_phy1 {
};
&usb1 {
dr_mode = "peripheral";
dr_mode = "otg";
status = "okay";
};
......
......@@ -600,7 +600,7 @@ &usb2_phy1 {
};
&usb1 {
dr_mode = "peripheral";
dr_mode = "otg";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&usb1_pins>;
......
......@@ -856,7 +856,7 @@ &usb2_phy1 {
};
&usb1 {
dr_mode = "peripheral";
dr_mode = "otg";
status = "okay";
};
......
......@@ -70,8 +70,30 @@ hdmi_regulator: regulator-hdmi {
regulator-always-on;
};
/* HS USB Host PHY on PORT 1 */
hsusb1_phy: hsusb1_phy {
/* FS USB Host PHY on port 1 for mdm6600 */
fsusb1_phy: usb-phy@1 {
compatible = "motorola,mapphone-mdm6600";
pinctrl-0 = <&usb_mdm6600_pins>;
pinctrl-names = "default";
enable-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; /* gpio_95 */
power-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* gpio_54 */
reset-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>; /* gpio_49 */
/* mode: gpio_148 gpio_149 */
motorola,mode-gpios = <&gpio5 20 GPIO_ACTIVE_HIGH>,
<&gpio5 21 GPIO_ACTIVE_HIGH>;
/* cmd: gpio_103 gpio_104 gpio_142 */
motorola,cmd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>,
<&gpio4 8 GPIO_ACTIVE_HIGH>,
<&gpio5 14 GPIO_ACTIVE_HIGH>;
/* status: gpio_52 gpio_53 gpio_55 */
motorola,status-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>,
<&gpio2 21 GPIO_ACTIVE_HIGH>,
<&gpio2 23 GPIO_ACTIVE_HIGH>;
#phy-cells = <0>;
};
/* HS USB host TLL nop-phy on port 2 for w3glte */
hsusb2_phy: usb-phy@2 {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
......@@ -455,6 +477,43 @@ OMAP4_IOPAD(0x18c, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
usb_mdm6600_pins: pinmux_usb_mdm6600_pins {
pinctrl-single,pins = <
/* enable 0x4a1000d8 usbb1_ulpitll_dat7.gpio_95 ag16 */
OMAP4_IOPAD(0x0d8, PIN_INPUT | MUX_MODE3)
/* power 0x4a10007c gpmc_nwp.gpio_54 c25 */
OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3)
/* reset 0x4a100072 gpmc_a25.gpio_49 d20 */
OMAP4_IOPAD(0x072, PIN_OUTPUT | MUX_MODE3)
/* mode0/bpwake 0x4a10014e sdmmc5_dat1.gpio_148 af4 */
OMAP4_IOPAD(0x14e, PIN_OUTPUT | MUX_MODE3)
/* mode1/apwake 0x4a100150 sdmmc5_dat2.gpio_149 ag3 */
OMAP4_IOPAD(0x150, PIN_OFF_OUTPUT_LOW | PIN_INPUT | MUX_MODE3)
/* status0 0x4a10007e gpmc_clk.gpio_55 b22 */
OMAP4_IOPAD(0x07e, PIN_INPUT | MUX_MODE3)
/* status1 0x4a10007a gpmc_ncs3.gpio_53 c22 */
OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3)
/* status2 0x4a100078 gpmc_ncs2.gpio_52 d21 */
OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3)
/* cmd0 0x4a100094 gpmc_ncs6.gpio_103 c24 */
OMAP4_IOPAD(0x094, PIN_OUTPUT | MUX_MODE3)
/* cmd1 0x4a100096 gpmc_ncs7.gpio_104 d24 */
OMAP4_IOPAD(0x096, PIN_OUTPUT | MUX_MODE3)
/* cmd2 0x4a100142 uart3_rts_sd.gpio_142 f28 */
OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE3)
>;
};
usb_ulpi_pins: pinmux_usb_ulpi_pins {
pinctrl-single,pins = <
OMAP4_IOPAD(0x196, MUX_MODE7)
......@@ -494,6 +553,28 @@ OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
>;
};
/*
* Note that the v3.0.8 stock userspace dynamically remuxes uart1
* rts pin probably for PM purposes to PIN_INPUT_PULLUP | MUX_MODE7
* when not used. If needed, we can add rts pin remux later based
* on power measurements.
*/
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
/* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)
/* 0x4a10013e mcspi1_cs3.uart1_rts ah23 */
OMAP4_IOPAD(0x13e, MUX_MODE1)
/* 0x4a100140 uart3_cts_rctx.uart1_tx f27 */
OMAP4_IOPAD(0x140, PIN_OUTPUT | MUX_MODE1)
/* 0x4a1001ca dpm_emu14.uart1_rx aa3 */
OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2)
>;
};
/* uart3_tx_irtx and uart3_rx_irrx */
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
......@@ -563,6 +644,17 @@ OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1) /* dmtimer9_pwm_evt (gpio_28) */
};
};
/*
* As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
* uart1 wakeirq.
*/
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core 0xfc>;
};
&uart3 {
interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core 0x17c>;
......@@ -579,8 +671,13 @@ bluetooth {
};
};
&usbhsohci {
phys = <&fsusb1_phy>;
phy-names = "usb";
};
&usbhsehci {
phys = <&hsusb1_phy>;
phys = <&hsusb2_phy>;
};
&usbhshost {
......
......@@ -659,8 +659,8 @@ twl6040: twl@4b {
v2v1-supply = <&smps9_reg>;
enable-active-high;
clocks = <&clk32kgaudio>;
clock-names = "clk32k";
clocks = <&clk32kgaudio>, <&fref_xtal_ck>;
clock-names = "clk32k", "mclk";
};
};
......
......@@ -287,6 +287,28 @@ omap5_pmx_wkup: pinmux@c840 {
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7fff>;
};
omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@cda0 {
compatible = "ti,omap5-scm-wkup-pad-conf",
"simple-bus";
reg = <0xcda0 0x60>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xcda0 0x60>;
scm_wkup_pad_conf: scm_conf@0 {
compatible = "syscon", "simple-bus";
reg = <0x0 0x60>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0x60>;
scm_wkup_pad_conf_clocks: clocks@0 {
#address-cells = <1>;
#size-cells = <0>;
};
};
};
};
ocmcram: ocmcram@40300000 {
......
......@@ -1179,3 +1179,13 @@ wkupaon_clkctrl: clk@20 {
};
};
};
&scm_wkup_pad_conf_clocks {
fref_xtal_ck: fref_xtal_ck {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&sys_clkin>;
ti,bit-shift = <28>;
reg = <0x14>;
};
};
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