Commit c3e36b5d authored by Miquel Raynal's avatar Miquel Raynal Committed by Lee Jones

mfd: ti_am335x_tscadc: Rename the subsystem enable macro

This bit is common to all devices (ADC, Touchscreen, Magnetic reader) so
make it clear that it can be used from any location by operating a
mechanical rename:
s/CNTRLREG_TSCSSENB/CNTRLREG_SSENB/
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Acked-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20211015081506.933180-31-miquel.raynal@bootlin.com
parent 0fd12262
...@@ -184,7 +184,7 @@ static irqreturn_t tiadc_irq_h(int irq, void *private) ...@@ -184,7 +184,7 @@ static irqreturn_t tiadc_irq_h(int irq, void *private)
if (status & IRQENB_FIFO1OVRRUN) { if (status & IRQENB_FIFO1OVRRUN) {
/* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */ /* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */
config = tiadc_readl(adc_dev, REG_CTRL); config = tiadc_readl(adc_dev, REG_CTRL);
config &= ~(CNTRLREG_TSCSSENB); config &= ~(CNTRLREG_SSENB);
tiadc_writel(adc_dev, REG_CTRL, config); tiadc_writel(adc_dev, REG_CTRL, config);
tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN
| IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES); | IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES);
...@@ -197,7 +197,7 @@ static irqreturn_t tiadc_irq_h(int irq, void *private) ...@@ -197,7 +197,7 @@ static irqreturn_t tiadc_irq_h(int irq, void *private)
adc_fsm = tiadc_readl(adc_dev, REG_ADCFSM); adc_fsm = tiadc_readl(adc_dev, REG_ADCFSM);
} while (adc_fsm != 0x10 && count++ < 100); } while (adc_fsm != 0x10 && count++ < 100);
tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB)); tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_SSENB));
return IRQ_HANDLED; return IRQ_HANDLED;
} else if (status & IRQENB_FIFO1THRES) { } else if (status & IRQENB_FIFO1THRES) {
/* Disable irq and wake worker thread */ /* Disable irq and wake worker thread */
...@@ -671,7 +671,7 @@ static int __maybe_unused tiadc_suspend(struct device *dev) ...@@ -671,7 +671,7 @@ static int __maybe_unused tiadc_suspend(struct device *dev)
unsigned int idle; unsigned int idle;
idle = tiadc_readl(adc_dev, REG_CTRL); idle = tiadc_readl(adc_dev, REG_CTRL);
idle &= ~(CNTRLREG_TSCSSENB); idle &= ~(CNTRLREG_SSENB);
tiadc_writel(adc_dev, REG_CTRL, (idle | tiadc_writel(adc_dev, REG_CTRL, (idle |
CNTRLREG_POWERDOWN)); CNTRLREG_POWERDOWN));
......
...@@ -235,7 +235,7 @@ static int ti_tscadc_probe(struct platform_device *pdev) ...@@ -235,7 +235,7 @@ static int ti_tscadc_probe(struct platform_device *pdev)
tscadc_idle_config(tscadc); tscadc_idle_config(tscadc);
/* Enable the TSC module enable bit */ /* Enable the TSC module enable bit */
regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_TSCSSENB); regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB);
/* TSC Cell */ /* TSC Cell */
if (tsc_wires > 0) { if (tsc_wires > 0) {
...@@ -299,7 +299,7 @@ static int __maybe_unused tscadc_suspend(struct device *dev) ...@@ -299,7 +299,7 @@ static int __maybe_unused tscadc_suspend(struct device *dev)
regmap_read(tscadc->regmap, REG_CTRL, &ctrl); regmap_read(tscadc->regmap, REG_CTRL, &ctrl);
ctrl &= ~(CNTRLREG_POWERDOWN); ctrl &= ~(CNTRLREG_POWERDOWN);
ctrl |= CNTRLREG_TSCSSENB; ctrl |= CNTRLREG_SSENB;
regmap_write(tscadc->regmap, REG_CTRL, ctrl); regmap_write(tscadc->regmap, REG_CTRL, ctrl);
} }
pm_runtime_put_sync(dev); pm_runtime_put_sync(dev);
...@@ -316,7 +316,7 @@ static int __maybe_unused tscadc_resume(struct device *dev) ...@@ -316,7 +316,7 @@ static int __maybe_unused tscadc_resume(struct device *dev)
regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
tscadc_idle_config(tscadc); tscadc_idle_config(tscadc);
regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_TSCSSENB); regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB);
return 0; return 0;
} }
......
...@@ -96,7 +96,7 @@ ...@@ -96,7 +96,7 @@
#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(0x400) #define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(0x400)
/* Control register */ /* Control register */
#define CNTRLREG_TSCSSENB BIT(0) #define CNTRLREG_SSENB BIT(0)
#define CNTRLREG_STEPID BIT(1) #define CNTRLREG_STEPID BIT(1)
#define CNTRLREG_STEPCONFIGWRT BIT(2) #define CNTRLREG_STEPCONFIGWRT BIT(2)
#define CNTRLREG_POWERDOWN BIT(4) #define CNTRLREG_POWERDOWN BIT(4)
......
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