Commit c4b0930b authored by Chris Wilson's avatar Chris Wilson

drm/i915: Mark all current requests as complete before resetting them

Following a GPU reset upon hang, we retire all the requests and then
mark them all as complete. If we mark them as complete first, we both
keep the normal retirement order (completed first then retired) and
provide a small optimisation for concurrent lookups.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1469002875-2335-3-git-send-email-chris@chris-wilson.co.uk
parent 9b5f4e5e
...@@ -2486,6 +2486,12 @@ static void i915_gem_reset_engine_cleanup(struct intel_engine_cs *engine) ...@@ -2486,6 +2486,12 @@ static void i915_gem_reset_engine_cleanup(struct intel_engine_cs *engine)
i915_gem_object_retire__read(obj, engine->id); i915_gem_object_retire__read(obj, engine->id);
} }
/* Mark all pending requests as complete so that any concurrent
* (lockless) lookup doesn't try and wait upon the request as we
* reset it.
*/
intel_ring_init_seqno(engine, engine->last_submitted_seqno);
/* /*
* Clear the execlists queue up before freeing the requests, as those * Clear the execlists queue up before freeing the requests, as those
* are the ones that keep the context and ringbuffer backing objects * are the ones that keep the context and ringbuffer backing objects
...@@ -2528,8 +2534,6 @@ static void i915_gem_reset_engine_cleanup(struct intel_engine_cs *engine) ...@@ -2528,8 +2534,6 @@ static void i915_gem_reset_engine_cleanup(struct intel_engine_cs *engine)
intel_ring_update_space(buffer); intel_ring_update_space(buffer);
} }
intel_ring_init_seqno(engine, engine->last_submitted_seqno);
engine->i915->gt.active_engines &= ~intel_engine_flag(engine); engine->i915->gt.active_engines &= ~intel_engine_flag(engine);
} }
......
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