Commit c57f5ba2 authored by huangqu's avatar huangqu Committed by Alex Deucher

drm/amdgpu: Wrong order for config and counter_id parameters

Wrong order for config and counter_id parameters was passed, when calling df_v3_6_pmc_set_deferred and df_v3_6_pmc_is_deferred functions.
Signed-off-by: default avatarhuangqu <jinsdb@126.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1ec5a443
...@@ -458,7 +458,7 @@ static int df_v3_6_pmc_add_cntr(struct amdgpu_device *adev, ...@@ -458,7 +458,7 @@ static int df_v3_6_pmc_add_cntr(struct amdgpu_device *adev,
#define DEFERRED_ARM_MASK (1 << 31) #define DEFERRED_ARM_MASK (1 << 31)
static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev, static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
int counter_idx, uint64_t config, uint64_t config, int counter_idx,
bool is_deferred) bool is_deferred)
{ {
...@@ -476,8 +476,8 @@ static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev, ...@@ -476,8 +476,8 @@ static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
} }
static bool df_v3_6_pmc_is_deferred(struct amdgpu_device *adev, static bool df_v3_6_pmc_is_deferred(struct amdgpu_device *adev,
int counter_idx, uint64_t config,
uint64_t config) int counter_idx)
{ {
return (df_v3_6_pmc_has_counter(adev, config, counter_idx) && return (df_v3_6_pmc_has_counter(adev, config, counter_idx) &&
(adev->df_perfmon_config_assign_mask[counter_idx] (adev->df_perfmon_config_assign_mask[counter_idx]
......
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