Commit c588e1c9 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Geert Uytterhoeven

arm64: dts: renesas: r8a779f0: spider: Enable PCIe Host ch0

Enable PCIe Host controller channel 0 on R-Car S4-8 Spider board.

Since this board has an Oculink connector, CLKREQ# pin of PFC for PCIe
should not be used. So, using a GPIO is used to output the clock instead.
Otherwise the controller cannot detect a PCIe device.
Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230905012404.2915246-3-yoshihiro.shimoda.uh@renesas.comSigned-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 183a709d
...@@ -53,6 +53,12 @@ memory@480000000 { ...@@ -53,6 +53,12 @@ memory@480000000 {
reg = <0x4 0x80000000 0x0 0x80000000>; reg = <0x4 0x80000000 0x0 0x80000000>;
}; };
rc21012_pci: clk-rc21012-pci {
compatible = "fixed-clock";
clock-frequency = <100000000>;
#clock-cells = <0>;
};
rc21012_ufs: clk-rc21012-ufs { rc21012_ufs: clk-rc21012-ufs {
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <38400000>; clock-frequency = <38400000>;
...@@ -106,6 +112,12 @@ gpio_exp_20: gpio@20 { ...@@ -106,6 +112,12 @@ gpio_exp_20: gpio@20 {
reg = <0x20>; reg = <0x20>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
rc21012-gpio2-hog {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
output-high;
};
}; };
}; };
...@@ -145,6 +157,18 @@ &mmc0 { ...@@ -145,6 +157,18 @@ &mmc0 {
status = "okay"; status = "okay";
}; };
&pcie0_clkref {
compatible = "gpio-gate-clock";
clocks = <&rc21012_pci>;
enable-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
/delete-property/ clock-frequency;
};
&pciec0 {
reset-gpio = <&gpio_exp_20 0 GPIO_ACTIVE_LOW>;
status = "okay";
};
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>; pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
......
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