Commit c5ef91ee authored by Linus Torvalds's avatar Linus Torvalds

Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6.24

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6.24:
  sh: Support PCI IO access of SH7780 base boards.
  sh: Fix PCI IO space base address of SH7780.
parents a6733f2e b0d98dc5
...@@ -40,8 +40,8 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) ...@@ -40,8 +40,8 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
static struct resource sh7780_io_resource = { static struct resource sh7780_io_resource = {
.name = "SH7780_IO", .name = "SH7780_IO",
.start = 0x2000, .start = SH7780_PCI_IO_BASE,
.end = 0x2000 + SH7780_PCI_IO_SIZE - 1, .end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO .flags = IORESOURCE_IO
}; };
......
...@@ -43,8 +43,8 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) ...@@ -43,8 +43,8 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
static struct resource se7780_io_resource = { static struct resource se7780_io_resource = {
.name = "SH7780_IO", .name = "SH7780_IO",
.start = 0x2000, .start = SH7780_PCI_IO_BASE,
.end = 0x2000 + SH7780_PCI_IO_SIZE - 1, .end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO .flags = IORESOURCE_IO
}; };
......
...@@ -30,7 +30,7 @@ ...@@ -30,7 +30,7 @@
#define SH7780_PCI_MEMORY_BASE 0xFD000000 /* Memory space base addr */ #define SH7780_PCI_MEMORY_BASE 0xFD000000 /* Memory space base addr */
#define SH7780_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ #define SH7780_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
#define SH7780_PCI_IO_BASE 0xFE400000 /* IO space base address */ #define SH7780_PCI_IO_BASE 0xFE200000 /* IO space base address */
#define SH7780_PCI_IO_SIZE 0x00400000 /* Size of IO window */ #define SH7780_PCI_IO_SIZE 0x00400000 /* Size of IO window */
#define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */ #define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */
......
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