Commit c61200c2 authored by Jordan Justen's avatar Jordan Justen Committed by Daniel Vetter

drm/i915: Add GPGPU_THREADS_DISPATCHED to the register whitelist

This will allow us to read the number of dispatched compute threads
for GL_ARB_pipeline_statistics_query.
Signed-off-by: default avatarJordan Justen <jordan.l.justen@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 71745376
...@@ -405,6 +405,7 @@ static const struct drm_i915_cmd_table hsw_blt_ring_cmds[] = { ...@@ -405,6 +405,7 @@ static const struct drm_i915_cmd_table hsw_blt_ring_cmds[] = {
#define REG64(addr) (addr), (addr + sizeof(u32)) #define REG64(addr) (addr), (addr + sizeof(u32))
static const u32 gen7_render_regs[] = { static const u32 gen7_render_regs[] = {
REG64(GPGPU_THREADS_DISPATCHED),
REG64(HS_INVOCATION_COUNT), REG64(HS_INVOCATION_COUNT),
REG64(DS_INVOCATION_COUNT), REG64(DS_INVOCATION_COUNT),
REG64(IA_VERTICES_COUNT), REG64(IA_VERTICES_COUNT),
...@@ -1153,6 +1154,7 @@ int i915_cmd_parser_get_version(void) ...@@ -1153,6 +1154,7 @@ int i915_cmd_parser_get_version(void)
* hardware parsing enabled (so does not allow new use cases). * hardware parsing enabled (so does not allow new use cases).
* 2. Allow access to the MI_PREDICATE_SRC0 and * 2. Allow access to the MI_PREDICATE_SRC0 and
* MI_PREDICATE_SRC1 registers. * MI_PREDICATE_SRC1 registers.
* 3. Allow access to the GPGPU_THREADS_DISPATCHED register.
*/ */
return 2; return 3;
} }
...@@ -463,6 +463,7 @@ ...@@ -463,6 +463,7 @@
*/ */
#define BCS_SWCTRL 0x22200 #define BCS_SWCTRL 0x22200
#define GPGPU_THREADS_DISPATCHED 0x2290
#define HS_INVOCATION_COUNT 0x2300 #define HS_INVOCATION_COUNT 0x2300
#define DS_INVOCATION_COUNT 0x2308 #define DS_INVOCATION_COUNT 0x2308
#define IA_VERTICES_COUNT 0x2310 #define IA_VERTICES_COUNT 0x2310
......
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