Commit c76f56f2 authored by Alvin Lee's avatar Alvin Lee Committed by Alex Deucher

drm/amd/display: Make sure to reprogram ODM when resync fifo

Need to reconfigure ODM when resyncing FIFO because on OTG disable we
clear all ODM programming
Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: default avatarHamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: default avatarAlvin Lee <alvin.lee2@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5af75712
...@@ -379,8 +379,25 @@ void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc ...@@ -379,8 +379,25 @@ void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc
for (i = 0; i < dc->res_pool->pipe_count; i++) { for (i = 0; i < dc->res_pool->pipe_count; i++) {
pipe = &dc->current_state->res_ctx.pipe_ctx[i]; pipe = &dc->current_state->res_ctx.pipe_ctx[i];
if (otg_disabled[i]) if (otg_disabled[i]) {
int opp_inst[MAX_PIPES] = { pipe->stream_res.opp->inst };
int opp_cnt = 1;
int last_odm_slice_width = resource_get_odm_slice_dst_width(pipe, true);
int odm_slice_width = resource_get_odm_slice_dst_width(pipe, false);
struct pipe_ctx *odm_pipe;
for (odm_pipe = pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) {
opp_inst[opp_cnt] = odm_pipe->stream_res.opp->inst;
opp_cnt++;
}
if (opp_cnt > 1)
pipe->stream_res.tg->funcs->set_odm_combine(
pipe->stream_res.tg,
opp_inst, opp_cnt,
odm_slice_width,
last_odm_slice_width);
pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg); pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);
}
} }
} }
......
...@@ -1237,8 +1237,25 @@ void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_ ...@@ -1237,8 +1237,25 @@ void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_
for (i = 0; i < dc->res_pool->pipe_count; i++) { for (i = 0; i < dc->res_pool->pipe_count; i++) {
pipe = &dc->current_state->res_ctx.pipe_ctx[i]; pipe = &dc->current_state->res_ctx.pipe_ctx[i];
if (otg_disabled[i]) if (otg_disabled[i]) {
int opp_inst[MAX_PIPES] = { pipe->stream_res.opp->inst };
int opp_cnt = 1;
int last_odm_slice_width = resource_get_odm_slice_dst_width(pipe, true);
int odm_slice_width = resource_get_odm_slice_dst_width(pipe, false);
struct pipe_ctx *odm_pipe;
for (odm_pipe = pipe->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) {
opp_inst[opp_cnt] = odm_pipe->stream_res.opp->inst;
opp_cnt++;
}
if (opp_cnt > 1)
pipe->stream_res.tg->funcs->set_odm_combine(
pipe->stream_res.tg,
opp_inst, opp_cnt,
odm_slice_width,
last_odm_slice_width);
pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg); pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);
}
} }
} }
......
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