Commit c7d1f08a authored by Ryo Kataoka's avatar Ryo Kataoka Committed by Simon Horman

ARM: shmobile: r8a7790: Remove MSIOF address from device tree

MSIOF Base Address H'E6xx can be accessed by CPU and DMAC.
MSIOF Base Address H'E7xx for DMAC was removed from H/W manual.
Signed-off-by: default avatarRyo Kataoka <ryo.kataoka.wt@renesas.com>
Signed-off-by: default avatarYoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent b787f68c
...@@ -1273,7 +1273,7 @@ qspi: spi@e6b10000 { ...@@ -1273,7 +1273,7 @@ qspi: spi@e6b10000 {
msiof0: spi@e6e20000 { msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790";
reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>; reg = <0 0xe6e20000 0 0x0064>;
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>; clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>; dmas = <&dmac0 0x51>, <&dmac0 0x52>;
...@@ -1285,7 +1285,7 @@ msiof0: spi@e6e20000 { ...@@ -1285,7 +1285,7 @@ msiof0: spi@e6e20000 {
msiof1: spi@e6e10000 { msiof1: spi@e6e10000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790";
reg = <0 0xe6e10000 0 0x0064>, <0 0xe7e10000 0 0x0064>; reg = <0 0xe6e10000 0 0x0064>;
interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>; clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>; dmas = <&dmac0 0x55>, <&dmac0 0x56>;
...@@ -1297,7 +1297,7 @@ msiof1: spi@e6e10000 { ...@@ -1297,7 +1297,7 @@ msiof1: spi@e6e10000 {
msiof2: spi@e6e00000 { msiof2: spi@e6e00000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790";
reg = <0 0xe6e00000 0 0x0064>, <0 0xe7e00000 0 0x0064>; reg = <0 0xe6e00000 0 0x0064>;
interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>; clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>; dmas = <&dmac0 0x41>, <&dmac0 0x42>;
...@@ -1309,7 +1309,7 @@ msiof2: spi@e6e00000 { ...@@ -1309,7 +1309,7 @@ msiof2: spi@e6e00000 {
msiof3: spi@e6c90000 { msiof3: spi@e6c90000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790";
reg = <0 0xe6c90000 0 0x0064>, <0 0xe7c90000 0 0x0064>; reg = <0 0xe6c90000 0 0x0064>;
interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>; clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
dmas = <&dmac0 0x45>, <&dmac0 0x46>; dmas = <&dmac0 0x45>, <&dmac0 0x46>;
......
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