Commit c7d2ecd9 authored by Joonyoung Shim's avatar Joonyoung Shim Committed by Krzysztof Kozlowski

ARM: dts: Fix wrong clock binding for sysmmu_fimd1_1 on exynos5420

The sysmmu_fimd1_1 should bind the clock CLK_SMMU_FIMD1M1, not the clock
CLK_SMMU_FIMD1M0. CLK_SMMU_FIMD1M0 is a clock for the sysmmu_fimd1_0.

This wrong clock binding causes the problem that is blocked in iommu_map
function when IOMMU is enabled and exynos-drm driver tries to allocate
buffer via DMA mapping API on Odroid-XU3 board.

Fixes: b7004516 ("ARM: dts: add sysmmu nodes for exynos5420")
Signed-off-by: default avatarJoonyoung Shim <jy0922.shim@samsung.com>
Cc: <stable@vger.kernel.org> # v4.2
Reviewed-by: default avatarJavier Martinez Canillas <javier@osg.samsung.com>
Acked-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
parent f404e7a7
...@@ -1117,7 +1117,7 @@ sysmmu_fimd1_1: sysmmu@0x14680000 { ...@@ -1117,7 +1117,7 @@ sysmmu_fimd1_1: sysmmu@0x14680000 {
interrupt-parent = <&combiner>; interrupt-parent = <&combiner>;
interrupts = <3 0>; interrupts = <3 0>;
clock-names = "sysmmu", "master"; clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>; clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>;
power-domains = <&disp_pd>; power-domains = <&disp_pd>;
#iommu-cells = <0>; #iommu-cells = <0>;
}; };
......
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