Commit c832c35f authored by Chun-Hao Lin's avatar Chun-Hao Lin Committed by David S. Miller

r8169:Fix typo in setting RTL8168H PHY PFM mode.

The PHY PFM register is in PHY page 0x0a44 register 0x11, not 0x14.
Signed-off-by: default avatarChunhao Lin <hau@realtek.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 69f3dc37
...@@ -3894,7 +3894,7 @@ static void rtl8168h_1_hw_phy_config(struct rtl8169_private *tp) ...@@ -3894,7 +3894,7 @@ static void rtl8168h_1_hw_phy_config(struct rtl8169_private *tp)
/* disable phy pfm mode */ /* disable phy pfm mode */
rtl_writephy(tp, 0x1f, 0x0a44); rtl_writephy(tp, 0x1f, 0x0a44);
rtl_w0w1_phy(tp, 0x14, 0x0000, 0x0080); rtl_w0w1_phy(tp, 0x11, 0x0000, 0x0080);
rtl_writephy(tp, 0x1f, 0x0000); rtl_writephy(tp, 0x1f, 0x0000);
/* Check ALDPS bit, disable it if enabled */ /* Check ALDPS bit, disable it if enabled */
...@@ -3967,7 +3967,7 @@ static void rtl8168h_2_hw_phy_config(struct rtl8169_private *tp) ...@@ -3967,7 +3967,7 @@ static void rtl8168h_2_hw_phy_config(struct rtl8169_private *tp)
/* disable phy pfm mode */ /* disable phy pfm mode */
rtl_writephy(tp, 0x1f, 0x0a44); rtl_writephy(tp, 0x1f, 0x0a44);
rtl_w0w1_phy(tp, 0x14, 0x0000, 0x0080); rtl_w0w1_phy(tp, 0x11, 0x0000, 0x0080);
rtl_writephy(tp, 0x1f, 0x0000); rtl_writephy(tp, 0x1f, 0x0000);
/* Check ALDPS bit, disable it if enabled */ /* Check ALDPS bit, disable it if enabled */
......
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