Commit c877dff7 authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher

drm/amd/powerplay/smu11: disable some pp features on navi10 A0 secure board

disable DPM UCLK and SOC DS on A0 secure board
Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarKevin Wang <kevin1.wang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fc419158
......@@ -340,6 +340,18 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT);
/* disable DPM UCLK and DS SOCCLK on navi10 A0 secure board */
if (is_asic_secure(smu)) {
/* only for navi10 A0 */
if ((adev->asic_type == CHIP_NAVI10) &&
(adev->rev_id == 0)) {
*(uint64_t *)feature_mask &=
~FEATURE_MASK(FEATURE_DPM_UCLK_BIT);
*(uint64_t *)feature_mask &=
~FEATURE_MASK(FEATURE_DS_SOCCLK_BIT);
}
}
return 0;
}
......
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