Commit c8fdc1b5 authored by Mark Brown's avatar Mark Brown

ASoC: wm8994: Ensure all AIFnCLK events are run from the _late variants

Ensure that all the actions get taken at appropriate times by calling the
_PRE and _POST events for the aifNclk_ev functions explicitly.
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org
parent a1c85ec0
...@@ -1190,17 +1190,19 @@ static int late_enable_ev(struct snd_soc_dapm_widget *w, ...@@ -1190,17 +1190,19 @@ static int late_enable_ev(struct snd_soc_dapm_widget *w,
switch (event) { switch (event) {
case SND_SOC_DAPM_PRE_PMU: case SND_SOC_DAPM_PRE_PMU:
if (wm8994->aif1clk_enable) { if (wm8994->aif1clk_enable) {
aif1clk_ev(w, kcontrol, event); aif1clk_ev(w, kcontrol, SND_SOC_DAPM_PRE_PMU);
snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
WM8994_AIF1CLK_ENA_MASK, WM8994_AIF1CLK_ENA_MASK,
WM8994_AIF1CLK_ENA); WM8994_AIF1CLK_ENA);
aif1clk_ev(w, kcontrol, SND_SOC_DAPM_POST_PMU);
wm8994->aif1clk_enable = 0; wm8994->aif1clk_enable = 0;
} }
if (wm8994->aif2clk_enable) { if (wm8994->aif2clk_enable) {
aif2clk_ev(w, kcontrol, event); aif2clk_ev(w, kcontrol, SND_SOC_DAPM_PRE_PMU);
snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
WM8994_AIF2CLK_ENA_MASK, WM8994_AIF2CLK_ENA_MASK,
WM8994_AIF2CLK_ENA); WM8994_AIF2CLK_ENA);
aif2clk_ev(w, kcontrol, SND_SOC_DAPM_POST_PMU);
wm8994->aif2clk_enable = 0; wm8994->aif2clk_enable = 0;
} }
break; break;
...@@ -1221,15 +1223,17 @@ static int late_disable_ev(struct snd_soc_dapm_widget *w, ...@@ -1221,15 +1223,17 @@ static int late_disable_ev(struct snd_soc_dapm_widget *w,
switch (event) { switch (event) {
case SND_SOC_DAPM_POST_PMD: case SND_SOC_DAPM_POST_PMD:
if (wm8994->aif1clk_disable) { if (wm8994->aif1clk_disable) {
aif1clk_ev(w, kcontrol, SND_SOC_DAPM_PRE_PMD);
snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
WM8994_AIF1CLK_ENA_MASK, 0); WM8994_AIF1CLK_ENA_MASK, 0);
aif1clk_ev(w, kcontrol, event); aif1clk_ev(w, kcontrol, SND_SOC_DAPM_POST_PMD);
wm8994->aif1clk_disable = 0; wm8994->aif1clk_disable = 0;
} }
if (wm8994->aif2clk_disable) { if (wm8994->aif2clk_disable) {
aif2clk_ev(w, kcontrol, SND_SOC_DAPM_PRE_PMD);
snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
WM8994_AIF2CLK_ENA_MASK, 0); WM8994_AIF2CLK_ENA_MASK, 0);
aif2clk_ev(w, kcontrol, event); aif2clk_ev(w, kcontrol, SND_SOC_DAPM_POST_PMD);
wm8994->aif2clk_disable = 0; wm8994->aif2clk_disable = 0;
} }
break; break;
......
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