Commit c9b8da77 authored by Naveen N. Rao's avatar Naveen N. Rao Committed by Michael Ellerman

powerpc/bpf ppc32: Fix ALU32 BPF_ARSH operation

Correct the destination register used for ALU32 BPF_ARSH operation.

Fixes: 51c66ad8 ("powerpc/bpf: Implement extended BPF on PPC32")
Signed-off-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Reviewed-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/6d24c1f9e79b6f61f5135eaf2ea1e8bcd4dac87b.1633464148.git.naveen.n.rao@linux.vnet.ibm.com
parent b7540d62
...@@ -625,7 +625,7 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context * ...@@ -625,7 +625,7 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *
EMIT(PPC_RAW_LI(dst_reg_h, 0)); EMIT(PPC_RAW_LI(dst_reg_h, 0));
break; break;
case BPF_ALU | BPF_ARSH | BPF_X: /* (s32) dst >>= src */ case BPF_ALU | BPF_ARSH | BPF_X: /* (s32) dst >>= src */
EMIT(PPC_RAW_SRAW(dst_reg_h, dst_reg, src_reg)); EMIT(PPC_RAW_SRAW(dst_reg, dst_reg, src_reg));
break; break;
case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */ case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */
bpf_set_seen_register(ctx, tmp_reg); bpf_set_seen_register(ctx, tmp_reg);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment