Commit c9d8230e authored by Tony Lindgren's avatar Tony Lindgren

omap: mux: Remove old mux code

All mach-omap2 omaps should now use the new mux code.
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent f99bf16d
......@@ -18,7 +18,6 @@
#include <plat/common.h>
#include <plat/board.h>
#include <plat/gpmc-smc91x.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <mach/board-zoom.h>
......
......@@ -26,7 +26,6 @@
#include <asm/mach/map.h>
#include <mach/gpio.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <plat/board.h>
#include <plat/common.h>
......
......@@ -25,7 +25,6 @@
#include <linux/mmc/host.h>
#include <plat/mcspi.h>
#include <plat/mux.h>
#include <plat/board.h>
#include <plat/common.h>
#include <plat/dma.h>
......
......@@ -16,7 +16,6 @@
#include <linux/mm.h>
#include <asm/mach-types.h>
#include <plat/mux.h>
#include <plat/display.h>
#include <plat/vram.h>
#include <plat/mcspi.h>
......
......@@ -28,7 +28,6 @@
#include <asm/mach/map.h>
#include <plat/mux.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
#include <plat/gpmc.h>
......@@ -324,7 +323,6 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
omap2430_hwmod_init();
else if (cpu_is_omap34xx())
omap3xxx_hwmod_init();
omap2_mux_init();
/* The OPP tables have to be registered before a clk init */
omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
......
This diff is collapsed.
......@@ -39,7 +39,6 @@
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/control.h>
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/board.h>
......
......@@ -23,7 +23,6 @@
#include <linux/dma-mapping.h>
#include <asm/io.h>
#include <plat/mux.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
......
......@@ -28,7 +28,6 @@
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <plat/mux.h>
#include <plat/usb.h>
#ifdef CONFIG_USB_MUSB_SOC
......
......@@ -114,28 +114,11 @@
PU_PD_REG(NA, 0) \
},
#define MUX_CFG_24XX(desc, reg_offset, mode, \
pull_en, pull_mode, dbg) \
{ \
.name = desc, \
.debug = dbg, \
.mux_reg = reg_offset, \
.mask = mode, \
.pull_val = pull_en, \
.pu_pd_val = pull_mode, \
},
/* 24xx/34xx mux bit defines */
#define OMAP2_PULL_ENA (1 << 3)
#define OMAP2_PULL_UP (1 << 4)
#define OMAP2_ALTELECTRICALSEL (1 << 5)
struct pin_config {
char *name;
const unsigned int mux_reg;
unsigned char debug;
#if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP2)
const unsigned char mask_offset;
const unsigned char mask;
......@@ -147,7 +130,6 @@ struct pin_config {
const char *pu_pd_name;
const unsigned int pu_pd_reg;
const unsigned char pu_pd_val;
#endif
#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
const char *mux_reg_name;
......@@ -446,208 +428,6 @@ enum omap1xxx_index {
};
enum omap24xx_index {
/* 24xx I2C */
M19_24XX_I2C1_SCL,
L15_24XX_I2C1_SDA,
J15_24XX_I2C2_SCL,
H19_24XX_I2C2_SDA,
/* 24xx Menelaus interrupt */
W19_24XX_SYS_NIRQ,
/* 24xx clock */
W14_24XX_SYS_CLKOUT,
/* 24xx GPMC chipselects, wait pin monitoring */
E2_GPMC_NCS2,
L2_GPMC_NCS7,
L3_GPMC_WAIT0,
N7_GPMC_WAIT1,
M1_GPMC_WAIT2,
P1_GPMC_WAIT3,
/* 242X McBSP */
Y15_24XX_MCBSP2_CLKX,
R14_24XX_MCBSP2_FSX,
W15_24XX_MCBSP2_DR,
V15_24XX_MCBSP2_DX,
/* 24xx GPIO */
M21_242X_GPIO11,
P21_242X_GPIO12,
AA10_242X_GPIO13,
AA6_242X_GPIO14,
AA4_242X_GPIO15,
Y11_242X_GPIO16,
AA12_242X_GPIO17,
AA8_242X_GPIO58,
Y20_24XX_GPIO60,
W4__24XX_GPIO74,
N15_24XX_GPIO85,
M15_24XX_GPIO92,
P20_24XX_GPIO93,
P18_24XX_GPIO95,
M18_24XX_GPIO96,
L14_24XX_GPIO97,
J15_24XX_GPIO99,
V14_24XX_GPIO117,
P14_24XX_GPIO125,
/* 242x DBG GPIO */
V4_242X_GPIO49,
W2_242X_GPIO50,
U4_242X_GPIO51,
V3_242X_GPIO52,
V2_242X_GPIO53,
V6_242X_GPIO53,
T4_242X_GPIO54,
Y4_242X_GPIO54,
T3_242X_GPIO55,
U2_242X_GPIO56,
/* 24xx external DMA requests */
AA10_242X_DMAREQ0,
AA6_242X_DMAREQ1,
E4_242X_DMAREQ2,
G4_242X_DMAREQ3,
D3_242X_DMAREQ4,
E3_242X_DMAREQ5,
/* UART3 */
K15_24XX_UART3_TX,
K14_24XX_UART3_RX,
/* MMC/SDIO */
G19_24XX_MMC_CLKO,
H18_24XX_MMC_CMD,
F20_24XX_MMC_DAT0,
H14_24XX_MMC_DAT1,
E19_24XX_MMC_DAT2,
D19_24XX_MMC_DAT3,
F19_24XX_MMC_DAT_DIR0,
E20_24XX_MMC_DAT_DIR1,
F18_24XX_MMC_DAT_DIR2,
E18_24XX_MMC_DAT_DIR3,
G18_24XX_MMC_CMD_DIR,
H15_24XX_MMC_CLKI,
/* Full speed USB */
J20_24XX_USB0_PUEN,
J19_24XX_USB0_VP,
K20_24XX_USB0_VM,
J18_24XX_USB0_RCV,
K19_24XX_USB0_TXEN,
J14_24XX_USB0_SE0,
K18_24XX_USB0_DAT,
N14_24XX_USB1_SE0,
W12_24XX_USB1_SE0,
P15_24XX_USB1_DAT,
R13_24XX_USB1_DAT,
W20_24XX_USB1_TXEN,
P13_24XX_USB1_TXEN,
V19_24XX_USB1_RCV,
V12_24XX_USB1_RCV,
AA10_24XX_USB2_SE0,
Y11_24XX_USB2_DAT,
AA12_24XX_USB2_TXEN,
AA6_24XX_USB2_RCV,
AA4_24XX_USB2_TLLSE0,
/* Keypad GPIO*/
T19_24XX_KBR0,
R19_24XX_KBR1,
V18_24XX_KBR2,
M21_24XX_KBR3,
E5__24XX_KBR4,
M18_24XX_KBR5,
R20_24XX_KBC0,
M14_24XX_KBC1,
H19_24XX_KBC2,
V17_24XX_KBC3,
P21_24XX_KBC4,
L14_24XX_KBC5,
N19_24XX_KBC6,
/* 24xx Menelaus Keypad GPIO */
B3__24XX_KBR5,
AA4_24XX_KBC2,
B13_24XX_KBC6,
/* 2430 USB */
AD9_2430_USB0_PUEN,
Y11_2430_USB0_VP,
AD7_2430_USB0_VM,
AE7_2430_USB0_RCV,
AD4_2430_USB0_TXEN,
AF9_2430_USB0_SE0,
AE6_2430_USB0_DAT,
AD24_2430_USB1_SE0,
AB24_2430_USB1_RCV,
Y25_2430_USB1_TXEN,
AA26_2430_USB1_DAT,
/* 2430 HS-USB */
AD9_2430_USB0HS_DATA3,
Y11_2430_USB0HS_DATA4,
AD7_2430_USB0HS_DATA5,
AE7_2430_USB0HS_DATA6,
AD4_2430_USB0HS_DATA2,
AF9_2430_USB0HS_DATA0,
AE6_2430_USB0HS_DATA1,
AE8_2430_USB0HS_CLK,
AD8_2430_USB0HS_DIR,
AE5_2430_USB0HS_STP,
AE9_2430_USB0HS_NXT,
AC7_2430_USB0HS_DATA7,
/* 2430 McBSP */
AD6_2430_MCBSP_CLKS,
AB2_2430_MCBSP1_CLKR,
AD5_2430_MCBSP1_FSR,
AA1_2430_MCBSP1_DX,
AF3_2430_MCBSP1_DR,
AB3_2430_MCBSP1_FSX,
Y9_2430_MCBSP1_CLKX,
AC10_2430_MCBSP2_FSX,
AD16_2430_MCBSP2_CLX,
AE13_2430_MCBSP2_DX,
AD13_2430_MCBSP2_DR,
AC10_2430_MCBSP2_FSX_OFF,
AD16_2430_MCBSP2_CLX_OFF,
AE13_2430_MCBSP2_DX_OFF,
AD13_2430_MCBSP2_DR_OFF,
AC9_2430_MCBSP3_CLKX,
AE4_2430_MCBSP3_FSX,
AE2_2430_MCBSP3_DR,
AF4_2430_MCBSP3_DX,
N3_2430_MCBSP4_CLKX,
AD23_2430_MCBSP4_DR,
AB25_2430_MCBSP4_DX,
AC25_2430_MCBSP4_FSX,
AE16_2430_MCBSP5_CLKX,
AF12_2430_MCBSP5_FSX,
K7_2430_MCBSP5_DX,
M1_2430_MCBSP5_DR,
/* 2430 McSPI*/
Y18_2430_MCSPI1_CLK,
AD15_2430_MCSPI1_SIMO,
AE17_2430_MCSPI1_SOMI,
U1_2430_MCSPI1_CS0,
/* Touchscreen GPIO */
AF19_2430_GPIO_85,
};
struct omap_mux_cfg {
struct pin_config *pins;
unsigned long size;
......
......@@ -54,7 +54,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
{
struct pin_config *reg;
if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
if (!cpu_class_is_omap1()) {
printk(KERN_ERR "mux: Broken omap_cfg_reg(%lu) entry\n",
index);
WARN_ON(1);
......
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