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Commit cbf3b4c9 authored by Linus Torvalds's avatar Linus Torvalds
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Merge bk://bk.arm.linux.org.uk 

into home.transmeta.com:/home/torvalds/v2.5/linux
parents e85148e6 ab0680db
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Showing with 2181 additions and 604 deletions
arch/arm/Makefile
View file @ cbf3b4c9
......@@ -123,6 +123,10 @@ endif
MACHINE = sa1100
endif
ifeq ($(CONFIG_ARCH_PXA),y)
MACHINE = pxa
endif
ifeq ($(CONFIG_ARCH_L7200),y)
MACHINE = l7200
endif
......
arch/arm/boot/Makefile
View file @ cbf3b4c9
......@@ -87,6 +87,10 @@ ifeq ($(CONFIG_SA1111),y)
endif
endif
ifeq ($(CONFIG_ARCH_PXA),y)
ZRELADDR = 0xa0008000
endif
ifeq ($(CONFIG_ARCH_ANAKIN),y)
ZRELADDR = 0x20008000
endif
......
arch/arm/config.in
View file @ cbf3b4c9
......@@ -26,6 +26,7 @@ choice 'ARM system type' \
Cirrus-CL-PS7500FE CONFIG_ARCH_CLPS7500 \
CLPS711x/EP721x-based CONFIG_ARCH_CLPS711X \
Co-EBSA285 CONFIG_ARCH_CO285 \
PXA250/210-based CONFIG_ARCH_PXA \
EBSA-110 CONFIG_ARCH_EBSA110 \
Epxa10db CONFIG_ARCH_CAMELOT \
FootBridge CONFIG_ARCH_FOOTBRIDGE \
......@@ -125,6 +126,16 @@ dep_tristate ' Support for SA11x0 USB character device emulation' CONFIG_SA1100
dep_tristate 'Compaq iPAQ Handheld sleeve support' CONFIG_H3600_SLEEVE $CONFIG_SA1100_H3600
endmenu
mainmenu_option next_comment
comment 'Intel PXA250/210 Implementations'
dep_bool ' Intel DBPXA250 Development Platform' CONFIG_ARCH_LUBBOCK $CONFIG_ARCH_PXA
dep_bool ' Accelent Xscale IDP' CONFIG_ARCH_PXA_IDP $CONFIG_ARCH_PXA
if [ "$CONFIG_ARCH_LUBBOCK" = "y" ]; then
define_bool CONFIG_SA1111 y
fi
endmenu
mainmenu_option next_comment
comment 'CLPS711X/EP721X Implementations'
dep_bool ' AUTCPU12' CONFIG_ARCH_AUTCPU12 $CONFIG_ARCH_CLPS711X
......@@ -227,7 +238,9 @@ if [ "$CONFIG_ARCH_EBSA110" = "y" -o "$CONFIG_FOOTBRIDGE" = "y" -o \
else
define_bool CONFIG_CPU_32v4 n
fi
if [ "$CONFIG_ARCH_IOP310" = "y" -o "$CONFIG_ARCH_ADIFCC" = "y" ]; then
if [ "$CONFIG_ARCH_IOP310" = "y" -o \
"$CONFIG_ARCH_ADIFCC" = "y" -o \
"$CONFIG_ARCH_PXA" = "y" ]; then
define_bool CONFIG_CPU_32v5 y
else
define_bool CONFIG_CPU_32v5 n
......@@ -317,7 +330,9 @@ else
fi
# XScale
if [ "$CONFIG_ARCH_IOP310" = "y" -o "$CONFIG_ARCH_ADIFCC" = "y" ]; then
if [ "$CONFIG_ARCH_IOP310" = "y" -o \
"$CONFIG_ARCH_ADIFCC" = "y" -o \
"$CONFIG_ARCH_PXA" = "y" ]; then
define_bool CONFIG_CPU_XSCALE y
else
define_bool CONFIG_CPU_XSCALE n
......@@ -467,6 +482,8 @@ if [ "$CONFIG_ARCH_NETWINDER" = "y" -o \
"$CONFIG_ARCH_SHARK" = "y" -o \
"$CONFIG_ARCH_CO285" = "y" -o \
"$CONFIG_ARCH_SA1100" = "y" -o \
"$CONFIG_ARCH_LUBBOCK" = "y" -o \
"$CONFIG_ARCH_PXA_IDP" = "y" -o \
"$CONFIG_ARCH_INTEGRATOR" = "y" -o \
"$CONFIG_ARCH_CDB89712" = "y" -o \
"$CONFIG_ARCH_P720T" = "y" ]; then
......@@ -477,6 +494,8 @@ if [ "$CONFIG_ARCH_NETWINDER" = "y" -o \
"$CONFIG_ARCH_SHARK" = "y" -o \
"$CONFIG_ARCH_CO285" = "y" -o \
"$CONFIG_ARCH_SA1100" = "y" -o \
"$CONFIG_ARCH_LUBBOCK" = "y" -o \
"$CONFIG_ARCH_PXA_IDP" = "y" -o \
"$CONFIG_ARCH_INTEGRATOR" = "y" -o \
"$CONFIG_ARCH_P720T" = "y" ]; then
bool ' Timer LED' CONFIG_LEDS_TIMER
......
arch/arm/def-configs/lubbock 0 → 100644
View file @ cbf3b4c9
#
# Automatically generated make config: don't edit
#
CONFIG_ARM=y
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
CONFIG_UID16=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
# CONFIG_GENERIC_BUST_SPINLOCK is not set
# CONFIG_GENERIC_ISA_DMA is not set
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_NET=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
# CONFIG_KMOD is not set
#
# System Type
#
# CONFIG_ARCH_ADIFCC is not set
# CONFIG_ARCH_ANAKIN is not set
# CONFIG_ARCH_ARCA5K is not set
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
CONFIG_ARCH_PXA=y
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP310 is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_SHARK is not set
#
# Archimedes/A5000 Implementations
#
#
# Archimedes/A5000 Implementations (select only ONE)
#
# CONFIG_ARCH_ARC is not set
# CONFIG_ARCH_A5K is not set
#
# Footbridge Implementations
#
# CONFIG_ARCH_CATS is not set
# CONFIG_ARCH_PERSONAL_SERVER is not set
# CONFIG_ARCH_EBSA285_ADDIN is not set
# CONFIG_ARCH_EBSA285_HOST is not set
# CONFIG_ARCH_NETWINDER is not set
#
# SA11x0 Implementations
#
# CONFIG_SA1100_ASSABET is not set
# CONFIG_ASSABET_NEPONSET is not set
# CONFIG_SA1100_ADSBITSY is not set
# CONFIG_SA1100_BRUTUS is not set
# CONFIG_SA1100_CERF is not set
# CONFIG_SA1100_H3100 is not set
# CONFIG_SA1100_H3600 is not set
# CONFIG_SA1100_H3800 is not set
# CONFIG_SA1100_H3XXX is not set
# CONFIG_SA1100_EXTENEX1 is not set
# CONFIG_SA1100_FLEXANET is not set
# CONFIG_SA1100_FREEBIRD is not set
# CONFIG_SA1100_GRAPHICSCLIENT is not set
# CONFIG_SA1100_GRAPHICSMASTER is not set
# CONFIG_SA1100_BADGE4 is not set
# CONFIG_SA1100_JORNADA720 is not set
# CONFIG_SA1100_HUW_WEBPANEL is not set
# CONFIG_SA1100_ITSY is not set
# CONFIG_SA1100_LART is not set
# CONFIG_SA1100_NANOENGINE is not set
# CONFIG_SA1100_OMNIMETER is not set
# CONFIG_SA1100_PANGOLIN is not set
# CONFIG_SA1100_PLEB is not set
# CONFIG_SA1100_PT_SYSTEM3 is not set
# CONFIG_SA1100_SHANNON is not set
# CONFIG_SA1100_SHERMAN is not set
# CONFIG_SA1100_SIMPAD is not set
# CONFIG_SA1100_PFS168 is not set
# CONFIG_SA1100_VICTOR is not set
# CONFIG_SA1100_XP860 is not set
# CONFIG_SA1100_YOPY is not set
# CONFIG_SA1100_STORK is not set
# CONFIG_SA1100_USB is not set
# CONFIG_SA1100_USB_NETLINK is not set
# CONFIG_SA1100_USB_CHAR is not set
# CONFIG_H3600_SLEEVE is not set
#
# Intel PXA250/210 Implementations
#
CONFIG_ARCH_LUBBOCK=y
# CONFIG_ARCH_PXA_IDP is not set
CONFIG_SA1111=y
#
# CLPS711X/EP721X Implementations
#
# CONFIG_ARCH_AUTCPU12 is not set
# CONFIG_ARCH_CDB89712 is not set
# CONFIG_ARCH_CLEP7312 is not set
# CONFIG_ARCH_EDB7211 is not set
# CONFIG_ARCH_P720T is not set
# CONFIG_ARCH_FORTUNET is not set
# CONFIG_ARCH_EP7211 is not set
# CONFIG_ARCH_EP7212 is not set
#
# IOP310 Implementation Options
#
# CONFIG_ARCH_IQ80310 is not set
#
# IOP310 Chipset Features
#
# CONFIG_IOP310_AAU is not set
# CONFIG_IOP310_DMA is not set
# CONFIG_IOP310_MU is not set
# CONFIG_IOP310_PMON is not set
# CONFIG_ARCH_ACORN is not set
# CONFIG_FOOTBRIDGE is not set
# CONFIG_FOOTBRIDGE_HOST is not set
# CONFIG_FOOTBRIDGE_ADDIN is not set
CONFIG_CPU_32=y
# CONFIG_CPU_26 is not set
#
# Processor Type
#
# CONFIG_CPU_32v3 is not set
# CONFIG_CPU_32v4 is not set
CONFIG_CPU_32v5=y
# CONFIG_CPU_ARM610 is not set
# CONFIG_CPU_ARM710 is not set
# CONFIG_CPU_ARM720T is not set
# CONFIG_CPU_ARM920T is not set
# CONFIG_CPU_ARM922T is not set
# CONFIG_CPU_ARM926T is not set
# CONFIG_CPU_ARM1020 is not set
# CONFIG_CPU_SA110 is not set
# CONFIG_CPU_SA1100 is not set
CONFIG_CPU_XSCALE=y
CONFIG_XSCALE_CACHE_ERRATA=y
CONFIG_XSCALE_PMU=y
#
# Processor Features
#
# CONFIG_ARM_THUMB is not set
#
# General setup
#
# CONFIG_DISCONTIGMEM is not set
# CONFIG_PCI is not set
# CONFIG_ISA is not set
# CONFIG_ISA_DMA is not set
# CONFIG_FIQ is not set
# CONFIG_ZBOOT_ROM is not set
CONFIG_ZBOOT_ROM_TEXT=0
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_HOTPLUG=y
#
# PCMCIA/CardBus support
#
CONFIG_PCMCIA=y
CONFIG_PCMCIA_PROBE=y
# CONFIG_I82092 is not set
# CONFIG_I82365 is not set
# CONFIG_TCIC is not set
# CONFIG_PCMCIA_CLPS6700 is not set
# CONFIG_PCMCIA_SA1100 is not set
CONFIG_PCMCIA_PXA=y
#
# At least one math emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_FASTFPE is not set
CONFIG_KCORE_ELF=y
# CONFIG_KCORE_AOUT is not set
# CONFIG_BINFMT_AOUT is not set
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_PM is not set
# CONFIG_PREEMPT is not set
# CONFIG_APM is not set
# CONFIG_ARTHUR is not set
CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M"
CONFIG_LEDS=y
CONFIG_LEDS_TIMER=y
CONFIG_LEDS_CPU=y
CONFIG_ALIGNMENT_TRAP=y
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_REDBOOT_PARTS=y
# CONFIG_MTD_BOOTLDR_PARTS is not set
# CONFIG_MTD_AFS_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_NOSWAP=y
# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_B1 is not set
# CONFIG_MTD_CFI_B2 is not set
CONFIG_MTD_CFI_B4=y
# CONFIG_MTD_CFI_I1 is not set
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
# CONFIG_MTD_AMDSTD is not set
# CONFIG_MTD_SHARP is not set
# CONFIG_MTD_JEDEC is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_NORA is not set
# CONFIG_MTD_ARM_INTEGRATOR is not set
# CONFIG_MTD_CDB89712 is not set
# CONFIG_MTD_SA1100 is not set
# CONFIG_MTD_2PARTS_IPAQ is not set
# CONFIG_MTD_DC21285 is not set
# CONFIG_MTD_IQ80310 is not set
CONFIG_MTD_LUBBOCK=y
# CONFIG_MTD_EPXA10DB is not set
# CONFIG_MTD_FORTUNET is not set
# CONFIG_MTD_PCI is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC1000 is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOCPROBE is not set
#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set
# CONFIG_PNPBIOS is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_CISS_SCSI_TAPE is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set
#
# Networking options
#
# CONFIG_PACKET is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
#
#
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
#
# Appletalk devices
#
# CONFIG_DEV_APPLETALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network device support
#
CONFIG_NETDEVICES=y
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_ARM_AM79C961A is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
CONFIG_NET_VENDOR_SMC=y
# CONFIG_WD80x3 is not set
# CONFIG_ULTRAMCA is not set
# CONFIG_ULTRA is not set
# CONFIG_ULTRA32 is not set
CONFIG_SMC9194=y
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
#
# PCMCIA network device support
#
CONFIG_NET_PCMCIA=y
# CONFIG_PCMCIA_3C589 is not set
# CONFIG_PCMCIA_3C574 is not set
# CONFIG_PCMCIA_FMVJ18X is not set
CONFIG_PCMCIA_PCNET=y
# CONFIG_PCMCIA_NMCLAN is not set
# CONFIG_PCMCIA_SMC91C92 is not set
# CONFIG_PCMCIA_XIRC2PS is not set
# CONFIG_PCMCIA_AXNET is not set
# CONFIG_ARCNET_COM20020_CS is not set
# CONFIG_PCMCIA_IBMTR is not set
# CONFIG_NET_PCMCIA_RADIO is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_HD is not set
#
# SCSI support
#
# CONFIG_SCSI is not set
#
# I2O device support
#
# CONFIG_I2O is not set
# CONFIG_I2O_BLOCK is not set
# CONFIG_I2O_LAN is not set
# CONFIG_I2O_SCSI is not set
# CONFIG_I2O_PROC is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_GAMEPORT_NS558 is not set
# CONFIG_GAMEPORT_L4 is not set
# CONFIG_INPUT_EMU10K1 is not set
# CONFIG_GAMEPORT_PCIGAME is not set
# CONFIG_GAMEPORT_FM801 is not set
# CONFIG_GAMEPORT_CS461x is not set
# CONFIG_SERIO is not set
# CONFIG_SERIO_SERPORT is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_JOYSTICK_ANALOG is not set
# CONFIG_JOYSTICK_A3D is not set
# CONFIG_JOYSTICK_ADI is not set
# CONFIG_JOYSTICK_COBRA is not set
# CONFIG_JOYSTICK_GF2K is not set
# CONFIG_JOYSTICK_GRIP is not set
# CONFIG_JOYSTICK_INTERACT is not set
# CONFIG_JOYSTICK_SIDEWINDER is not set
# CONFIG_JOYSTICK_TMDC is not set
# CONFIG_JOYSTICK_IFORCE_USB is not set
# CONFIG_JOYSTICK_IFORCE_232 is not set
# CONFIG_JOYSTICK_WARRIOR is not set
# CONFIG_JOYSTICK_MAGELLAN is not set
# CONFIG_JOYSTICK_SPACEORB is not set
# CONFIG_JOYSTICK_SPACEBALL is not set
# CONFIG_JOYSTICK_STINGER is not set
# CONFIG_JOYSTICK_DB9 is not set
# CONFIG_JOYSTICK_GAMECON is not set
# CONFIG_JOYSTICK_TURBOGRAFX is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_CS is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SERIAL_8250_MANY_PORTS is not set
# CONFIG_SERIAL_8250_SHARE_IRQ is not set
# CONFIG_SERIAL_8250_DETECT_IRQ is not set
# CONFIG_SERIAL_8250_MULTIPORT is not set
# CONFIG_SERIAL_8250_RSA is not set
#
# Non-8250 serial port support
#
# CONFIG_ATOMWIDE_SERIAL is not set
# CONFIG_DUALSP_SERIAL is not set
# CONFIG_SERIAL_ANAKIN is not set
# CONFIG_SERIAL_ANAKIN_CONSOLE is not set
# CONFIG_SERIAL_AMBA is not set
# CONFIG_SERIAL_AMBA_CONSOLE is not set
# CONFIG_SERIAL_CLPS711X is not set
# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
# CONFIG_SERIAL_CLPS711X_OLD_NAME is not set
# CONFIG_SERIAL_21285 is not set
# CONFIG_SERIAL_21285_OLD is not set
# CONFIG_SERIAL_21285_CONSOLE is not set
# CONFIG_SERIAL_UART00 is not set
# CONFIG_SERIAL_UART00_CONSOLE is not set
# CONFIG_SERIAL_SA1100 is not set
# CONFIG_SERIAL_SA1100_CONSOLE is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# L3 serial bus support
#
# CONFIG_L3 is not set
# CONFIG_L3_ALGOBIT is not set
# CONFIG_L3_BIT_SA1100_GPIO is not set
#
# Other L3 adapters
#
# CONFIG_L3_SA1111 is not set
# CONFIG_BIT_SA1100_GPIO is not set
#
# Mice
#
CONFIG_BUSMOUSE=y
# CONFIG_ATIXL_BUSMOUSE is not set
# CONFIG_LOGIBUSMOUSE is not set
# CONFIG_MS_BUSMOUSE is not set
CONFIG_MOUSE=y
CONFIG_PSMOUSE=y
# CONFIG_82C710_MOUSE is not set
# CONFIG_PC110_PAD is not set
# CONFIG_QIC02_TAPE is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
#
# PCMCIA character devices
#
# CONFIG_SYNCLINK_CS is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_QFMT_V1 is not set
# CONFIG_QFMT_V2 is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_JBD_DEBUG is not set
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
# CONFIG_JFFS2_FS_NAND is not set
# CONFIG_CRAMFS is not set
# CONFIG_TMPFS is not set
CONFIG_RAMFS=y
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_ZISOFS is not set
# CONFIG_JFS_FS is not set
# CONFIG_JFS_DEBUG is not set
# CONFIG_JFS_STATISTICS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_DEBUG is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set
#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_EXPORTFS is not set
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
# CONFIG_ZISOFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
# CONFIG_SMB_NLS is not set
CONFIG_NLS=y
#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Sound
#
CONFIG_SOUND=y
#
# Open Sound System
#
CONFIG_SOUND_PRIME=y
# CONFIG_SOUND_BT878 is not set
# CONFIG_SOUND_CMPCI is not set
# CONFIG_SOUND_EMU10K1 is not set
# CONFIG_MIDI_EMU10K1 is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_CS4281 is not set
# CONFIG_SOUND_ES1370 is not set
# CONFIG_SOUND_ES1371 is not set
# CONFIG_SOUND_ESSSOLO1 is not set
# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUND_MAESTRO3 is not set
# CONFIG_SOUND_ICH is not set
# CONFIG_SOUND_RME96XX is not set
# CONFIG_SOUND_SONICVIBES is not set
# CONFIG_SOUND_TRIDENT is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_MIDI_VIA82CXXX is not set
# CONFIG_SOUND_OSS is not set
# CONFIG_SOUND_WAVEARTIST is not set
# CONFIG_SOUND_PXA_AC97 is not set
# CONFIG_SOUND_TVMIXER is not set
#
# Advanced Linux Sound Architecture
#
# CONFIG_SND is not set
#
# Multimedia Capabilities Port drivers
#
# CONFIG_MCP is not set
# CONFIG_MCP_SA1100 is not set
# CONFIG_MCP_UCB1200 is not set
# CONFIG_MCP_UCB1200_AUDIO is not set
# CONFIG_MCP_UCB1200_TS is not set
# CONFIG_MCP_UCB1400_TS is not set
#
# Console Switches
#
# CONFIG_SWITCHES is not set
#
# USB support
#
# CONFIG_USB is not set
#
# Bluetooth support
#
# CONFIG_BLUEZ is not set
#
# Kernel hacking
#
# CONFIG_NO_FRAME_POINTER is not set
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SLAB is not set
CONFIG_MAGIC_SYSRQ=y
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_DC21285_PORT is not set
# CONFIG_DEBUG_CLPS711X_UART2 is not set
#
# Library routines
#
CONFIG_CRC32=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
arch/arm/kernel/debug.S
View file @ cbf3b4c9
......@@ -216,7 +216,7 @@
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x40000000 @ physical
movne \rx, #0xfc000000 @ virtual
movne \rx, #io_p2v(0x40000000) @ virtual
orr \rx, \rx, #0x00100000
.endm
......
arch/arm/kernel/dma-isa.c
View file @ cbf3b4c9
......@@ -133,10 +133,10 @@ static void isa_disable_dma(dmach_t channel, dma_t *dma)
}
static struct dma_ops isa_dma_ops = {
type: "ISA",
enable: isa_enable_dma,
disable: isa_disable_dma,
residue: isa_get_dma_residue,
.type = "ISA",
.enable = isa_enable_dma,
.disable = isa_disable_dma,
.residue = isa_get_dma_residue,
};
static struct resource dma_resources[] = {
......
arch/arm/kernel/ecard.c
View file @ cbf3b4c9
......@@ -407,7 +407,7 @@ static int ecard_reboot(struct notifier_block *me, unsigned long val, void *v)
}
static struct notifier_block ecard_reboot_notifier = {
notifier_call: ecard_reboot,
.notifier_call = ecard_reboot,
};
......@@ -571,9 +571,9 @@ static void ecard_irq_mask(unsigned int irqnr)
}
static struct irqchip ecard_chip = {
ack: ecard_irq_mask,
mask: ecard_irq_mask,
unmask: ecard_irq_unmask,
.ack = ecard_irq_mask,
.mask = ecard_irq_mask,
.unmask = ecard_irq_unmask,
};
void ecard_enablefiq(unsigned int fiqnr)
......
arch/arm/kernel/entry-armo.S
View file @ cbf3b4c9
......@@ -244,7 +244,7 @@ vector_prefetch:
tst lr, #3
bne __pabt_invalid
save_user_regs
teqp pc, #0x00000003 @ NOT a problem - doesnt change mode
teqp pc, #0x00000003 @ NOT a problem - doesn't change mode
mask_pc r0, lr @ Address of abort
mov r1, sp @ Tasks registers
bl do_PrefetchAbort
......@@ -295,7 +295,7 @@ Laddrexcptn_not_user:
and r2, lr, #3
teq r2, #3
bne Laddrexcptn_illegal_mode
teqp pc, #0x00000003 @ NOT a problem - doesnt change mode
teqp pc, #0x00000003 @ NOT a problem - doesn't change mode
mask_pc r0, lr
mov r1, sp
orr r2, r2, #0x400
......@@ -399,7 +399,7 @@ vector_data: sub lr, lr, #8 @ Correct lr
tst lr, #3
bne Ldata_not_user
save_user_regs
teqp pc, #0x00000003 @ NOT a problem - doesnt change mode
teqp pc, #0x00000003 @ NOT a problem - doesn't change mode
mask_pc r0, lr
bl Ldata_do
b ret_from_exception
......@@ -410,7 +410,7 @@ Ldata_not_user:
teq r2, #3
bne Ldata_illegal_mode
tst lr, #0x08000000
teqeqp pc, #0x00000003 @ NOT a problem - doesnt change mode
teqeqp pc, #0x00000003 @ NOT a problem - doesn't change mode
mask_pc r0, lr
bl Ldata_do
SVC_RESTORE_ALL
......
arch/arm/kernel/entry-armv.S
View file @ cbf3b4c9
......@@ -590,7 +590,7 @@ ENTRY(anakin_active_irqs)
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \base, #0xfc000000 @ IIR Ctl = 0xfcd00000
mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000
add \base, \base, #0x00d00000
ldr \irqstat, [\base, #0] @ ICIP
ldr \irqnr, [\base, #4] @ ICMR
......
arch/arm/kernel/fiq.c
View file @ cbf3b4c9
......@@ -87,8 +87,8 @@ static int fiq_def_op(void *ref, int relinquish)
}
static struct fiq_handler default_owner = {
name: "default",
fiq_op: fiq_def_op,
.name = "default",
.fiq_op = fiq_def_op,
};
static struct fiq_handler *current_fiq = &default_owner;
......
arch/arm/kernel/irq.c
View file @ cbf3b4c9
......@@ -64,15 +64,15 @@ void do_bad_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
}
static struct irqchip bad_chip = {
ack: dummy_mask_unmask_irq,
mask: dummy_mask_unmask_irq,
unmask: dummy_mask_unmask_irq,
.ack = dummy_mask_unmask_irq,
.mask = dummy_mask_unmask_irq,
.unmask = dummy_mask_unmask_irq,
};
static struct irqdesc bad_irq_desc = {
chip: &bad_chip,
handle: do_bad_IRQ,
depth: 1,
.chip = &bad_chip,
.handle = do_bad_IRQ,
.depth = 1,
};
/**
......
arch/arm/kernel/setup.c
View file @ cbf3b4c9
......@@ -803,8 +803,8 @@ static void c_stop(struct seq_file *m, void *v)
}
struct seq_operations cpuinfo_op = {
start: c_start,
next: c_next,
stop: c_stop,
show: c_show
.start = c_start,
.next = c_next,
.stop = c_stop,
.show = c_show
};
arch/arm/kernel/time.c
View file @ cbf3b4c9
......@@ -205,7 +205,7 @@ void do_settimeofday(struct timeval *tv)
}
static struct irqaction timer_irq = {
name: "timer",
.name = "timer",
};
/*
......
arch/arm/mach-anakin/irq.c
View file @ cbf3b4c9
......@@ -49,9 +49,9 @@ anakin_interrupt(int irq, void *dev_id, struct pt_regs *regs)
}
static struct irqaction anakin_irq = {
name: "Anakin IRQ",
handler: anakin_interrupt,
flags: SA_INTERRUPT
.name = "Anakin IRQ",
.handler = anakin_interrupt,
.flags = SA_INTERRUPT
};
void __init
......
arch/arm/mach-arc/dma.c
View file @ cbf3b4c9
......@@ -110,23 +110,23 @@ static void arc_disable_dma(dmach_t channel, dma_t *dma)
}
static struct dma_ops arc_floppy_data_dma_ops = {
type: "FIQDMA",
enable: arc_floppy_data_enable_dma,
disable: arc_disable_dma,
residue: arc_floppy_data_get_dma_residue,
.type = "FIQDMA",
.enable = arc_floppy_data_enable_dma,
.disable = arc_disable_dma,
.residue = arc_floppy_data_get_dma_residue,
};
static struct dma_ops arc_floppy_cmdend_dma_ops = {
type: "FIQCMD",
enable: arc_floppy_cmdend_enable_dma,
disable: arc_disable_dma,
residue: arc_floppy_cmdend_get_dma_residue,
.type = "FIQCMD",
.enable = arc_floppy_cmdend_enable_dma,
.disable = arc_disable_dma,
.residue = arc_floppy_cmdend_get_dma_residue,
};
#endif
#ifdef CONFIG_ARCH_A5K
static struct fiq_handler fh = {
name: "floppydata"
.name = "floppydata"
};
static int a5k_floppy_get_dma_residue(dmach_t channel, dma_t *dma)
......@@ -175,10 +175,10 @@ static void a5k_floppy_disable_dma(dmach_t channel, dma_t *dma)
}
static struct dma_ops a5k_floppy_dma_ops = {
type: "FIQDMA",
enable: a5k_floppy_enable_dma,
disable: a5k_floppy_disable_dma,
residue: a5k_floppy_get_dma_residue,
.type = "FIQDMA",
.enable = a5k_floppy_enable_dma,
.disable = a5k_floppy_disable_dma,
.residue = a5k_floppy_get_dma_residue,
};
#endif
......@@ -190,9 +190,9 @@ static void sound_enable_disable_dma(dmach_t channel, dma_t *dma)
}
static struct dma_ops sound_dma_ops = {
type: "VIRTUAL",
enable: sound_enable_disable_dma,
disable: sound_enable_disable_dma,
.type = "VIRTUAL",
.enable = sound_enable_disable_dma,
.disable = sound_enable_disable_dma,
};
void __init arch_dma_init(dma_t *dma)
......
arch/arm/mach-clps711x/irq.c
View file @ cbf3b4c9
......@@ -63,9 +63,9 @@ static void int1_unmask(unsigned int irq)
}
static struct irqchip int1_chip = {
ack: int1_ack,
mask: int1_mask,
unmask: int1_unmask,
.ack = int1_ack,
.mask = int1_mask,
.unmask = int1_unmask,
};
static void int2_mask(unsigned int irq)
......@@ -100,9 +100,9 @@ static void int2_unmask(unsigned int irq)
}
static struct irqchip int2_chip = {
ack: int2_ack,
mask: int2_mask,
unmask: int2_unmask,
.ack = int2_ack,
.mask = int2_mask,
.unmask = int2_unmask,
};
void __init clps711x_init_irq(void)
......
arch/arm/mach-ebsa110/core.c
View file @ cbf3b4c9
......@@ -42,9 +42,9 @@ static void ebsa110_unmask_irq(unsigned int irq)
}
static struct irqchip ebsa110_irq_chip = {
ack: ebsa110_mask_irq,
mask: ebsa110_mask_irq,
unmask: ebsa110_unmask_irq,
.ack = ebsa110_mask_irq,
.mask = ebsa110_mask_irq,
.unmask = ebsa110_unmask_irq,
};
static void __init ebsa110_init_irq(void)
......
arch/arm/mach-epxa10db/irq.c
View file @ cbf3b4c9
......@@ -39,15 +39,15 @@ static void epxa_unmask_irq(unsigned int irq)
static struct irqchip epxa_irq_chip = {
ack: epxa_mask_irq,
mask: epxa_mask_irq,
unmask: epxa_unmask_irq,
.ack = epxa_mask_irq,
.mask = epxa_mask_irq,
.unmask = epxa_unmask_irq,
};
static struct resource irq_resource = {
name: "irq_handler",
start: IO_ADDRESS(EXC_INT_CTRL00_BASE),
end: IO_ADDRESS(INT_PRIORITY_FC(EXC_INT_CTRL00_BASE))+4,
.name = "irq_handler",
.start = IO_ADDRESS(EXC_INT_CTRL00_BASE),
.end = IO_ADDRESS(INT_PRIORITY_FC(EXC_INT_CTRL00_BASE))+4,
};
void __init epxa10db_init_irq(void)
......
arch/arm/mach-footbridge/cats-pci.c
View file @ cbf3b4c9
......@@ -36,13 +36,13 @@ static int __init cats_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
* cards being used (ie, pci-pci bridge based cards)?
*/
static struct hw_pci cats_pci __initdata = {
swizzle: NULL,
map_irq: cats_map_irq,
nr_controllers: 1,
setup: dc21285_setup,
scan: dc21285_scan_bus,
preinit: dc21285_preinit,
postinit: dc21285_postinit,
.swizzle = NULL,
.map_irq = cats_map_irq,
.nr_controllers = 1,
.setup = dc21285_setup,
.scan = dc21285_scan_bus,
.preinit = dc21285_preinit,
.postinit = dc21285_postinit,
};
static int cats_pci_init(void)
......
arch/arm/mach-footbridge/dma.c
View file @ cbf3b4c9
......@@ -35,10 +35,10 @@ static void fb_dma_disable(dmach_t channel, dma_t *dma)
}
static struct dma_ops fb_dma_ops = {
type: "fb",
request: fb_dma_request,
enable: fb_dma_enable,
disable: fb_dma_disable,
.type = "fb",
.request = fb_dma_request,
.enable = fb_dma_enable,
.disable = fb_dma_disable,
};
#endif
......
arch/arm/mach-footbridge/ebsa285-pci.c
View file @ cbf3b4c9
......@@ -29,13 +29,13 @@ static int __init ebsa285_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
}
static struct hw_pci ebsa285_pci __initdata = {
swizzle: pci_std_swizzle,
map_irq: ebsa285_map_irq,
nr_controllers: 1,
setup: dc21285_setup,
scan: dc21285_scan_bus,
preinit: dc21285_preinit,
postinit: dc21285_postinit,
.swizzle = pci_std_swizzle,
.map_irq = ebsa285_map_irq,
.nr_controllers = 1,
.setup = dc21285_setup,
.scan = dc21285_scan_bus,
.preinit = dc21285_preinit,
.postinit = dc21285_postinit,
};
static int __init ebsa285_init_pci(void)
......
arch/arm/mach-footbridge/irq.c
View file @ cbf3b4c9
......@@ -67,9 +67,9 @@ static void fb_unmask_irq(unsigned int irq)
}
static struct irqchip fb_chip = {
ack: fb_mask_irq,
mask: fb_mask_irq,
unmask: fb_unmask_irq,
.ack = fb_mask_irq,
.mask = fb_mask_irq,
.unmask = fb_unmask_irq,
};
static void __init __fb_init_irq(void)
......
arch/arm/mach-footbridge/isa-irq.c
View file @ cbf3b4c9
......@@ -50,9 +50,9 @@ static void isa_unmask_pic_lo_irq(unsigned int irq)
}
static struct irqchip isa_lo_chip = {
ack: isa_ack_pic_lo_irq,
mask: isa_mask_pic_lo_irq,
unmask: isa_unmask_pic_lo_irq,
.ack = isa_ack_pic_lo_irq,
.mask = isa_mask_pic_lo_irq,
.unmask = isa_unmask_pic_lo_irq,
};
static void isa_mask_pic_hi_irq(unsigned int irq)
......@@ -79,9 +79,9 @@ static void isa_unmask_pic_hi_irq(unsigned int irq)
}
static struct irqchip isa_hi_chip = {
ack: isa_ack_pic_hi_irq,
mask: isa_mask_pic_hi_irq,
unmask: isa_unmask_pic_hi_irq,
.ack = isa_ack_pic_hi_irq,
.mask = isa_mask_pic_hi_irq,
.unmask = isa_unmask_pic_hi_irq,
};
static void no_action(int irq, void *dev_id, struct pt_regs *regs)
......
arch/arm/mach-footbridge/netwinder-pci.c
View file @ cbf3b4c9
......@@ -43,13 +43,13 @@ static int __init netwinder_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
}
static struct hw_pci netwinder_pci __initdata = {
swizzle: pci_std_swizzle,
map_irq: netwinder_map_irq,
nr_controllers: 1,
setup: dc21285_setup,
scan: dc21285_scan_bus,
preinit: dc21285_preinit,
postinit: dc21285_postinit,
.swizzle = pci_std_swizzle,
.map_irq = netwinder_map_irq,
.nr_controllers = 1,
.setup = dc21285_setup,
.scan = dc21285_scan_bus,
.preinit = dc21285_preinit,
.postinit = dc21285_postinit,
};
static int __init netwinder_pci_init(void)
......
arch/arm/mach-footbridge/personal-pci.c
View file @ cbf3b4c9
......@@ -38,12 +38,12 @@ static int __init personal_server_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
}
static struct hw_pci personal_server_pci __initdata = {
map_irq: personal_server_map_irq,
nr_controllers: 1,
setup: dc21285_setup,
scan: dc21285_scan_bus,
preinit: dc21285_preinit,
postinit: dc21285_postinit,
.map_irq = personal_server_map_irq,
.nr_controllers = 1,
.setup = dc21285_setup,
.scan = dc21285_scan_bus,
.preinit = dc21285_preinit,
.postinit = dc21285_postinit,
};
static int __init personal_pci_init(void)
......
arch/arm/mach-ftvpci/pci.c
View file @ cbf3b4c9
......@@ -45,9 +45,9 @@ static u8 __init ftv_swizzle(struct pci_dev *dev, u8 *pin)
/* ftv host-specific stuff */
static struct hw_pci ftv_pci __initdata = {
init: plx90x0_init,
swizzle: ftv_swizzle,
map_irq: ftv_map_irq,
.init = plx90x0_init,
.swizzle = ftv_swizzle,
.map_irq = ftv_map_irq,
};
static int __init ftv_pci_init(void)
......
arch/arm/mach-integrator/arch.c
View file @ cbf3b4c9
......@@ -36,17 +36,17 @@ extern void integrator_init_irq(void);
#ifdef CONFIG_KMI_KEYB
static struct kmi_info integrator_keyboard __initdata = {
base: IO_ADDRESS(KMI0_BASE),
irq: IRQ_KMIINT0,
divisor: 24 / 8 - 1,
type: KMI_KEYBOARD,
.base = IO_ADDRESS(KMI0_BASE),
.irq = IRQ_KMIINT0,
.divisor = 24 / 8 - 1,
.type = KMI_KEYBOARD,
};
static struct kmi_info integrator_mouse __initdata = {
base: IO_ADDRESS(KMI1_BASE),
irq: IRQ_KMIINT1,
divisor: 24 / 8 - 1,
type: KMI_MOUSE,
.base = IO_ADDRESS(KMI1_BASE),
.irq = IRQ_KMIINT1,
.divisor = 24 / 8 - 1,
.type = KMI_MOUSE,
};
#endif
......
arch/arm/mach-integrator/irq.c
View file @ cbf3b4c9
......@@ -48,9 +48,9 @@ static void sc_unmask_irq(unsigned int irq)
}
static struct irqchip sc_chip = {
ack: sc_mask_irq,
mask: sc_mask_irq,
unmask: sc_unmask_irq,
.ack = sc_mask_irq,
.mask = sc_mask_irq,
.unmask = sc_unmask_irq,
};
void __init integrator_init_irq(void)
......
arch/arm/mach-integrator/pci.c
View file @ cbf3b4c9
......@@ -114,13 +114,13 @@ static int __init integrator_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
extern void pci_v3_init(void *);
static struct hw_pci integrator_pci __initdata = {
swizzle: integrator_swizzle,
map_irq: integrator_map_irq,
setup: pci_v3_setup,
nr_controllers: 1,
scan: pci_v3_scan_bus,
preinit: pci_v3_preinit,
postinit: pci_v3_postinit,
.swizzle = integrator_swizzle,
.map_irq = integrator_map_irq,
.setup = pci_v3_setup,
.nr_controllers = 1,
.scan = pci_v3_scan_bus,
.preinit = pci_v3_preinit,
.postinit = pci_v3_postinit,
};
static int __init integrator_pci_init(void)
......
arch/arm/mach-integrator/pci_v3.c
View file @ cbf3b4c9
......@@ -382,26 +382,26 @@ static int v3_write_config_dword(struct pci_dev *dev, int where, u32 val)
}
static struct pci_ops pci_v3_ops = {
read_byte: v3_read_config_byte,
read_word: v3_read_config_word,
read_dword: v3_read_config_dword,
write_byte: v3_write_config_byte,
write_word: v3_write_config_word,
write_dword: v3_write_config_dword,
.read_byte = v3_read_config_byte,
.read_word = v3_read_config_word,
.read_dword = v3_read_config_dword,
.write_byte = v3_write_config_byte,
.write_word = v3_write_config_word,
.write_dword = v3_write_config_dword,
};
static struct resource non_mem = {
name: "PCI non-prefetchable",
start: PHYS_PCI_MEM_BASE + PCI_BUS_NONMEM_START,
end: PHYS_PCI_MEM_BASE + PCI_BUS_NONMEM_START + PCI_BUS_NONMEM_SIZE - 1,
flags: IORESOURCE_MEM,
.name = "PCI non-prefetchable",
.start = PHYS_PCI_MEM_BASE + PCI_BUS_NONMEM_START,
.end = PHYS_PCI_MEM_BASE + PCI_BUS_NONMEM_START + PCI_BUS_NONMEM_SIZE - 1,
.flags = IORESOURCE_MEM,
};
static struct resource pre_mem = {
name: "PCI prefetchable",
start: PHYS_PCI_MEM_BASE + PCI_BUS_PREMEM_START,
end: PHYS_PCI_MEM_BASE + PCI_BUS_PREMEM_START + PCI_BUS_PREMEM_SIZE - 1,
flags: IORESOURCE_MEM | IORESOURCE_PREFETCH,
.name = "PCI prefetchable",
.start = PHYS_PCI_MEM_BASE + PCI_BUS_PREMEM_START,
.end = PHYS_PCI_MEM_BASE + PCI_BUS_PREMEM_START + PCI_BUS_PREMEM_SIZE - 1,
.flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
};
static int __init pci_v3_setup_resources(struct resource **resource)
......
arch/arm/mach-iop310/iop310-irq.c
View file @ cbf3b4c9
......@@ -58,9 +58,9 @@ static void iop310_irq_unmask (unsigned int irq)
}
struct irqchip ext_chip = {
ack: iop310_irq_mask,
mask: iop310_irq_mask,
unmask: iop310_irq_unmask,
.ack = iop310_irq_mask,
.mask = iop310_irq_mask,
.unmask = iop310_irq_unmask,
};
void
......
arch/arm/mach-iop310/iq80310-irq.c
View file @ cbf3b4c9
......@@ -41,9 +41,9 @@ static void iq80310_irq_unmask(unsigned int irq)
}
static struct irqchip iq80310_irq_chip = {
ack: iq80310_irq_mask,
mask: iq80310_irq_mask,
unmask: iq80310_irq_unmask,
.ack = iq80310_irq_mask,
.mask = iq80310_irq_mask,
.unmask = iq80310_irq_unmask,
};
extern struct irqchip ext_chip;
......
arch/arm/mach-iop310/iq80310-pci.c
View file @ cbf3b4c9
......@@ -147,11 +147,11 @@ static void iq80310_preinit(void)
}
static struct hw_pci iq80310_pci __initdata = {
swizzle: pci_std_swizzle,
nr_controllers: 2,
setup: iq80310_setup,
scan: iop310_scan_bus,
preinit: iq80310_preinit,
.swizzle = pci_std_swizzle,
.nr_controllers = 2,
.setup = iq80310_setup,
.scan = iop310_scan_bus,
.preinit = iq80310_preinit,
};
static int __init iq80310_pci_init(void)
......
arch/arm/mach-iop310/iq80310-time.c
View file @ cbf3b4c9
......@@ -119,8 +119,8 @@ static void iq80310_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
extern unsigned long (*gettimeoffset)(void);
static struct irqaction timer_irq = {
name: "timer",
handler: iq80310_timer_interrupt,
.name = "timer",
.handler = iq80310_timer_interrupt,
};
......
arch/arm/mach-iop310/xs80200-irq.c
View file @ cbf3b4c9
......@@ -47,9 +47,9 @@ static void xs80200_irq_unmask (unsigned int irq)
}
static struct irqchip xs80200_chip = {
ack: xs80200_irq_mask,
mask: xs80200_irq_mask,
unmask: xs80200_irq_unmask,
.ack = xs80200_irq_mask,
.mask = xs80200_irq_mask,
.unmask = xs80200_irq_unmask,
};
void __init xs80200_init_irq(void)
......
arch/arm/mach-pxa/Makefile
View file @ cbf3b4c9
......@@ -29,4 +29,7 @@ leds-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o
obj-$(CONFIG_LEDS) += $(leds-y)
# Misc features
obj-$(CONFIG_PM) += pm.o sleep.o
include $(TOPDIR)/Rules.make
arch/arm/mach-pxa/generic.c
View file @ cbf3b4c9
......@@ -91,9 +91,10 @@ static struct map_desc standard_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xf6000000, 0x20000000, 0x01000000, MT_DEVICE }, /* PCMCIA0 IO */
{ 0xf7000000, 0x30000000, 0x01000000, MT_DEVICE }, /* PCMCIA1 IO */
{ 0xfc000000, 0x40000000, 0x01400000, MT_DEVICE }, /* Devs */
{ 0xfe000000, 0x44000000, 0x00200000, MT_DEVICE }, /* LCD */
{ 0xff000000, 0x48000000, 0x00200000, MT_DEVICE } /* Mem Ctl */
{ 0xf8000000, 0x40000000, 0x01400000, MT_DEVICE }, /* Devs */
{ 0xfa000000, 0x44000000, 0x00100000, MT_DEVICE }, /* LCD */
{ 0xfc000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Mem Ctl */
{ 0xff000000, 0x00000000, 0x00100000, MT_DEVICE } /* UNCACHED_PHYS_0 */
};
void __init pxa_map_io(void)
......
arch/arm/mach-pxa/irq.c
View file @ cbf3b4c9
......@@ -40,9 +40,9 @@ static void pxa_unmask_irq(unsigned int irq)
}
static struct irqchip pxa_internal_chip = {
ack: pxa_mask_irq,
mask: pxa_mask_irq,
unmask: pxa_unmask_irq,
.ack = pxa_mask_irq,
.mask = pxa_mask_irq,
.unmask = pxa_unmask_irq,
};
/*
......@@ -109,11 +109,11 @@ static void pxa_ack_low_gpio(unsigned int irq)
}
static struct irqchip pxa_low_gpio_chip = {
ack: pxa_ack_low_gpio,
mask: pxa_mask_irq,
unmask: pxa_unmask_irq,
rerun: pxa_manual_rerun,
type: pxa_gpio_irq_type,
.ack = pxa_ack_low_gpio,
.mask = pxa_mask_irq,
.unmask = pxa_unmask_irq,
.rerun = pxa_manual_rerun,
.type = pxa_gpio_irq_type,
};
/*
......@@ -201,11 +201,11 @@ static void pxa_unmask_muxed_gpio(unsigned int irq)
}
static struct irqchip pxa_muxed_gpio_chip = {
ack: pxa_ack_muxed_gpio,
mask: pxa_mask_muxed_gpio,
unmask: pxa_unmask_muxed_gpio,
rerun: pxa_manual_rerun,
type: pxa_gpio_irq_type,
.ack = pxa_ack_muxed_gpio,
.mask = pxa_mask_muxed_gpio,
.unmask = pxa_unmask_muxed_gpio,
.rerun = pxa_manual_rerun,
.type = pxa_gpio_irq_type,
};
......
arch/arm/mach-pxa/lubbock.c
View file @ cbf3b4c9
......@@ -54,9 +54,9 @@ static void lubbock_unmask_irq(unsigned int irq)
}
static struct irqchip lubbock_irq_chip = {
ack: lubbock_ack_irq,
mask: lubbock_mask_irq,
unmask: lubbock_unmask_irq,
.ack = lubbock_ack_irq,
.mask = lubbock_mask_irq,
.unmask = lubbock_unmask_irq,
};
void lubbock_irq_handler(unsigned int irq, struct irqdesc *desc,
......@@ -142,11 +142,20 @@ static void __init lubbock_map_io(void)
/* This is for the SMC chip select */
pxa_gpio_mode(GPIO79_nCS_3_MD);
/* setup sleep mode values */
PWER = 0x00000002;
PFER = 0x00000000;
PRER = 0x00000002;
PGSR0 = 0x00008000;
PGSR1 = 0x003F0202;
PGSR2 = 0x0001C000;
PCFR |= PCFR_OPDE;
}
MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform")
MAINTAINER("MontaVista Software Inc.")
BOOT_MEM(0xa0000000, 0x40000000, 0xfc000000)
BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
MAPIO(lubbock_map_io)
INITIRQ(lubbock_init_irq)
MACHINE_END
arch/arm/mach-pxa/pm.c 0 → 100644
View file @ cbf3b4c9
/*
* PXA250/210 Power Management Routines
*
* Original code for the SA11x0:
* Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
*
* Modified for the PXA250 by Nicolas Pitre:
* Copyright (c) 2002 Monta Vista Software, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/sysctl.h>
#include <linux/errno.h>
#include <asm/hardware.h>
#include <asm/memory.h>
#include <asm/system.h>
#include <asm/leds.h>
/*
* Debug macros
*/
#undef DEBUG
extern void pxa_cpu_suspend(void);
extern void pxa_cpu_resume(void);
#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
/*
* List of global PXA peripheral registers to preserve.
* More ones like CP and general purpose register values are preserved
* with the stack pointer in sleep.S.
*/
enum { SLEEP_SAVE_START = 0,
SLEEP_SAVE_OSCR, SLEEP_SAVE_OIER,
SLEEP_SAVE_OSMR0, SLEEP_SAVE_OSMR1, SLEEP_SAVE_OSMR2, SLEEP_SAVE_OSMR3,
SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2,
SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2,
SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2,
SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR2_L,
SLEEP_SAVE_GAFR0_U, SLEEP_SAVE_GAFR1_U, SLEEP_SAVE_GAFR2_U,
SLEEP_SAVE_FFIER, SLEEP_SAVE_FFLCR, SLEEP_SAVE_FFMCR,
SLEEP_SAVE_FFSPR, SLEEP_SAVE_FFISR,
SLEEP_SAVE_FFDLL, SLEEP_SAVE_FFDLH,
SLEEP_SAVE_ICMR,
SLEEP_SAVE_CKEN,
SLEEP_SAVE_CKSUM,
SLEEP_SAVE_SIZE
};
int pm_do_suspend(void)
{
unsigned long sleep_save[SLEEP_SAVE_SIZE];
unsigned long checksum = 0;
int i;
cli();
clf();
leds_event(led_stop);
/* preserve current time */
RCNR = xtime.tv_sec;
/*
* Temporary solution. This won't be necessary once
* we move pxa support into the serial/* driver
* Save the FF UART
*/
SAVE(FFIER);
SAVE(FFLCR);
SAVE(FFMCR);
SAVE(FFSPR);
SAVE(FFISR);
FFLCR |= 0x80;
SAVE(FFDLL);
SAVE(FFDLH);
FFLCR &= 0xef;
/* save vital registers */
SAVE(OSCR);
SAVE(OSMR0);
SAVE(OSMR1);
SAVE(OSMR2);
SAVE(OSMR3);
SAVE(OIER);
SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
SAVE(GAFR0_L); SAVE(GAFR0_U);
SAVE(GAFR1_L); SAVE(GAFR1_U);
SAVE(GAFR2_L); SAVE(GAFR2_U);
SAVE(ICMR);
ICMR = 0;
SAVE(CKEN);
CKEN = 0;
/* Note: wake up source are set up in each machine specific files */
/* clear GPIO transition detect bits */
GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
/* Clear sleep reset status */
RCSR = RCSR_SMR;
/* set resume return address */
PSPR = virt_to_phys(pxa_cpu_resume);
/* before sleeping, calculate and save a checksum */
for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
checksum += sleep_save[i];
sleep_save[SLEEP_SAVE_CKSUM] = checksum;
/* *** go zzz *** */
pxa_cpu_suspend();
/* after sleeping, validate the checksum */
checksum = 0;
for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
checksum += sleep_save[i];
/* if invalid, display message and wait for a hardware reset */
if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) {
#ifdef CONFIG_ARCH_LUBBOCK
LUB_HEXLED = 0xbadbadc5;
#endif
while (1);
}
/* ensure not to come back here if it wasn't intended */
PSPR = 0;
/* restore registers */
RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
RESTORE(GAFR0_L); RESTORE(GAFR0_U);
RESTORE(GAFR1_L); RESTORE(GAFR1_U);
RESTORE(GAFR2_L); RESTORE(GAFR2_U);
PSSR = PSSR_PH;
RESTORE(OSMR0);
RESTORE(OSMR1);
RESTORE(OSMR2);
RESTORE(OSMR3);
RESTORE(OSCR);
RESTORE(OIER);
RESTORE(CKEN);
ICLR = 0;
ICCR = 1;
RESTORE(ICMR);
/*
* Temporary solution. This won't be necessary once
* we move pxa support into the serial/* driver.
* Restore the FF UART.
*/
RESTORE(FFMCR);
RESTORE(FFSPR);
RESTORE(FFLCR);
FFLCR |= 0x80;
RESTORE(FFDLH);
RESTORE(FFDLL);
RESTORE(FFLCR);
RESTORE(FFISR);
FFFCR = 0x07;
RESTORE(FFIER);
/* restore current time */
xtime.tv_sec = RCNR;
#ifdef DEBUG
printk(KERN_DEBUG "*** made it back from resume\n");
#endif
leds_event(led_start);
sti();
return 0;
}
unsigned long sleep_phys_sp(void *sp)
{
return virt_to_phys(sp);
}
#ifdef CONFIG_SYSCTL
/*
* ARGH! ACPI people defined CTL_ACPI in linux/acpi.h rather than
* linux/sysctl.h.
*
* This means our interface here won't survive long - it needs a new
* interface. Quick hack to get this working - use sysctl id 9999.
*/
#warning ACPI broke the kernel, this interface needs to be fixed up.
#define CTL_ACPI 9999
#define ACPI_S1_SLP_TYP 19
/*
* Send us to sleep.
*/
static int sysctl_pm_do_suspend(void)
{
int retval;
retval = pm_send_all(PM_SUSPEND, (void *)3);
if (retval == 0) {
retval = pm_do_suspend();
pm_send_all(PM_RESUME, (void *)0);
}
return retval;
}
static struct ctl_table pm_table[] =
{
{ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, (proc_handler *)&sysctl_pm_do_suspend},
{0}
};
static struct ctl_table pm_dir_table[] =
{
{CTL_ACPI, "pm", NULL, 0, 0555, pm_table},
{0}
};
/*
* Initialize power interface
*/
static int __init pm_init(void)
{
register_sysctl_table(pm_dir_table, 1);
return 0;
}
__initcall(pm_init);
#endif
arch/arm/mach-pxa/sleep.S 0 → 100644
View file @ cbf3b4c9
/*
* Low-level PXA250/210 sleep/wakeUp support
*
* Initial SA1110 code:
* Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
*
* Adapted for PXA by Nicolas Pitre:
* Copyright (c) 2002 Monta Vista Software, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License.
*/
#include <linux/config.h>
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/hardware.h>
.text
/*
* pxa_cpu_suspend()
*
* Forces CPU into sleep state
*/
ENTRY(pxa_cpu_suspend)
mra r2, r3, acc0
stmfd sp!, {r2 - r12, lr} @ save registers on stack
@ get coprocessor registers
mrc p15, 0, r4, c15, c1, 0 @ CP access reg
mrc p15, 0, r5, c13, c0, 0 @ PID
mrc p15, 0, r6, c3, c0, 0 @ domain ID
mrc p15, 0, r7, c2, c0, 0 @ translation table base addr
mrc p15, 0, r8, c1, c1, 0 @ auxiliary control reg
mrc p15, 0, r9, c1, c0, 0 @ control reg
@ store them plus current virtual stack ptr on stack
mov r10, sp
stmfd sp!, {r4 - r10}
@ preserve phys address of stack
mov r0, sp
bl sleep_phys_sp
ldr r1, =sleep_save_sp
str r0, [r1]
@ clean data cache
bl cpu_xscale_cache_clean_invalidate_all
@ Put the processor to sleep
@ (also workaround for sighting 28071)
@ prepare value for sleep mode
mov r1, #3 @ sleep mode
@ prepare to put SDRAM into self-refresh manually
ldr r4, =MDREFR
ldr r5, [r4]
orr r5, r5, #MDREFR_SLFRSH
@ prepare pointer to physical address 0 (virtual mapping in generic.c)
mov r2, #UNCACHED_PHYS_0
@ align execution to a cache line
b 1f
.ltorg
.align 5
1:
@ All needed values are now in registers.
@ These last instructions should be in cache
@ put SDRAM into self-refresh
str r5, [r4]
@ force address lines low by reading at physical address 0
ldr r3, [r2]
@ enter sleep mode
mcr p14, 0, r1, c7, c0, 0
20: nop
b 20b @ loop waiting for sleep
/*
* cpu_pxa_resume()
*
* entry point from bootloader into kernel during resume
*
* Note: Yes, part of the following code is located into the .data section.
* This is to allow sleep_save_sp to be accessed with a relative load
* while we can't rely on any MMU translation. We could have put
* sleep_save_sp in the .text section as well, but some setups might
* insist on it to be truely read-only.
*/
.data
.align 5
ENTRY(pxa_cpu_resume)
mov r0, #I_BIT | F_BIT | MODE_SVC @ set SVC, irqs off
msr cpsr_c, r0
ldr r0, sleep_save_sp @ stack phys addr
ldr r2, =resume_after_mmu @ its absolute virtual address
ldmfd r0, {r4 - r9, sp} @ CP regs + virt stack ptr
mov r1, #0
mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs
mcr p15, 0, r1, c7, c7, 0 @ invalidate I & D caches, BTB
#ifdef CONFIG_XSCALE_CACHE_ERRATA
bic r9, r9, #0x0004 @ see cpu_xscale_proc_init
#endif
mcr p15, 0, r4, c15, c1, 0 @ CP access reg
mcr p15, 0, r5, c13, c0, 0 @ PID
mcr p15, 0, r6, c3, c0, 0 @ domain ID
mcr p15, 0, r7, c2, c0, 0 @ translation table base addr
mcr p15, 0, r8, c1, c1, 0 @ auxiliary control reg
b resume_turn_on_mmu @ cache align execution
.align 5
resume_turn_on_mmu:
mcr p15, 0, r9, c1, c0, 0 @ turn on MMU, caches, etc.
@ Let us ensure we jump to resume_after_mmu only when the mcr above
@ actually took effect. They call it the "cpwait" operation.
mrc p15, 0, r1, c2, c0, 0 @ queue a dependency on CP15
sub pc, r2, r1, lsr #32 @ jump to virtual addr
nop
nop
nop
sleep_save_sp:
.word 0 @ preserve stack phys ptr here
.text
resume_after_mmu:
#ifdef CONFIG_XSCALE_CACHE_ERRATA
bl cpu_xscale_proc_init
#endif
ldmfd sp!, {r2, r3}
mar acc0, r2, r3
ldmfd sp!, {r4 - r12, pc} @ return to caller
arch/arm/mach-rpc/dma.c
View file @ cbf3b4c9
......@@ -216,16 +216,16 @@ static int iomd_set_dma_speed(dmach_t channel, dma_t *dma, int cycle)
}
static struct dma_ops iomd_dma_ops = {
type: "IOMD",
request: iomd_request_dma,
free: iomd_free_dma,
enable: iomd_enable_dma,
disable: iomd_disable_dma,
setspeed: iomd_set_dma_speed,
.type = "IOMD",
.request = iomd_request_dma,
.free = iomd_free_dma,
.enable = iomd_enable_dma,
.disable = iomd_disable_dma,
.setspeed = iomd_set_dma_speed,
};
static struct fiq_handler fh = {
name: "floppydma"
.name = "floppydma"
};
static void floppy_enable_dma(dmach_t channel, dma_t *dma)
......@@ -275,10 +275,10 @@ static int floppy_get_residue(dmach_t channel, dma_t *dma)
}
static struct dma_ops floppy_dma_ops = {
type: "FIQDMA",
enable: floppy_enable_dma,
disable: floppy_disable_dma,
residue: floppy_get_residue,
.type = "FIQDMA",
.enable = floppy_enable_dma,
.disable = floppy_disable_dma,
.residue = floppy_get_residue,
};
/*
......@@ -289,9 +289,9 @@ static void sound_enable_disable_dma(dmach_t channel, dma_t *dma)
}
static struct dma_ops sound_dma_ops = {
type: "VIRTUAL",
enable: sound_enable_disable_dma,
disable: sound_enable_disable_dma,
.type = "VIRTUAL",
.enable = sound_enable_disable_dma,
.disable = sound_enable_disable_dma,
};
void __init arch_dma_init(dma_t *dma)
......
arch/arm/mach-rpc/irq.c
View file @ cbf3b4c9
......@@ -34,9 +34,9 @@ static void iomd_unmask_irq_a(unsigned int irq)
}
static struct irqchip iomd_a_chip = {
ack: iomd_ack_irq_a,
mask: iomd_mask_irq_a,
unmask: iomd_unmask_irq_a,
.ack = iomd_ack_irq_a,
.mask = iomd_mask_irq_a,
.unmask = iomd_unmask_irq_a,
};
static void iomd_mask_irq_b(unsigned int irq)
......@@ -58,9 +58,9 @@ static void iomd_unmask_irq_b(unsigned int irq)
}
static struct irqchip iomd_b_chip = {
ack: iomd_mask_irq_b,
mask: iomd_mask_irq_b,
unmask: iomd_unmask_irq_b,
.ack = iomd_mask_irq_b,
.mask = iomd_mask_irq_b,
.unmask = iomd_unmask_irq_b,
};
static void iomd_mask_irq_dma(unsigned int irq)
......@@ -82,9 +82,9 @@ static void iomd_unmask_irq_dma(unsigned int irq)
}
static struct irqchip iomd_dma_chip = {
ack: iomd_mask_irq_dma,
mask: iomd_mask_irq_dma,
unmask: iomd_unmask_irq_dma,
.ack = iomd_mask_irq_dma,
.mask = iomd_mask_irq_dma,
.unmask = iomd_unmask_irq_dma,
};
static void iomd_mask_irq_fiq(unsigned int irq)
......@@ -106,9 +106,9 @@ static void iomd_unmask_irq_fiq(unsigned int irq)
}
static struct irqchip iomd_fiq_chip = {
ack: iomd_mask_irq_fiq,
mask: iomd_mask_irq_fiq,
unmask: iomd_unmask_irq_fiq,
.ack = iomd_mask_irq_fiq,
.mask = iomd_mask_irq_fiq,
.unmask = iomd_unmask_irq_fiq,
};
void __init rpc_init_irq(void)
......
arch/arm/mach-sa1100/adsbitsy.c
View file @ cbf3b4c9
......@@ -100,7 +100,7 @@ static int adsbitsy_uart_open(struct uart_port *port, struct uart_info *info)
}
static struct sa1100_port_fns adsbitsy_port_fns __initdata = {
open: adsbitsy_uart_open,
.open = adsbitsy_uart_open,
};
static void __init adsbitsy_map_io(void)
......
arch/arm/mach-sa1100/assabet.c
View file @ cbf3b4c9
......@@ -254,9 +254,9 @@ static u_int assabet_get_mctrl(struct uart_port *port)
}
static struct sa1100_port_fns assabet_port_fns __initdata = {
set_mctrl: assabet_set_mctrl,
get_mctrl: assabet_get_mctrl,
pm: assabet_uart_pm,
.set_mctrl = assabet_set_mctrl,
.get_mctrl = assabet_get_mctrl,
.pm = assabet_uart_pm,
};
static struct map_desc assabet_io_desc[] __initdata = {
......
arch/arm/mach-sa1100/cpu-sa1100.c
View file @ cbf3b4c9
......@@ -216,7 +216,7 @@ static int sa1100_dram_notifier(struct notifier_block *nb,
static struct notifier_block sa1100_dram_block = {
notifier_call: sa1100_dram_notifier,
.notifier_call = sa1100_dram_notifier,
};
......
arch/arm/mach-sa1100/cpu-sa1110.c
View file @ cbf3b4c9
......@@ -51,53 +51,53 @@ struct sdram_info {
};
static struct sdram_params tc59sm716_cl2_params __initdata = {
rows: 12,
tck: 10,
trcd: 20,
trp: 20,
twr: 10,
refresh: 64000,
cas_latency: 2,
.rows = 12,
.tck = 10,
.trcd = 20,
.trp = 20,
.twr = 10,
.refresh = 64000,
.cas_latency = 2,
};
static struct sdram_params tc59sm716_cl3_params __initdata = {
rows: 12,
tck: 8,
trcd: 20,
trp: 20,
twr: 8,
refresh: 64000,
cas_latency: 3,
.rows = 12,
.tck = 8,
.trcd = 20,
.trp = 20,
.twr = 8,
.refresh = 64000,
.cas_latency = 3,
};
static struct sdram_params samsung_k4s641632d_tc75 __initdata = {
rows: 14,
tck: 9,
trcd: 27,
trp: 20,
twr: 9,
refresh: 64000,
cas_latency: 3,
.rows = 14,
.tck = 9,
.trcd = 27,
.trp = 20,
.twr = 9,
.refresh = 64000,
.cas_latency = 3,
};
static struct sdram_params samsung_km416s4030ct __initdata = {
rows: 13,
tck: 8,
trcd: 24, /* 3 CLKs */
trp: 24, /* 3 CLKs */
twr: 16, /* Trdl: 2 CLKs */
refresh: 64000,
cas_latency: 3,
.rows = 13,
.tck = 8,
.trcd = 24, /* 3 CLKs */
.trp = 24, /* 3 CLKs */
.twr = 16, /* Trdl: 2 CLKs */
.refresh = 64000,
.cas_latency = 3,
};
static struct sdram_params wbond_w982516ah75l_cl3_params __initdata = {
rows: 16,
tck: 8,
trcd: 20,
trp: 20,
twr: 8,
refresh: 64000,
cas_latency: 3,
.rows = 16,
.tck = 8,
.trcd = 20,
.trp = 20,
.twr = 8,
.refresh = 64000,
.cas_latency = 3,
};
static struct sdram_params sdram_params;
......
arch/arm/mach-sa1100/generic.c
View file @ cbf3b4c9
......@@ -84,7 +84,7 @@ unsigned int sa11x0_getspeed(void)
/*
* We still need to provide this so building without cpufreq works.
*/
unsigned int cpufreq_get(int cpu)
unsigned int cpufreq_get(unsigned int cpu)
{
return cclk_frequency_100khz[PPCR & 0xf] * 100;
}
......
arch/arm/mach-sa1100/graphicsclient.c
View file @ cbf3b4c9
......@@ -67,9 +67,9 @@ static void gc_unmask_irq1(unsigned int irq)
}
static struct irqchip gc_irq1_chip = {
ack: gc_mask_irq1,
mask: gc_mask_irq1,
unmask: gc_unmask_irq1,
.ack = gc_mask_irq1,
.mask = gc_mask_irq1,
.unmask = gc_unmask_irq1,
};
static void gc_mask_irq2(unsigned int irq)
......@@ -85,9 +85,9 @@ static void gc_unmask_irq2(unsigned int irq)
}
static struct irqchip gc_irq2_chip = {
ack: gc_mask_irq2,
mask: gc_mask_irq2,
unmask: gc_unmask_irq2,
.ack = gc_mask_irq2,
.mask = gc_mask_irq2,
.unmask = gc_unmask_irq2,
};
static void __init graphicsclient_init_irq(void)
......@@ -178,9 +178,9 @@ graphicsclient_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
}
static struct sa1100_port_fns graphicsclient_port_fns __initdata = {
get_mctrl: graphicsclient_get_mctrl,
set_mctrl: graphicsclient_set_mctrl,
pm: graphicsclient_uart_pm,
.get_mctrl = graphicsclient_get_mctrl,
.set_mctrl = graphicsclient_set_mctrl,
.pm = graphicsclient_uart_pm,
};
static void __init graphicsclient_map_io(void)
......
arch/arm/mach-sa1100/graphicsmaster.c
View file @ cbf3b4c9
......@@ -100,9 +100,9 @@ static void gm_unmask_irq1(unsigned int irq)
}
static struct irqchip gm_irq1_chip = {
ack: gm_mask_irq1,
mask: gm_mask_irq1,
unmask: gm_unmask_irq1,
.ack = gm_mask_irq1,
.mask = gm_mask_irq1,
.unmask = gm_unmask_irq1,
};
static void gm_mask_irq2(unsigned int irq)
......@@ -118,9 +118,9 @@ static void gm_unmask_irq2(unsigned int irq)
}
static struct irqchip gm_irq2_chip = {
ack: gm_mask_irq2,
mask: gm_mask_irq2,
unmask: gm_unmask_irq2,
.ack = gm_mask_irq2,
.mask = gm_mask_irq2,
.unmask = gm_unmask_irq2,
};
static void __init graphicsmaster_init_irq(void)
......@@ -236,9 +236,9 @@ graphicsmaster_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
}
static struct sa1100_port_fns graphicsmaster_port_fns __initdata = {
get_mctrl: graphicsmaster_get_mctrl,
set_mctrl: graphicsmaster_set_mctrl,
pm: graphicsmaster_uart_pm,
.get_mctrl = graphicsmaster_get_mctrl,
.set_mctrl = graphicsmaster_set_mctrl,
.pm = graphicsmaster_uart_pm,
};
static void __init graphicsmaster_map_io(void)
......
arch/arm/mach-sa1100/h3600.c
View file @ cbf3b4c9
......@@ -428,10 +428,10 @@ static int h3600_uart_set_wake(struct uart_port *port, u_int enable)
}
static struct sa1100_port_fns h3600_port_fns __initdata = {
set_mctrl: h3600_uart_set_mctrl,
get_mctrl: h3600_uart_get_mctrl,
pm: h3600_uart_pm,
set_wake: h3600_uart_set_wake,
.set_mctrl = h3600_uart_set_mctrl,
.get_mctrl = h3600_uart_get_mctrl,
.pm = h3600_uart_pm,
.set_wake = h3600_uart_set_wake,
};
static struct map_desc h3600_io_desc[] __initdata = {
......
arch/arm/mach-sa1100/irq.c
View file @ cbf3b4c9
......@@ -95,11 +95,11 @@ static void sa1100_low_gpio_unmask(unsigned int irq)
}
static struct irqchip sa1100_low_gpio_chip = {
ack: sa1100_low_gpio_ack,
mask: sa1100_low_gpio_mask,
unmask: sa1100_low_gpio_unmask,
rerun: sa1100_manual_rerun,
type: sa1100_gpio_type,
.ack = sa1100_low_gpio_ack,
.mask = sa1100_low_gpio_mask,
.unmask = sa1100_low_gpio_unmask,
.rerun = sa1100_manual_rerun,
.type = sa1100_gpio_type,
};
/*
......@@ -169,11 +169,11 @@ static void sa1100_high_gpio_unmask(unsigned int irq)
}
static struct irqchip sa1100_high_gpio_chip = {
ack: sa1100_high_gpio_ack,
mask: sa1100_high_gpio_mask,
unmask: sa1100_high_gpio_unmask,
rerun: sa1100_manual_rerun,
type: sa1100_gpio_type,
.ack = sa1100_high_gpio_ack,
.mask = sa1100_high_gpio_mask,
.unmask = sa1100_high_gpio_unmask,
.rerun = sa1100_manual_rerun,
.type = sa1100_gpio_type,
};
/*
......@@ -191,16 +191,16 @@ static void sa1100_unmask_irq(unsigned int irq)
}
static struct irqchip sa1100_normal_chip = {
ack: sa1100_mask_irq,
mask: sa1100_mask_irq,
unmask: sa1100_unmask_irq,
.ack = sa1100_mask_irq,
.mask = sa1100_mask_irq,
.unmask = sa1100_unmask_irq,
/* rerun should never be called */
};
static struct resource irq_resource = {
name: "irqs",
start: 0x90050000,
end: 0x9005ffff,
.name = "irqs",
.start = 0x90050000,
.end = 0x9005ffff,
};
void __init sa1100_init_irq(void)
......
arch/arm/mach-sa1100/neponset.c
View file @ cbf3b4c9
......@@ -26,8 +26,8 @@
#include "sa1111.h"
static struct device neponset_device = {
name: "Neponset",
bus_id: "nep_bus",
.name = "Neponset",
.bus_id = "nep_bus",
};
/*
......@@ -159,8 +159,8 @@ static u_int neponset_get_mctrl(struct uart_port *port)
}
static struct sa1100_port_fns neponset_port_fns __initdata = {
set_mctrl: neponset_set_mctrl,
get_mctrl: neponset_get_mctrl,
.set_mctrl = neponset_set_mctrl,
.get_mctrl = neponset_get_mctrl,
};
static int __init neponset_init(void)
......
arch/arm/mach-sa1100/sa1111.c
View file @ cbf3b4c9
......@@ -133,11 +133,11 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
}
static struct irqchip sa1111_low_chip = {
ack: sa1111_ack_lowirq,
mask: sa1111_mask_lowirq,
unmask: sa1111_unmask_lowirq,
rerun: sa1111_rerun_lowirq,
type: sa1111_type_lowirq,
.ack = sa1111_ack_lowirq,
.mask = sa1111_mask_lowirq,
.unmask = sa1111_unmask_lowirq,
.rerun = sa1111_rerun_lowirq,
.type = sa1111_type_lowirq,
};
static void sa1111_ack_highirq(unsigned int irq)
......@@ -198,11 +198,11 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
}
static struct irqchip sa1111_high_chip = {
ack: sa1111_ack_highirq,
mask: sa1111_mask_highirq,
unmask: sa1111_unmask_highirq,
rerun: sa1111_rerun_highirq,
type: sa1111_type_highirq,
.ack = sa1111_ack_highirq,
.mask = sa1111_mask_highirq,
.unmask = sa1111_unmask_highirq,
.rerun = sa1111_rerun_highirq,
.type = sa1111_type_highirq,
};
static void __init sa1111_init_irq(int irq_nr)
......@@ -257,8 +257,8 @@ static int sa1111_resume(struct device *dev, u32 level)
}
static struct device_driver sa1111_device_driver = {
suspend: sa1111_suspend,
resume: sa1111_resume,
.suspend = sa1111_suspend,
.resume = sa1111_resume,
};
/**
......
arch/arm/mach-sa1100/simpad.c
View file @ cbf3b4c9
......@@ -57,7 +57,7 @@ static void simpad_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
}
static struct sa1100_port_fns simpad_port_fns __initdata = {
pm: simpad_uart_pm,
.pm = simpad_uart_pm,
};
static void __init simpad_map_io(void)
......
arch/arm/mach-sa1100/system3.c
View file @ cbf3b4c9
......@@ -100,13 +100,13 @@ static struct map_desc system3_io_desc[] __initdata = {
};
static struct sa1100_port_fns system3_port_fns __initdata = {
set_mctrl: system3_set_mctrl,
get_mctrl: system3_get_mctrl,
pm: system3_uart_pm,
.set_mctrl = system3_set_mctrl,
.get_mctrl = system3_get_mctrl,
.pm = system3_uart_pm,
};
static struct notifier_block system3_clkchg_block = {
notifier_call: sdram_notifier,
.notifier_call = sdram_notifier,
};
/**********************************************************************
......
arch/arm/mach-shark/irq.c
View file @ cbf3b4c9
......@@ -69,9 +69,9 @@ static void bogus_int(int irq, void *dev_id, struct pt_regs *regs)
static struct irqaction cascade;
static struct irqchip fb_chip = {
ack: shark_ack_8259A_irq,
mask: shark_disable_8259A_irq,
unmask: shark_enable_8259A_irq,
.ack = shark_ack_8259A_irq,
.mask = shark_disable_8259A_irq,
.unmask = shark_enable_8259A_irq,
};
void __init shark_init_irq(void)
......
arch/arm/mach-shark/pci.c
View file @ cbf3b4c9
......@@ -24,12 +24,12 @@ static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
extern void __init via82c505_preinit(void *sysdata);
static struct hw_pci shark_pci __initdata = {
setup: via82c505_setup,
swizzle: pci_std_swizzle,
map_irq: shark_map_irq,
nr_controllers: 1,
scan: via82c505_scan_bus,
preinit: via82c505_preinit
.setup = via82c505_setup,
.swizzle = pci_std_swizzle,
.map_irq = shark_map_irq,
.nr_controllers = 1,
.scan = via82c505_scan_bus,
.preinit = via82c505_preinit
};
static int __init shark_pci_init(void)
......
arch/arm/mm/fault.h
View file @ cbf3b4c9
......@@ -6,3 +6,5 @@ void show_pte(struct mm_struct *mm, unsigned long addr);
int do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
int do_translation_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
unsigned long search_exception_table(unsigned long addr);
arch/arm/mm/proc-xscale.S
View file @ cbf3b4c9
......@@ -156,7 +156,7 @@ ENTRY(cpu_xscale_reset)
msr cpsr_c, r1 @ reset CPSR
mrc p15, 0, r1, c1, c0, 0 @ ctrl register
bic r1, r1, #0x0086 @ ........B....CA.
bic r1, r1, #0x1900 @ ...IZ..S........
bic r1, r1, #0x3900 @ ..VIZ..S........
mcr p15, 0, r1, c1, c0, 0 @ ctrl register
mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB
bic r1, r1, #0x0001 @ ...............M
......
drivers/acorn/block/fd1772.c
View file @ cbf3b4c9
......@@ -379,21 +379,21 @@ static void do_fd_request(request_queue_t *);
/************************* End of Prototypes **************************/
static struct timer_list motor_off_timer = {
function: fd_motor_off_timer,
.function = fd_motor_off_timer,
};
#ifdef TRACKBUFFER
static struct timer_list readtrack_timer = {
function: fd_readtrack_check,
.function = fd_readtrack_check,
};
#endif
static struct timer_list timeout_timer = {
function: fd_times_out,
.function = fd_times_out,
};
static struct timer_list fd_timer = {
function: check_change,
.function = check_change,
};
/* DAG: Haven't got a clue what this is? */
......@@ -1548,11 +1548,11 @@ static int floppy_release(struct inode *inode, struct file *filp)
static struct block_device_operations floppy_fops =
{
open: floppy_open,
release: floppy_release,
ioctl: fd_ioctl,
check_media_change: check_floppy_change,
revalidate: floppy_revalidate,
.open = floppy_open,
.release = floppy_release,
.ioctl = fd_ioctl,
.check_media_change = check_floppy_change,
.revalidate = floppy_revalidate,
};
......
drivers/acorn/block/mfmhd.c
View file @ cbf3b4c9
......@@ -1255,25 +1255,25 @@ void xd_set_geometry(struct block_device *bdev, unsigned char secsptrack,
static struct gendisk mfm_gendisk[2] = {
{
major: MAJOR_NR,
first_minor: 0,
major_name: "mfm",
minor_shift: 6,
part: mfm,
.major = MAJOR_NR,
.first_minor = 0,
.major_name = "mfm",
.minor_shift = 6,
.part = mfm,
},
{
major: MAJOR_NR,
first_minor: 64,
major_name: "mfm",
minor_shift: 6,
part: mfm + 64,
.major = MAJOR_NR,
.first_minor = 64,
.major_name = "mfm",
.minor_shift = 6,
.part = mfm + 64,
};
static struct block_device_operations mfm_fops =
{
owner: THIS_MODULE,
open: mfm_open,
ioctl: mfm_ioctl,
.owner = THIS_MODULE,
.open = mfm_open,
.ioctl = mfm_ioctl,
};
static void mfm_geninit (void)
......
drivers/acorn/char/i2c.c
View file @ cbf3b4c9
......@@ -200,13 +200,13 @@ static int rtc_ioctl(struct inode *inode, struct file *file,
}
static struct file_operations rtc_fops = {
ioctl: rtc_ioctl,
.ioctl = rtc_ioctl,
};
static struct miscdevice rtc_dev = {
minor: RTC_MINOR,
name: "rtc",
fops: &rtc_fops,
.minor = RTC_MINOR,
.name = "rtc",
.fops = &rtc_fops,
};
/* IOC / IOMD i2c driver */
......@@ -264,13 +264,13 @@ static int ioc_getsda(void *data)
}
static struct i2c_algo_bit_data ioc_data = {
setsda: ioc_setsda,
setscl: ioc_setscl,
getsda: ioc_getsda,
getscl: ioc_getscl,
udelay: 80,
mdelay: 80,
timeout: 100
.setsda = ioc_setsda,
.setscl = ioc_setscl,
.getsda = ioc_getsda,
.getscl = ioc_getscl,
.udelay = 80,
.mdelay = 80,
.timeout = 100
};
static int ioc_client_reg(struct i2c_client *client)
......@@ -303,11 +303,11 @@ static int ioc_client_unreg(struct i2c_client *client)
}
static struct i2c_adapter ioc_ops = {
name: "IOC/IOMD",
id: I2C_HW_B_IOC,
algo_data: &ioc_data,
client_register: ioc_client_reg,
client_unregister: ioc_client_unreg
.name = "IOC/IOMD",
.id = I2C_HW_B_IOC,
.algo_data = &ioc_data,
.client_register = ioc_client_reg,
.client_unregister = ioc_client_unreg
};
static int __init i2c_ioc_init(void)
......
drivers/acorn/char/mouse_ps2.c
View file @ cbf3b4c9
......@@ -250,12 +250,12 @@ static unsigned int aux_poll(struct file *file, poll_table * wait)
}
struct file_operations psaux_fops = {
read: read_aux,
write: write_aux,
poll: aux_poll,
open: open_aux,
release: release_aux,
fasync: fasync_aux,
.read = read_aux,
.write = write_aux,
.poll = aux_poll,
.open = open_aux,
.release = release_aux,
.fasync = fasync_aux,
};
/*
......
drivers/acorn/char/pcf8583.c
View file @ cbf3b4c9
......@@ -23,13 +23,13 @@ static unsigned short ignore[] = { I2C_CLIENT_END };
static unsigned short normal_addr[] = { 0x50, I2C_CLIENT_END };
static struct i2c_client_address_data addr_data = {
normal_i2c: normal_addr,
normal_i2c_range: ignore,
probe: ignore,
probe_range: ignore,
ignore: ignore,
ignore_range: ignore,
force: ignore,
.normal_i2c = normal_addr,
.normal_i2c_range = ignore,
.probe = ignore,
.probe_range = ignore,
.ignore = ignore,
.ignore_range = ignore,
.force = ignore,
};
#define DAT(x) ((unsigned int)(x->data))
......@@ -224,12 +224,12 @@ pcf8583_command(struct i2c_client *client, unsigned int cmd, void *arg)
}
static struct i2c_driver pcf8583_driver = {
name: "PCF8583",
id: I2C_DRIVERID_PCF8583,
flags: I2C_DF_NOTIFY,
attach_adapter: pcf8583_probe,
detach_client: pcf8583_detach,
command: pcf8583_command
.name = "PCF8583",
.id = I2C_DRIVERID_PCF8583,
.flags = I2C_DF_NOTIFY,
.attach_adapter = pcf8583_probe,
.detach_client = pcf8583_detach,
.command = pcf8583_command
};
static __init int pcf8583_init(void)
......
drivers/acorn/net/etherh.c
View file @ cbf3b4c9
......@@ -141,8 +141,8 @@ static void etherh_irq_disable(ecard_t *ec, int irqnr)
}
static expansioncard_ops_t etherh_ops = {
irqenable: etherh_irq_enable,
irqdisable: etherh_irq_disable,
.irqenable = etherh_irq_enable,
.irqdisable = etherh_irq_disable,
};
......
drivers/acorn/scsi/acornscsi.c
View file @ cbf3b4c9
......@@ -3120,22 +3120,22 @@ int acornscsi_proc_info(char *buffer, char **start, off_t offset,
}
static Scsi_Host_Template acornscsi_template = {
module: THIS_MODULE,
proc_info: acornscsi_proc_info,
name: "AcornSCSI",
detect: acornscsi_detect,
release: acornscsi_release,
info: acornscsi_info,
queuecommand: acornscsi_queuecmd,
abort: acornscsi_abort,
reset: acornscsi_reset,
bios_param: scsicam_bios_param,
can_queue: 16,
this_id: 7,
sg_tablesize: SG_ALL,
cmd_per_lun: 2,
unchecked_isa_dma: 0,
use_clustering: DISABLE_CLUSTERING
.module = THIS_MODULE,
.proc_info = acornscsi_proc_info,
.name = "AcornSCSI",
.detect = acornscsi_detect,
.release = acornscsi_release,
.info = acornscsi_info,
.queuecommand = acornscsi_queuecmd,
.abort = acornscsi_abort,
.reset = acornscsi_reset,
.bios_param = scsicam_bios_param,
.can_queue = 16,
.this_id = 7,
.sg_tablesize = SG_ALL,
.cmd_per_lun = 2,
.unchecked_isa_dma = 0,
.use_clustering = DISABLE_CLUSTERING
};
static int __init acornscsi_init(void)
......
drivers/acorn/scsi/cumana_1.c
View file @ cbf3b4c9
......@@ -389,21 +389,21 @@ static void cumanascsi_write(struct Scsi_Host *instance, int reg, int value)
#include "../../scsi/NCR5380.c"
static Scsi_Host_Template cumanascsi_template = {
module: THIS_MODULE,
name: "Cumana 16-bit SCSI",
detect: cumanascsi_detect,
release: cumanascsi_release,
info: cumanascsi_info,
queuecommand: cumanascsi_queue_command,
abort: cumanascsi_abort,
reset: cumanascsi_reset,
bios_param: scsicam_bios_param,
can_queue: 16,
this_id: 7,
sg_tablesize: SG_ALL,
cmd_per_lun: 2,
unchecked_isa_dma: 0,
use_clustering: DISABLE_CLUSTERING
.module = THIS_MODULE,
.name = "Cumana 16-bit SCSI",
.detect = cumanascsi_detect,
.release = cumanascsi_release,
.info = cumanascsi_info,
.queuecommand = cumanascsi_queue_command,
.abort = cumanascsi_abort,
.reset = cumanascsi_reset,
.bios_param = scsicam_bios_param,
.can_queue = 16,
.this_id = 7,
.sg_tablesize = SG_ALL,
.cmd_per_lun = 2,
.unchecked_isa_dma = 0,
.use_clustering = DISABLE_CLUSTERING
};
static int __init cumanascsi_init(void)
......
drivers/acorn/scsi/cumana_2.c
View file @ cbf3b4c9
......@@ -557,24 +557,24 @@ int cumanascsi_2_proc_info (char *buffer, char **start, off_t offset,
}
static Scsi_Host_Template cumanascsi2_template = {
module: THIS_MODULE,
proc_info: cumanascsi_2_proc_info,
name: "Cumana SCSI II",
detect: cumanascsi_2_detect,
release: cumanascsi_2_release,
info: cumanascsi_2_info,
bios_param: scsicam_bios_param,
can_queue: 1,
this_id: 7,
sg_tablesize: SG_ALL,
cmd_per_lun: 1,
use_clustering: DISABLE_CLUSTERING,
command: fas216_command,
queuecommand: fas216_queue_command,
eh_host_reset_handler: fas216_eh_host_reset,
eh_bus_reset_handler: fas216_eh_bus_reset,
eh_device_reset_handler: fas216_eh_device_reset,
eh_abort_handler: fas216_eh_abort,
.module = THIS_MODULE,
.proc_info = cumanascsi_2_proc_info,
.name = "Cumana SCSI II",
.detect = cumanascsi_2_detect,
.release = cumanascsi_2_release,
.info = cumanascsi_2_info,
.bios_param = scsicam_bios_param,
.can_queue = 1,
.this_id = 7,
.sg_tablesize = SG_ALL,
.cmd_per_lun = 1,
.use_clustering = DISABLE_CLUSTERING,
.command = fas216_command,
.queuecommand = fas216_queue_command,
.eh_host_reset_handler = fas216_eh_host_reset,
.eh_bus_reset_handler = fas216_eh_bus_reset,
.eh_device_reset_handler = fas216_eh_device_reset,
.eh_abort_handler = fas216_eh_abort,
};
static int __init cumanascsi2_init(void)
......
drivers/acorn/scsi/ecoscsi.c
View file @ cbf3b4c9
......@@ -262,19 +262,19 @@ int NCR5380_proc_info(char *buffer, char **start, off_t offset,
#include "../../scsi/NCR5380.c"
static Scsi_Host_Template ecoscsi_template = {
module: THIS_MODULE,
name: "Serial Port EcoSCSI NCR5380",
detect: ecoscsi_detect,
release: ecoscsi_release,
info: ecoscsi_info,
queuecommand: ecoscsi_queue_command,
abort: ecoscsi_abort,
reset: ecoscsi_reset,
can_queue: 16,
this_id: 7,
sg_tablesize: SG_ALL,
cmd_per_lun: 2,
use_clustering: DISABLE_CLUSTERING
.module = THIS_MODULE,
.name = "Serial Port EcoSCSI NCR5380",
.detect = ecoscsi_detect,
.release = ecoscsi_release,
.info = ecoscsi_info,
.queuecommand = ecoscsi_queue_command,
.abort = ecoscsi_abort,
.reset = ecoscsi_reset,
.can_queue = 16,
.this_id = 7,
.sg_tablesize = SG_ALL,
.cmd_per_lun = 2,
.use_clustering = DISABLE_CLUSTERING
};
static int __init ecoscsi_init(void)
......
drivers/acorn/scsi/eesox.c
View file @ cbf3b4c9
......@@ -554,24 +554,24 @@ int eesoxscsi_proc_info(char *buffer, char **start, off_t offset,
}
static Scsi_Host_Template eesox_template = {
module: THIS_MODULE,
proc_info: eesoxscsi_proc_info,
name: "EESOX SCSI",
detect: eesoxscsi_detect,
release: eesoxscsi_release,
info: eesoxscsi_info,
bios_param: scsicam_bios_param,
can_queue: 1,
this_id: 7,
sg_tablesize: SG_ALL,
cmd_per_lun: 1,
use_clustering: DISABLE_CLUSTERING,
command: fas216_command,
queuecommand: fas216_queue_command,
eh_host_reset_handler: fas216_eh_host_reset,
eh_bus_reset_handler: fas216_eh_bus_reset,
eh_device_reset_handler: fas216_eh_device_reset,
eh_abort_handler: fas216_eh_abort,
.module = THIS_MODULE,
.proc_info = eesoxscsi_proc_info,
.name = "EESOX SCSI",
.detect = eesoxscsi_detect,
.release = eesoxscsi_release,
.info = eesoxscsi_info,
.bios_param = scsicam_bios_param,
.can_queue = 1,
.this_id = 7,
.sg_tablesize = SG_ALL,
.cmd_per_lun = 1,
.use_clustering = DISABLE_CLUSTERING,
.command = fas216_command,
.queuecommand = fas216_queue_command,
.eh_host_reset_handler = fas216_eh_host_reset,
.eh_bus_reset_handler = fas216_eh_bus_reset,
.eh_device_reset_handler = fas216_eh_device_reset,
.eh_abort_handler = fas216_eh_abort,
};
static int __init eesox_init(void)
......
drivers/acorn/scsi/oak.c
View file @ cbf3b4c9
......@@ -252,20 +252,20 @@ printk("reading %p len %d\n", addr, len);
#include "../../scsi/NCR5380.c"
static Scsi_Host_Template oakscsi_template = {
module: THIS_MODULE,
proc_info: oakscsi_proc_info,
name: "Oak 16-bit SCSI",
detect: oakscsi_detect,
release: oakscsi_release,
info: oakscsi_info,
queuecommand: oakscsi_queue_command,
abort: oakscsi_abort,
reset: oakscsi_reset,
can_queue: 16,
this_id: 7,
sg_tablesize: SG_ALL,
cmd_per_lun: 2,
use_clustering: DISABLE_CLUSTERING
.module = THIS_MODULE,
.proc_info = oakscsi_proc_info,
.name = "Oak 16-bit SCSI",
.detect = oakscsi_detect,
.release = oakscsi_release,
.info = oakscsi_info,
.queuecommand = oakscsi_queue_command,
.abort = oakscsi_abort,
.reset = oakscsi_reset,
.can_queue = 16,
.this_id = 7,
.sg_tablesize = SG_ALL,
.cmd_per_lun = 2,
.use_clustering = DISABLE_CLUSTERING
};
static int __init oakscsi_init(void)
......
drivers/acorn/scsi/powertec.c
View file @ cbf3b4c9
......@@ -454,24 +454,24 @@ int powertecscsi_proc_info(char *buffer, char **start, off_t offset,
}
static Scsi_Host_Template powertecscsi_template = {
module: THIS_MODULE,
proc_info: powertecscsi_proc_info,
name: "PowerTec SCSI",
detect: powertecscsi_detect,
release: powertecscsi_release,
info: powertecscsi_info,
bios_param: scsicam_bios_param,
can_queue: 1,
this_id: 7,
sg_tablesize: SG_ALL,
cmd_per_lun: 1,
use_clustering: ENABLE_CLUSTERING,
command: fas216_command,
queuecommand: fas216_queue_command,
eh_host_reset_handler: fas216_eh_host_reset,
eh_bus_reset_handler: fas216_eh_bus_reset,
eh_device_reset_handler: fas216_eh_device_reset,
eh_abort_handler: fas216_eh_abort,
.module = THIS_MODULE,
.proc_info = powertecscsi_proc_info,
.name = "PowerTec SCSI",
.detect = powertecscsi_detect,
.release = powertecscsi_release,
.info = powertecscsi_info,
.bios_param = scsicam_bios_param,
.can_queue = 1,
.this_id = 7,
.sg_tablesize = SG_ALL,
.cmd_per_lun = 1,
.use_clustering = ENABLE_CLUSTERING,
.command = fas216_command,
.queuecommand = fas216_queue_command,
.eh_host_reset_handler = fas216_eh_host_reset,
.eh_bus_reset_handler = fas216_eh_bus_reset,
.eh_device_reset_handler = fas216_eh_device_reset,
.eh_abort_handler = fas216_eh_abort,
};
static int __init powertecscsi_init(void)
......
drivers/pcmcia/Makefile
View file @ cbf3b4c9
......@@ -2,7 +2,7 @@
# Makefile for the kernel pcmcia subsystem (c/o David Hinds)
#
export-objs := ds.o cs.o yenta.o
export-objs := ds.o cs.o yenta.o sa1100_pcmcia.o
obj-$(CONFIG_PCMCIA) += pcmcia_core.o ds.o
ifeq ($(CONFIG_CARDBUS),y)
......
drivers/pcmcia/sa1100_generic.c
View file @ cbf3b4c9
......@@ -137,7 +137,7 @@ static int sa1100_pcmcia_set_mecr(int sock)
local_irq_restore(flags);
DEBUG(4, "%s(): FAST%u %lx BSM%u %lx BSA%u %lx BSIO%u %lx\n",
DEBUG(4, "%s(): FAST%u %X BSM%u %X BSA%u %X BSIO%u %X\n",
__FUNCTION__, sock, MECR_FAST_GET(mecr, sock), sock,
MECR_BSM_GET(mecr, sock), sock, MECR_BSA_GET(mecr, sock),
sock, MECR_BSIO_GET(mecr, sock));
......@@ -1052,6 +1052,7 @@ int sa1100_register_pcmcia(struct pcmcia_low_level *ops)
pcmcia_low_level = NULL;
return ret;
}
EXPORT_SYMBOL(sa1100_register_pcmcia);
/* sa1100_unregister_pcmcia()
* ^^^^^^^^^^^^^^^^^^^^^^^^^^
......@@ -1091,6 +1092,7 @@ void sa1100_unregister_pcmcia(struct pcmcia_low_level *ops)
pcmcia_low_level = NULL;
}
EXPORT_SYMBOL(sa1100_unregister_pcmcia);
/* sa1100_pcmcia_init()
* ^^^^^^^^^^^^^^^^^^^^
......
drivers/video/sa1100fb.c
View file @ cbf3b4c9
......@@ -205,9 +205,6 @@
extern void (*sa1100fb_backlight_power)(int on);
extern void (*sa1100fb_lcd_power)(int on);
void (*sa1100fb_blank_helper)(int blank);
EXPORT_SYMBOL(sa1100fb_blank_helper);
/*
* IMHO this looks wrong. In 8BPP, length should be 8.
*/
......@@ -262,7 +259,7 @@ static struct sa1100fb_mach_info pal_info __initdata = {
#endif
#endif
#ifdef CONFIG_SA1100_H3XXX
#ifdef CONFIG_SA1100_H3800
static struct sa1100fb_mach_info h3800_info __initdata = {
pixclock: 174757, bpp: 16,
xres: 320, yres: 240,
......@@ -274,9 +271,12 @@ static struct sa1100fb_mach_info h3800_info __initdata = {
sync: 0, cmap_static: 1,
lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
lccr3: LCCR3_ACBsCntOff | LCCR3_PixFlEdg | LCCR3_OutEnH,
lccr3: LCCR3_ACBsDiv(2) | LCCR3_PixRsEdg | LCCR3_OutEnH |
LCCR3_ACBsCntOff,
};
#endif
#ifdef CONFIG_SA1100_H3600
static struct sa1100fb_mach_info h3600_info __initdata = {
pixclock: 174757, bpp: 16,
xres: 320, yres: 240,
......@@ -288,7 +288,8 @@ static struct sa1100fb_mach_info h3600_info __initdata = {
sync: 0, cmap_static: 1,
lccr0: LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
lccr3: LCCR3_ACBsCntOff | LCCR3_OutEnH | LCCR3_PixFlEdg,
lccr3: LCCR3_ACBsDiv(2) | LCCR3_PixRsEdg | LCCR3_OutEnH |
LCCR3_ACBsCntOff,
};
static struct sa1100fb_rgb h3600_rgb_16 = {
......@@ -297,7 +298,9 @@ static struct sa1100fb_rgb h3600_rgb_16 = {
blue: { offset: 1, length: 4, },
transp: { offset: 0, length: 0, },
};
#endif
#ifdef CONFIG_SA1100_H3100
static struct sa1100fb_mach_info h3100_info __initdata = {
pixclock: 406977, bpp: 4,
xres: 320, yres: 240,
......@@ -680,14 +683,18 @@ sa1100fb_get_machine_info(struct sa1100fb_info *fbi)
#endif
}
#endif
#ifdef CONFIG_SA1100_H3XXX
#ifdef CONFIG_SA1100_H3100
if (machine_is_h3100()) {
inf = &h3100_info;
}
#endif
#ifdef CONFIG_SA1100_H3600
if (machine_is_h3600()) {
inf = &h3600_info;
fbi->rgb[RGB_16] = &h3600_rgb_16;
}
if (machine_is_h3100()) {
inf = &h3100_info;
}
#endif
#ifdef CONFIG_SA1100_H3800
if (machine_is_h3800()) {
inf = &h3800_info;
}
......@@ -1310,13 +1317,9 @@ static int sa1100fb_blank(int blank, struct fb_info *info)
for (i = 0; i < fbi->palette_size; i++)
sa1100fb_setpalettereg(i, 0, 0, 0, 0, info);
sa1100fb_schedule_task(fbi, C_DISABLE);
if (sa1100fb_blank_helper)
sa1100fb_blank_helper(blank);
break;
case VESA_NO_BLANKING:
if (sa1100fb_blank_helper)
sa1100fb_blank_helper(blank);
if (fbi->fb.disp->visual == FB_VISUAL_PSEUDOCOLOR ||
fbi->fb.disp->visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
fb_set_cmap(&fbi->fb.cmap, 1, info);
......
fs/adfs/dir.c
View file @ cbf3b4c9
......@@ -198,9 +198,9 @@ adfs_dir_lookup_byname(struct inode *inode, struct qstr *name, struct object_inf
}
struct file_operations adfs_dir_operations = {
read: generic_read_dir,
readdir: adfs_readdir,
fsync: file_fsync,
.read = generic_read_dir,
.readdir = adfs_readdir,
.fsync = file_fsync,
};
static int
......@@ -265,8 +265,8 @@ adfs_compare(struct dentry *parent, struct qstr *entry, struct qstr *name)
}
struct dentry_operations adfs_dentry_operations = {
d_hash: adfs_hash,
d_compare: adfs_compare,
.d_hash = adfs_hash,
.d_compare = adfs_compare,
};
struct dentry *adfs_lookup(struct inode *dir, struct dentry *dentry)
......@@ -297,6 +297,6 @@ struct dentry *adfs_lookup(struct inode *dir, struct dentry *dentry)
* directories can handle most operations...
*/
struct inode_operations adfs_dir_inode_operations = {
lookup: adfs_lookup,
setattr: adfs_notify_change,
.lookup = adfs_lookup,
.setattr = adfs_notify_change,
};
fs/adfs/file.c
View file @ cbf3b4c9
......@@ -31,14 +31,14 @@
#include "adfs.h"
struct file_operations adfs_file_operations = {
llseek: generic_file_llseek,
read: generic_file_read,
mmap: generic_file_mmap,
fsync: file_fsync,
write: generic_file_write,
sendfile: generic_file_sendfile,
.llseek = generic_file_llseek,
.read = generic_file_read,
.mmap = generic_file_mmap,
.fsync = file_fsync,
.write = generic_file_write,
.sendfile = generic_file_sendfile,
};
struct inode_operations adfs_file_inode_operations = {
setattr: adfs_notify_change,
.setattr = adfs_notify_change,
};
fs/adfs/inode.c
View file @ cbf3b4c9
......@@ -73,12 +73,12 @@ static int _adfs_bmap(struct address_space *mapping, long block)
}
static struct address_space_operations adfs_aops = {
readpage: adfs_readpage,
writepage: adfs_writepage,
sync_page: block_sync_page,
prepare_write: adfs_prepare_write,
commit_write: generic_commit_write,
bmap: _adfs_bmap
.readpage = adfs_readpage,
.writepage = adfs_writepage,
.sync_page = block_sync_page,
.prepare_write = adfs_prepare_write,
.commit_write = generic_commit_write,
.bmap = _adfs_bmap
};
static inline unsigned int
......
fs/adfs/super.c
View file @ cbf3b4c9
......@@ -247,12 +247,12 @@ static void destroy_inodecache(void)
}
static struct super_operations adfs_sops = {
alloc_inode: adfs_alloc_inode,
destroy_inode: adfs_destroy_inode,
write_inode: adfs_write_inode,
put_super: adfs_put_super,
statfs: adfs_statfs,
remount_fs: adfs_remount,
.alloc_inode = adfs_alloc_inode,
.destroy_inode = adfs_destroy_inode,
.write_inode = adfs_write_inode,
.put_super = adfs_put_super,
.statfs = adfs_statfs,
.remount_fs = adfs_remount,
};
static struct adfs_discmap *adfs_read_map(struct super_block *sb, struct adfs_discrecord *dr)
......@@ -464,11 +464,11 @@ static struct super_block *adfs_get_sb(struct file_system_type *fs_type,
}
static struct file_system_type adfs_fs_type = {
owner: THIS_MODULE,
name: "adfs",
get_sb: adfs_get_sb,
kill_sb: kill_block_super,
fs_flags: FS_REQUIRES_DEV,
.owner = THIS_MODULE,
.name = "adfs",
.get_sb = adfs_get_sb,
.kill_sb = kill_block_super,
.fs_flags = FS_REQUIRES_DEV,
};
static int __init init_adfs_fs(void)
......
include/asm-arm/arch-pxa/hardware.h
View file @ cbf3b4c9
......@@ -27,17 +27,27 @@
/*
* Intel PXA internal I/O mappings
* We requires absolute addresses.
*/
#define PCIO_BASE 0
#define io_p2v(x) \
(((x) < 0x44000000) ? ((x) - 0x40000000 + 0xfc000000) : \
((x) < 0x48000000) ? ((x) - 0x44000000 + 0xfe000000) : \
((x) - 0x48000000 + 0xff000000))
#define io_v2p( x ) \
(((x) < 0xfe000000) ? ((x) - 0xfc000000 + 0x40000000) : \
((x) < 0xff000000) ? ((x) - 0xfe000000 + 0x44000000) : \
((x) - 0xff000000 + 0x48000000))
/*
* Workarounds for at least 2 errata so far require this.
* The mapping is set in mach-pxa/generic.c.
*/
#define UNCACHED_PHYS_0 0xff000000
#define UNCACHED_ADDR UNCACHED_PHYS_0
/*
* Intel PXA internal I/O mappings:
*
* 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff
* 0x44000000 - 0x45ffffff <--> 0xfa000000 - 0xfbffffff
* 0x48000000 - 0x49ffffff <--> 0xfc000000 - 0xfdffffff
*/
#define io_p2v(x) ( ((x) | 0xbe000000) ^ (~((x) >> 1) & 0x06000000) )
#define io_v2p( x ) ( ((x) & 0x41ffffff) ^ ( ((x) & 0x06000000) << 1) )
#ifndef __ASSEMBLY__
......@@ -51,7 +61,7 @@
* doesn't guess this by itself.
*/
#include <asm/types.h>
typedef struct { volatile u32 offset[1024]; } __regbase;
typedef struct { volatile u32 offset[4096]; } __regbase;
# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
# define __REG(x) __REGP(io_p2v(x))
#endif
......@@ -93,5 +103,6 @@ extern unsigned int get_lclk_frequency_10khz(void);
#include "lubbock.h"
#include "idp.h"
#include "cerf.h"
#endif /* _ASM_ARCH_HARDWARE_H */
include/asm-arm/arch-pxa/pxa-regs.h
View file @ cbf3b4c9
......@@ -262,6 +262,7 @@ typedef void (*ExcpHndlr) (void) ;
/* default combinations */
#define DCMD_RXPCDR (DCMD_INCTRGADDR|DCMD_FLOWSRC|DCMD_BURST32|DCMD_WIDTH4)
#define DCMD_RXMCDR (DCMD_INCTRGADDR|DCMD_FLOWSRC|DCMD_BURST32|DCMD_WIDTH4)
#define DCMD_TXPCDR (DCMD_INCSRCADDR|DCMD_FLOWTRG|DCMD_BURST32|DCMD_WIDTH4)
......@@ -361,7 +362,7 @@ typedef void (*ExcpHndlr) (void) ;
#define LSR_OE (1 << 1) /* Overrun Error */
#define LSR_DR (1 << 0) /* Data Ready */
#define MCR_LOOP (1 << 4)
#define MCR_LOOP (1 << 4) */
#define MCR_OUT2 (1 << 3) /* force MSR_DCD in loopback mode */
#define MCR_OUT1 (1 << 2) /* force MSR_RI in loopback mode */
#define MCR_RTS (1 << 1) /* Request to Send */
......@@ -376,6 +377,35 @@ typedef void (*ExcpHndlr) (void) ;
#define MSR_DDSR (1 << 1) /* Delta Data Set Ready */
#define MSR_DCTS (1 << 0) /* Delta Clear To Send */
/*
* IrSR (Infrared Selection Register)
*/
#define IrSR_OFFSET 0x20
#define IrSR_RXPL_NEG_IS_ZERO (1<<4)
#define IrSR_RXPL_POS_IS_ZERO 0x0
#define IrSR_TXPL_NEG_IS_ZERO (1<<3)
#define IrSR_TXPL_POS_IS_ZERO 0x0
#define IrSR_XMODE_PULSE_1_6 (1<<2)
#define IrSR_XMODE_PULSE_3_16 0x0
#define IrSR_RCVEIR_IR_MODE (1<<1)
#define IrSR_RCVEIR_UART_MODE 0x0
#define IrSR_XMITIR_IR_MODE (1<<0)
#define IrSR_XMITIR_UART_MODE 0x0
#define IrSR_IR_RECEIVE_ON (\
IrSR_RXPL_NEG_IS_ZERO | \
IrSR_TXPL_POS_IS_ZERO | \
IrSR_XMODE_PULSE_3_16 | \
IrSR_RCVEIR_IR_MODE | \
IrSR_XMITIR_UART_MODE)
#define IrSR_IR_TRANSMIT_ON (\
IrSR_RXPL_NEG_IS_ZERO | \
IrSR_TXPL_POS_IS_ZERO | \
IrSR_XMODE_PULSE_3_16 | \
IrSR_RCVEIR_UART_MODE | \
IrSR_XMITIR_IR_MODE)
/*
* I2C registers
......@@ -387,6 +417,37 @@ typedef void (*ExcpHndlr) (void) ;
#define ISR __REG(0x40301698) /* I2C Status Register - ISR */
#define ISAR __REG(0x403016A0) /* I2C Slave Address Register - ISAR */
/* ----- Control register bits ---------------------------------------- */
#define ICR_START 0x1 /* start bit */
#define ICR_STOP 0x2 /* stop bit */
#define ICR_ACKNAK 0x4 /* send ACK(0) or NAK(1) */
#define ICR_TB 0x8 /* transfer byte bit */
#define ICR_MA 0x10 /* master abort */
#define ICR_SCLE 0x20 /* master clock enable */
#define ICR_IUE 0x40 /* unit enable */
#define ICR_GCD 0x80 /* general call disable */
#define ICR_ITEIE 0x100 /* enable tx interrupts */
#define ICR_IRFIE 0x200 /* enable rx interrupts */
#define ICR_BEIE 0x400 /* enable bus error ints */
#define ICR_SSDIE 0x800 /* slave STOP detected int enable */
#define ICR_ALDIE 0x1000 /* enable arbitration interrupt */
#define ICR_SADIE 0x2000 /* slave address detected int enable */
#define ICR_UR 0x4000 /* unit reset */
/* ----- Status register bits ----------------------------------------- */
#define ISR_RWM 0x1 /* read/write mode */
#define ISR_ACKNAK 0x2 /* ack/nak status */
#define ISR_UB 0x4 /* unit busy */
#define ISR_IBB 0x8 /* bus busy */
#define ISR_SSD 0x10 /* slave stop detected */
#define ISR_ALD 0x20 /* arbitration loss detected */
#define ISR_ITE 0x40 /* tx buffer empty */
#define ISR_IRF 0x80 /* rx buffer full */
#define ISR_GCAD 0x100 /* general call address detected */
#define ISR_SAD 0x200 /* slave address detected */
#define ISR_BED 0x400 /* bus error no ACK/NAK */
/*
* Serial Audio Controller
......@@ -486,24 +547,92 @@ typedef void (*ExcpHndlr) (void) ;
/*
* USB Device Controller
*/
#define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */
#define UDC_RES2 __REG(0x40600008) /* UDC Undocumented - Reserved2 */
#define UDC_RES3 __REG(0x4060000C) /* UDC Undocumented - Reserved3 */
#define UDCCR __REG(0x40600000) /* UDC Control Register */
#define UDCCR_UDE (1 << 0) /* UDC enable */
#define UDCCR_UDA (1 << 1) /* UDC active */
#define UDCCR_RSM (1 << 2) /* Device resume */
#define UDCCR_RESIR (1 << 3) /* Resume interrupt request */
#define UDCCR_SUSIR (1 << 4) /* Suspend interrupt request */
#define UDCCR_SRM (1 << 5) /* Suspend/resume interrupt mask */
#define UDCCR_RSTIR (1 << 6) /* Reset interrupt request */
#define UDCCR_REM (1 << 7) /* Reset interrupt mask */
#define UDCCS0 __REG(0x40600010) /* UDC Endpoint 0 Control/Status Register */
#define UDCCS0_OPR (1 << 0) /* OUT packet ready */
#define UDCCS0_IPR (1 << 1) /* IN packet ready */
#define UDCCS0_FTF (1 << 2) /* Flush Tx FIFO */
#define UDCCS0_DRWF (1 << 3) /* Device remote wakeup feature */
#define UDCCS0_SST (1 << 4) /* Sent stall */
#define UDCCS0_FST (1 << 5) /* Force stall */
#define UDCCS0_RNE (1 << 6) /* Receive FIFO no empty */
#define UDCCS0_SA (1 << 7) /* Setup active */
/* Bulk IN - Endpoint 1,6,11 */
#define UDCCS1 __REG(0x40600014) /* UDC Endpoint 1 (IN) Control/Status Register */
#define UDCCS2 __REG(0x40600018) /* UDC Endpoint 2 (OUT) Control/Status Register */
#define UDCCS3 __REG(0x4060001C) /* UDC Endpoint 3 (IN) Control/Status Register */
#define UDCCS4 __REG(0x40600020) /* UDC Endpoint 4 (OUT) Control/Status Register */
#define UDCCS5 __REG(0x40600024) /* UDC Endpoint 5 (Interrupt) Control/Status Register */
#define UDCCS6 __REG(0x40600028) /* UDC Endpoint 6 (IN) Control/Status Register */
#define UDCCS7 __REG(0x4060002C) /* UDC Endpoint 7 (OUT) Control/Status Register */
#define UDCCS8 __REG(0x40600030) /* UDC Endpoint 8 (IN) Control/Status Register */
#define UDCCS9 __REG(0x40600034) /* UDC Endpoint 9 (OUT) Control/Status Register */
#define UDCCS10 __REG(0x40600038) /* UDC Endpoint 10 (Interrupt) Control/Status Register */
#define UDCCS11 __REG(0x4060003C) /* UDC Endpoint 11 (IN) Control/Status Register */
#define UDCCS_BI_TFS (1 << 0) /* Transmit FIFO service */
#define UDCCS_BI_TPC (1 << 1) /* Transmit packet complete */
#define UDCCS_BI_FTF (1 << 2) /* Flush Tx FIFO */
#define UDCCS_BI_TUR (1 << 3) /* Transmit FIFO underrun */
#define UDCCS_BI_SST (1 << 4) /* Sent stall */
#define UDCCS_BI_FST (1 << 5) /* Force stall */
#define UDCCS_BI_TSP (1 << 7) /* Transmit short packet */
/* Bulk OUT - Endpoint 2,7,12 */
#define UDCCS2 __REG(0x40600018) /* UDC Endpoint 2 (OUT) Control/Status Register */
#define UDCCS7 __REG(0x4060002C) /* UDC Endpoint 7 (OUT) Control/Status Register */
#define UDCCS12 __REG(0x40600040) /* UDC Endpoint 12 (OUT) Control/Status Register */
#define UDCCS_BO_RFS (1 << 0) /* Receive FIFO service */
#define UDCCS_BO_RPC (1 << 1) /* Receive packet complete */
#define UDCCS_BO_DME (1 << 3) /* DMA enable */
#define UDCCS_BO_SST (1 << 4) /* Sent stall */
#define UDCCS_BO_FST (1 << 5) /* Force stall */
#define UDCCS_BO_RNE (1 << 6) /* Receive FIFO not empty */
#define UDCCS_BO_RSP (1 << 7) /* Receive short packet */
/* Isochronous IN - Endpoint 3,8,13 */
#define UDCCS3 __REG(0x4060001C) /* UDC Endpoint 3 (IN) Control/Status Register */
#define UDCCS8 __REG(0x40600030) /* UDC Endpoint 8 (IN) Control/Status Register */
#define UDCCS13 __REG(0x40600044) /* UDC Endpoint 13 (IN) Control/Status Register */
#define UDCCS_II_TFS (1 << 0) /* Transmit FIFO service */
#define UDCCS_II_TPC (1 << 1) /* Transmit packet complete */
#define UDCCS_II_FTF (1 << 2) /* Flush Tx FIFO */
#define UDCCS_II_TUR (1 << 3) /* Transmit FIFO underrun */
#define UDCCS_II_TSP (1 << 7) /* Transmit short packet */
/* Isochronous OUT - Endpoint 4,9,14 */
#define UDCCS4 __REG(0x40600020) /* UDC Endpoint 4 (OUT) Control/Status Register */
#define UDCCS9 __REG(0x40600034) /* UDC Endpoint 9 (OUT) Control/Status Register */
#define UDCCS14 __REG(0x40600048) /* UDC Endpoint 14 (OUT) Control/Status Register */
#define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */
#define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */
#define UDCCS_IO_ROF (1 << 3) /* Receive overflow */
#define UDCCS_IO_DME (1 << 3) /* DMA enable */
#define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */
#define UDCCS_IO_RSP (1 << 7) /* Receive short packet */
/* Interrupt IN - Endpoint 5,10,15 */
#define UDCCS5 __REG(0x40600024) /* UDC Endpoint 5 (Interrupt) Control/Status Register */
#define UDCCS10 __REG(0x40600038) /* UDC Endpoint 10 (Interrupt) Control/Status Register */
#define UDCCS15 __REG(0x4060004C) /* UDC Endpoint 15 (Interrupt) Control/Status Register */
#define UDCCS_INT_TFS (1 << 0) /* Transmit FIFO service */
#define UDCCS_INT_TPC (1 << 1) /* Transmit packet complete */
#define UDCCS_INT_FTF (1 << 2) /* Flush Tx FIFO */
#define UDCCS_INT_TUR (1 << 3) /* Transmit FIFO underrun */
#define UDCCS_INT_SST (1 << 4) /* Sent stall */
#define UDCCS_INT_FST (1 << 5) /* Force stall */
#define UDCCS_INT_TSP (1 << 7) /* Transmit short packet */
#define UFNRH __REG(0x40600060) /* UDC Frame Number Register High */
#define UFNRL __REG(0x40600064) /* UDC Frame Number Register Low */
#define UBCR2 __REG(0x40600068) /* UDC Byte Count Reg 2 */
......@@ -528,11 +657,51 @@ typedef void (*ExcpHndlr) (void) ;
#define UDDR13 __REG(0x40600C00) /* UDC Endpoint 13 Data Register */
#define UDDR14 __REG(0x40600E00) /* UDC Endpoint 14 Data Register */
#define UDDR15 __REG(0x406000E0) /* UDC Endpoint 15 Data Register */
#define UICR0 __REG(0x40600050) /* UDC Interrupt Control Register 0 */
#define UICR0_IM0 (1 << 0) /* Interrupt mask ep 0 */
#define UICR0_IM1 (1 << 1) /* Interrupt mask ep 1 */
#define UICR0_IM2 (1 << 2) /* Interrupt mask ep 2 */
#define UICR0_IM3 (1 << 3) /* Interrupt mask ep 3 */
#define UICR0_IM4 (1 << 4) /* Interrupt mask ep 4 */
#define UICR0_IM5 (1 << 5) /* Interrupt mask ep 5 */
#define UICR0_IM6 (1 << 6) /* Interrupt mask ep 6 */
#define UICR0_IM7 (1 << 7) /* Interrupt mask ep 7 */
#define UICR1 __REG(0x40600054) /* UDC Interrupt Control Register 1 */
#define UICR1_IM8 (1 << 0) /* Interrupt mask ep 8 */
#define UICR1_IM9 (1 << 1) /* Interrupt mask ep 9 */
#define UICR1_IM10 (1 << 2) /* Interrupt mask ep 10 */
#define UICR1_IM11 (1 << 3) /* Interrupt mask ep 11 */
#define UICR1_IM12 (1 << 4) /* Interrupt mask ep 12 */
#define UICR1_IM13 (1 << 5) /* Interrupt mask ep 13 */
#define UICR1_IM14 (1 << 6) /* Interrupt mask ep 14 */
#define UICR1_IM15 (1 << 7) /* Interrupt mask ep 15 */
#define USIR0 __REG(0x40600058) /* UDC Status Interrupt Register 0 */
#define USIR0_IR0 (1 << 0) /* Interrup request ep 0 */
#define USIR0_IR1 (1 << 1) /* Interrup request ep 1 */
#define USIR0_IR2 (1 << 2) /* Interrup request ep 2 */
#define USIR0_IR3 (1 << 3) /* Interrup request ep 3 */
#define USIR0_IR4 (1 << 4) /* Interrup request ep 4 */
#define USIR0_IR5 (1 << 5) /* Interrup request ep 5 */
#define USIR0_IR6 (1 << 6) /* Interrup request ep 6 */
#define USIR0_IR7 (1 << 7) /* Interrup request ep 7 */
#define USIR1 __REG(0x4060005C) /* UDC Status Interrupt Register 1 */
#define USIR1_IR8 (1 << 0) /* Interrup request ep 8 */
#define USIR1_IR9 (1 << 1) /* Interrup request ep 9 */
#define USIR1_IR10 (1 << 2) /* Interrup request ep 10 */
#define USIR1_IR11 (1 << 3) /* Interrup request ep 11 */
#define USIR1_IR12 (1 << 4) /* Interrup request ep 12 */
#define USIR1_IR13 (1 << 5) /* Interrup request ep 13 */
#define USIR1_IR14 (1 << 6) /* Interrup request ep 14 */
#define USIR1_IR15 (1 << 7) /* Interrup request ep 15 */
/*
* Fast Infrared Communication Port
......@@ -879,6 +1048,22 @@ typedef void (*ExcpHndlr) (void) ;
#define PGSR2 __REG(0x40F00028) /* Power Manager GPIO Sleep State Register for GP[84-64] */
#define RCSR __REG(0x40F00030) /* Reset Controller Status Register */
#define PSSR_RDH (1 << 5) /* Read Disable Hold */
#define PSSR_PH (1 << 4) /* Peripheral Control Hold */
#define PSSR_VFS (1 << 2) /* VDD Fault Status */
#define PSSR_BFS (1 << 1) /* Battery Fault Status */
#define PSSR_SSS (1 << 0) /* Software Sleep Status */
#define PCFR_DS (1 << 3) /* Deep Sleep Mode */
#define PCFR_FS (1 << 2) /* Float Static Chip Selects */
#define PCFR_FP (1 << 1) /* Float PCMCIA controls */
#define PCFR_OPDE (1 << 0) /* 3.6864 MHz oscillator power-down enable */
#define RCSR_GPR (1 << 3) /* GPIO Reset */
#define RCSR_SMR (1 << 2) /* Sleep Mode */
#define RCSR_WDR (1 << 1) /* Watchdog Reset */
#define RCSR_HWR (1 << 0) /* Hardware Reset */
/*
* SSP Serial Port Registers
......@@ -1035,3 +1220,19 @@ typedef void (*ExcpHndlr) (void) ;
#define MDMRS __REG(0x48000040) /* MRS value to be written to SDRAM */
#define BOOT_DEF __REG(0x48000044) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */
#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */
#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */
#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */
#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */
#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */
#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */
#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */
#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */
#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */
#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */
include/asm-arm/arch-sa1100/irqs.h
View file @ cbf3b4c9
......@@ -131,7 +131,8 @@
#ifdef CONFIG_SA1111
#define NR_IRQS (S1_BVD1_STSCHG + 1)
#elif defined(CONFIG_SA1100_GRAPHICSCLIENT) || \
defined(CONFIG_SA1100_GRAPHICSMASTER)
defined(CONFIG_SA1100_GRAPHICSMASTER) || \
defined(CONFIG_SA1100_H3800)
#define NR_IRQS (IRQ_BOARD_END)
#else
#define NR_IRQS (IRQ_BOARD_START)
......@@ -148,3 +149,24 @@
/* PT Digital Board Interrupts (CONFIG_SA1100_PT_SYSTEM3) */
#define IRQ_SYSTEM3_SA1111 (IRQ_BOARD_START + 0)
#define IRQ_SYSTEM3_SMC9196 (IRQ_BOARD_START + 1)
/* H3800-specific IRQs (CONFIG_SA1100_H3800) */
#define H3800_KPIO_IRQ_START (IRQ_BOARD_START)
#define IRQ_H3800_KEY (IRQ_BOARD_START + 0)
#define IRQ_H3800_SPI (IRQ_BOARD_START + 1)
#define IRQ_H3800_OWM (IRQ_BOARD_START + 2)
#define IRQ_H3800_ADC (IRQ_BOARD_START + 3)
#define IRQ_H3800_UART_0 (IRQ_BOARD_START + 4)
#define IRQ_H3800_UART_1 (IRQ_BOARD_START + 5)
#define IRQ_H3800_TIMER_0 (IRQ_BOARD_START + 6)
#define IRQ_H3800_TIMER_1 (IRQ_BOARD_START + 7)
#define IRQ_H3800_TIMER_2 (IRQ_BOARD_START + 8)
#define H3800_KPIO_IRQ_COUNT 9
#define H3800_GPIO_IRQ_START (IRQ_BOARD_START + 9)
#define IRQ_H3800_PEN (IRQ_BOARD_START + 9)
#define IRQ_H3800_SD_DETECT (IRQ_BOARD_START + 10)
#define IRQ_H3800_EAR_IN (IRQ_BOARD_START + 11)
#define IRQ_H3800_USB_DETECT (IRQ_BOARD_START + 12)
#define IRQ_H3800_SD_CON_SLT (IRQ_BOARD_START + 13)
#define H3800_GPIO_IRQ_COUNT 5
sound/arm/sa11xx-uda1341.c
View file @ cbf3b4c9
......@@ -101,9 +101,9 @@ static unsigned int rates[] = {
#define RATES sizeof(rates) / sizeof(rates[0])
static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
count: RATES,
list: rates,
mask: 0,
.count = RATES,
.list = rates,
.mask = 0,
};
/* }}} */
......@@ -545,46 +545,46 @@ static int snd_card_sa11xx_uda1341_pcm_trigger(stream_id_t stream_id,
static snd_pcm_hardware_t snd_sa11xx_uda1341_capture =
{
info: (SNDRV_PCM_INFO_INTERLEAVED |
.info = (SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID),
formats: SNDRV_PCM_FMTBIT_S16_LE,
rates: (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
SNDRV_PCM_RATE_KNOT),
rate_min: 8000,
rate_max: 48000,
channels_min: 2,
channels_max: 2,
buffer_bytes_max: 16380,
period_bytes_min: 64,
period_bytes_max: 8190, /* <= MAX_DMA_SIZE from ams/arch-sa1100/dma.h */
periods_min: 2,
periods_max: 255,
fifo_size: 0,
.rate_min = 8000,
.rate_max = 48000,
.channels_min: = 2,
.channels_max: = 2,
.buffer_bytes_max: = 16380,
.period_bytes_min: = 64,
.period_bytes_max: = 8190, /* <= MAX_DMA_SIZE from ams/arch-sa1100/dma.h */
.periods_min = 2,
.periods_max = 255,
.fifo_size = 0,
};
static snd_pcm_hardware_t snd_sa11xx_uda1341_playback =
{
info: (SNDRV_PCM_INFO_INTERLEAVED |
.info = (SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID),
formats: SNDRV_PCM_FMTBIT_S16_LE,
rates: (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
SNDRV_PCM_RATE_KNOT),
rate_min: 8000,
rate_max: 48000,
channels_min: 2,
channels_max: 2,
buffer_bytes_max: 16380,
period_bytes_min: 64,
period_bytes_max: 8190, /* <= MAX_DMA_SIZE from ams/arch-sa1100/dma.h */
periods_min: 2,
periods_max: 255,
fifo_size: 0,
.rate_min = 8000,
.rate_max = 48000,
.channels_min = 2,
.channels_max = 2,
.buffer_bytes_max = 16380,
.period_bytes_min = 64,
.period_bytes_max = 8190, /* <= MAX_DMA_SIZE from ams/arch-sa1100/dma.h */
.periods_min = 2,
.periods_max = 255,
.fifo_size = 0,
};
/* {{{ snd_card_sa11xx_uda1341_playback functions */
......@@ -752,25 +752,25 @@ static int snd_sa11xx_uda1341_hw_free(snd_pcm_substream_t * substream)
/* }}} */
static snd_pcm_ops_t snd_card_sa11xx_uda1341_playback_ops = {
open: snd_card_sa11xx_uda1341_playback_open,
close: snd_card_sa11xx_uda1341_playback_close,
ioctl: snd_card_sa11xx_uda1341_playback_ioctl,
hw_params: snd_sa11xx_uda1341_hw_params,
hw_free: snd_sa11xx_uda1341_hw_free,
prepare: snd_card_sa11xx_uda1341_playback_prepare,
trigger: snd_card_sa11xx_uda1341_playback_trigger,
pointer: snd_card_sa11xx_uda1341_playback_pointer,
.open = snd_card_sa11xx_uda1341_playback_open,
.close = snd_card_sa11xx_uda1341_playback_close,
.ioctl = snd_card_sa11xx_uda1341_playback_ioctl,
.hw_params = snd_sa11xx_uda1341_hw_params,
.hw_free = snd_sa11xx_uda1341_hw_free,
.prepare = snd_card_sa11xx_uda1341_playback_prepare,
.trigger = snd_card_sa11xx_uda1341_playback_trigger,
.pointer = snd_card_sa11xx_uda1341_playback_pointer,
};
static snd_pcm_ops_t snd_card_sa11xx_uda1341_capture_ops = {
open: snd_card_sa11xx_uda1341_capture_open,
close: snd_card_sa11xx_uda1341_capture_close,
ioctl: snd_card_sa11xx_uda1341_capture_ioctl,
hw_params: snd_sa11xx_uda1341_hw_params,
hw_free: snd_sa11xx_uda1341_hw_free,
prepare: snd_card_sa11xx_uda1341_capture_prepare,
trigger: snd_card_sa11xx_uda1341_capture_trigger,
pointer: snd_card_sa11xx_uda1341_capture_pointer,
.open = snd_card_sa11xx_uda1341_capture_open,
.close = snd_card_sa11xx_uda1341_capture_close,
.ioctl = snd_card_sa11xx_uda1341_capture_ioctl,
.hw_params = snd_sa11xx_uda1341_hw_params,
.hw_free = snd_sa11xx_uda1341_hw_free,
.prepare = snd_card_sa11xx_uda1341_capture_prepare,
.trigger = snd_card_sa11xx_uda1341_capture_trigger,
.pointer = snd_card_sa11xx_uda1341_capture_pointer,
};
static int __init snd_card_sa11xx_uda1341_pcm(sa11xx_uda1341_t *sa11xx_uda1341, int device, int substreams)
......
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