Commit cc003837 authored by Boris Brezillon's avatar Boris Brezillon

mtd: nand: atmel: switch to mtd_ooblayout_ops

Implementing the mtd_ooblayout_ops interface is the new way of exposing
ECC/OOB layout to MTD users.
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 50533187
...@@ -71,30 +71,44 @@ struct atmel_nand_nfc_caps { ...@@ -71,30 +71,44 @@ struct atmel_nand_nfc_caps {
uint32_t rb_mask; uint32_t rb_mask;
}; };
/* oob layout for large page size /*
* oob layout for large page size
* bad block info is on bytes 0 and 1 * bad block info is on bytes 0 and 1
* the bytes have to be consecutives to avoid * the bytes have to be consecutives to avoid
* several NAND_CMD_RNDOUT during read * several NAND_CMD_RNDOUT during read
*/ *
static struct nand_ecclayout atmel_oobinfo_large = { * oob layout for small page size
.eccbytes = 4,
.eccpos = {60, 61, 62, 63},
.oobfree = {
{2, 58}
},
};
/* oob layout for small page size
* bad block info is on bytes 4 and 5 * bad block info is on bytes 4 and 5
* the bytes have to be consecutives to avoid * the bytes have to be consecutives to avoid
* several NAND_CMD_RNDOUT during read * several NAND_CMD_RNDOUT during read
*/ */
static struct nand_ecclayout atmel_oobinfo_small = { static int atmel_ooblayout_ecc_sp(struct mtd_info *mtd, int section,
.eccbytes = 4, struct mtd_oob_region *oobregion)
.eccpos = {0, 1, 2, 3}, {
.oobfree = { if (section)
{6, 10} return -ERANGE;
},
oobregion->length = 4;
oobregion->offset = 0;
return 0;
}
static int atmel_ooblayout_free_sp(struct mtd_info *mtd, int section,
struct mtd_oob_region *oobregion)
{
if (section)
return -ERANGE;
oobregion->offset = 6;
oobregion->length = mtd->oobsize - oobregion->offset;
return 0;
}
static const struct mtd_ooblayout_ops atmel_ooblayout_sp_ops = {
.ecc = atmel_ooblayout_ecc_sp,
.free = atmel_ooblayout_free_sp,
}; };
struct atmel_nfc { struct atmel_nfc {
...@@ -162,8 +176,6 @@ struct atmel_nand_host { ...@@ -162,8 +176,6 @@ struct atmel_nand_host {
int *pmecc_delta; int *pmecc_delta;
}; };
static struct nand_ecclayout atmel_pmecc_oobinfo;
/* /*
* Enable NAND. * Enable NAND.
*/ */
...@@ -480,22 +492,6 @@ static int pmecc_get_ecc_bytes(int cap, int sector_size) ...@@ -480,22 +492,6 @@ static int pmecc_get_ecc_bytes(int cap, int sector_size)
return (m * cap + 7) / 8; return (m * cap + 7) / 8;
} }
static void pmecc_config_ecc_layout(struct nand_ecclayout *layout,
int oobsize, int ecc_len)
{
int i;
layout->eccbytes = ecc_len;
/* ECC will occupy the last ecc_len bytes continuously */
for (i = 0; i < ecc_len; i++)
layout->eccpos[i] = oobsize - ecc_len + i;
layout->oobfree[0].offset = PMECC_OOB_RESERVED_BYTES;
layout->oobfree[0].length =
oobsize - ecc_len - layout->oobfree[0].offset;
}
static void __iomem *pmecc_get_alpha_to(struct atmel_nand_host *host) static void __iomem *pmecc_get_alpha_to(struct atmel_nand_host *host)
{ {
int table_size; int table_size;
...@@ -1012,8 +1008,8 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd) ...@@ -1012,8 +1008,8 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd)
{ {
struct nand_chip *nand_chip = mtd_to_nand(mtd); struct nand_chip *nand_chip = mtd_to_nand(mtd);
struct atmel_nand_host *host = nand_get_controller_data(nand_chip); struct atmel_nand_host *host = nand_get_controller_data(nand_chip);
int eccbytes = mtd_ooblayout_count_eccbytes(mtd);
uint32_t val = 0; uint32_t val = 0;
struct nand_ecclayout *ecc_layout;
struct mtd_oob_region oobregion; struct mtd_oob_region oobregion;
pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST);
...@@ -1064,12 +1060,11 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd) ...@@ -1064,12 +1060,11 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd)
| PMECC_CFG_AUTO_DISABLE); | PMECC_CFG_AUTO_DISABLE);
pmecc_writel(host->ecc, CFG, val); pmecc_writel(host->ecc, CFG, val);
ecc_layout = nand_chip->ecc.layout;
pmecc_writel(host->ecc, SAREA, mtd->oobsize - 1); pmecc_writel(host->ecc, SAREA, mtd->oobsize - 1);
mtd_ooblayout_ecc(mtd, 0, &oobregion); mtd_ooblayout_ecc(mtd, 0, &oobregion);
pmecc_writel(host->ecc, SADDR, oobregion.offset); pmecc_writel(host->ecc, SADDR, oobregion.offset);
pmecc_writel(host->ecc, EADDR, pmecc_writel(host->ecc, EADDR,
oobregion.offset + ecc_layout->eccbytes - 1); oobregion.offset + eccbytes - 1);
/* See datasheet about PMECC Clock Control Register */ /* See datasheet about PMECC Clock Control Register */
pmecc_writel(host->ecc, CLK, 2); pmecc_writel(host->ecc, CLK, 2);
pmecc_writel(host->ecc, IDR, 0xff); pmecc_writel(host->ecc, IDR, 0xff);
...@@ -1291,11 +1286,8 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev, ...@@ -1291,11 +1286,8 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
err_no = -EINVAL; err_no = -EINVAL;
goto err; goto err;
} }
pmecc_config_ecc_layout(&atmel_pmecc_oobinfo,
mtd->oobsize,
nand_chip->ecc.total);
nand_chip->ecc.layout = &atmel_pmecc_oobinfo; mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
break; break;
default: default:
dev_warn(host->dev, dev_warn(host->dev,
...@@ -1650,19 +1642,19 @@ static int atmel_hw_nand_init_params(struct platform_device *pdev, ...@@ -1650,19 +1642,19 @@ static int atmel_hw_nand_init_params(struct platform_device *pdev,
/* set ECC page size and oob layout */ /* set ECC page size and oob layout */
switch (mtd->writesize) { switch (mtd->writesize) {
case 512: case 512:
nand_chip->ecc.layout = &atmel_oobinfo_small; mtd_set_ooblayout(mtd, &atmel_ooblayout_sp_ops);
ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528); ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528);
break; break;
case 1024: case 1024:
nand_chip->ecc.layout = &atmel_oobinfo_large; mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056); ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056);
break; break;
case 2048: case 2048:
nand_chip->ecc.layout = &atmel_oobinfo_large; mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112); ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112);
break; break;
case 4096: case 4096:
nand_chip->ecc.layout = &atmel_oobinfo_large; mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224); ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224);
break; break;
default: default:
......
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