Commit cc987f10 authored by Michael Hunold's avatar Michael Hunold Committed by Linus Torvalds

[PATCH] update dvb frontend drivers

 - update dvb frontend drivers
 - C99 initializers
 - fix up some includes
 - various bugfixes
parent e33951e1
......@@ -5,10 +5,9 @@ config DVB_STV0299
tristate "STV0299 based DVB-S frontend (QPSK)"
depends on DVB_CORE
help
A DVB-S tuner module.
Say Y when you want to support frontend based on this
demodulator.
The stv0299 by ST is used in many DVB-S tuner modules,
say Y when you want to support frontends based on this
DVB-S demodulator.
Some examples are the Alps BSRU6, the Philips SU1278 and
the LG TDQB-S00x.
......@@ -63,6 +62,17 @@ config DVB_ATMEL_AT76C651
DVB adapter simply enable all supported frontends, the
right one will get autodetected.
config DVB_CX24110
tristate "Frontends with Connexant CX24110 demodulator (QPSK)"
depends on DVB_CORE
help
The CX24110 Demodulator is used in some DVB-S frontends.
Say Y if you want support for this chip in your kernel.
If you don't know what tuner module is soldered on your
DVB adapter simply enable all supported frontends, the
right one will get autodetected.
config DVB_GRUNDIG_29504_491
tristate "Grundig 29504-491 (QPSK)"
depends on DVB_CORE
......
......@@ -9,6 +9,7 @@ obj-$(CONFIG_DVB_ALPS_BSRV2) += alps_bsrv2.o
obj-$(CONFIG_DVB_ALPS_TDLB7) += alps_tdlb7.o
obj-$(CONFIG_DVB_ALPS_TDMB7) += alps_tdmb7.o
obj-$(CONFIG_DVB_ATMEL_AT76C651) += at76c651.o
obj-$(CONFIG_DVB_CX24110) += cx24110.o
obj-$(CONFIG_DVB_GRUNDIG_29504_491) += grundig_29504-491.o
obj-$(CONFIG_DVB_GRUNDIG_29504_401) += grundig_29504-401.o
obj-$(CONFIG_DVB_VES1820) += ves1820.o
......@@ -20,8 +20,11 @@
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/slab.h>
#include "dvb_frontend.h"
......@@ -31,17 +34,17 @@ static int debug = 0;
static
struct dvb_frontend_info bsrv2_info = {
name: "Alps BSRV2",
type: FE_QPSK,
frequency_min: 950000,
frequency_max: 2150000,
frequency_stepsize: 250, /* kHz for QPSK frontends */
frequency_tolerance: 29500,
symbol_rate_min: 1000000,
symbol_rate_max: 45000000,
/* symbol_rate_tolerance: ???,*/
notifier_delay: 50, /* 1/20 s */
caps: FE_CAN_INVERSION_AUTO |
.name = "Alps BSRV2",
.type = FE_QPSK,
.frequency_min = 950000,
.frequency_max = 2150000,
.frequency_stepsize = 250, /* kHz for QPSK frontends */
.frequency_tolerance = 29500,
.symbol_rate_min = 1000000,
.symbol_rate_max = 45000000,
/* . symbol_rate_tolerance = ???,*/
.notifier_delay = 50, /* 1/20 s */
.caps = FE_CAN_INVERSION_AUTO |
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
FE_CAN_QPSK
......@@ -75,7 +78,7 @@ static
int ves1893_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data)
{
u8 buf [] = { 0x00, reg, data };
struct i2c_msg msg = { addr: 0x08, flags: 0, buf: buf, len: 3 };
struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = buf, .len = 3 };
int err;
if ((err = i2c->xfer (i2c, &msg, 1)) != 1) {
......@@ -93,8 +96,8 @@ u8 ves1893_readreg (struct dvb_i2c_bus *i2c, u8 reg)
int ret;
u8 b0 [] = { 0x00, reg };
u8 b1 [] = { 0 };
struct i2c_msg msg [] = { { addr: 0x08, flags: 0, buf: b0, len: 2 },
{ addr: 0x08, flags: I2C_M_RD, buf: b1, len: 1 } };
struct i2c_msg msg [] = { { .addr = 0x08, .flags = 0, .buf = b0, .len = 2 },
{ .addr = 0x08, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
ret = i2c->xfer (i2c, msg, 2);
......@@ -109,7 +112,7 @@ static
int sp5659_write (struct dvb_i2c_bus *i2c, u8 data [4])
{
int ret;
struct i2c_msg msg = { addr: 0x61, flags: 0, buf: data, len: 4 };
struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = 4 };
ret = i2c->xfer (i2c, &msg, 1);
......@@ -211,7 +214,7 @@ int ves1893_set_symbolrate (struct dvb_i2c_bus *i2c, u32 srate)
u32 BDRI;
u32 tmp;
dprintk("%s: srate == %d\n", __FUNCTION__, srate);
dprintk("%s: srate == %ud\n", __FUNCTION__, (unsigned int) srate);
if (srate > 90100000UL/2)
srate = 90100000UL/2;
......@@ -257,9 +260,9 @@ int ves1893_set_symbolrate (struct dvb_i2c_bus *i2c, u32 srate)
BDRI = ( ((FIN << 8) / ((srate << (FNR >> 1)) >> 2)) + 1) >> 1;
dprintk("FNR= %d\n", FNR);
dprintk("ratio= %08x\n", ratio);
dprintk("BDR= %08x\n", BDR);
dprintk("BDRI= %02x\n", BDRI);
dprintk("ratio= %08x\n", (unsigned int) ratio);
dprintk("BDR= %08x\n", (unsigned int) BDR);
dprintk("BDRI= %02x\n", (unsigned int) BDRI);
if (BDRI > 0xff)
BDRI = 0xff;
......@@ -294,6 +297,8 @@ int ves1893_set_voltage (struct dvb_i2c_bus *i2c, fe_sec_voltage_t voltage)
return ves1893_writereg (i2c, 0x1f, 0x20);
case SEC_VOLTAGE_18:
return ves1893_writereg (i2c, 0x1f, 0x30);
case SEC_VOLTAGE_OFF:
return ves1893_writereg (i2c, 0x1f, 0x00);
default:
return -EINVAL;
}
......@@ -387,12 +392,12 @@ int bsrv2_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
case FE_GET_FRONTEND:
{
struct dvb_frontend_parameters *p = arg;
s32 afc;
int afc;
afc = ((int)((char)(ves1893_readreg (i2c, 0x0a) << 1)))/2;
afc = (afc * (int)(p->u.qpsk.symbol_rate/8))/16;
afc = (afc * (int)(p->u.qpsk.symbol_rate/1000/8))/16;
p->frequency += afc;
p->frequency -= afc;
p->inversion = (ves1893_readreg (i2c, 0x0f) & 2) ?
INVERSION_ON : INVERSION_OFF;
p->u.qpsk.fec_inner = ves1893_get_fec (i2c);
......
......@@ -72,19 +72,19 @@ static int errno;
static
struct dvb_frontend_info tdlb7_info = {
name: "Alps TDLB7",
type: FE_OFDM,
frequency_min: 470000000,
frequency_max: 860000000,
frequency_stepsize: 166666,
.name = "Alps TDLB7",
.type = FE_OFDM,
.frequency_min = 470000000,
.frequency_max = 860000000,
.frequency_stepsize = 166666,
#if 0
frequency_tolerance: ???,
symbol_rate_min: ???,
symbol_rate_max: ???,
symbol_rate_tolerance: ???,
notifier_delay: 0,
.frequency_tolerance = ???,
.symbol_rate_min = ???,
.symbol_rate_max = ???,
.symbol_rate_tolerance = ???,
.notifier_delay = 0,
#endif
caps: FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64
};
......@@ -94,7 +94,7 @@ static
int sp8870_writereg (struct dvb_i2c_bus *i2c, u16 reg, u16 data)
{
u8 buf [] = { reg >> 8, reg & 0xff, data >> 8, data & 0xff };
struct i2c_msg msg = { addr: 0x71, flags: 0, buf: buf, len: 4 };
struct i2c_msg msg = { .addr = 0x71, .flags = 0, .buf = buf, .len = 4 };
int err;
if ((err = i2c->xfer (i2c, &msg, 1)) != 1) {
......@@ -112,8 +112,8 @@ u16 sp8870_readreg (struct dvb_i2c_bus *i2c, u16 reg)
int ret;
u8 b0 [] = { reg >> 8 , reg & 0xff };
u8 b1 [] = { 0, 0 };
struct i2c_msg msg [] = { { addr: 0x71, flags: 0, buf: b0, len: 2 },
{ addr: 0x71, flags: I2C_M_RD, buf: b1, len: 2 } };
struct i2c_msg msg [] = { { .addr = 0x71, .flags = 0, .buf = b0, .len = 2 },
{ .addr = 0x71, .flags = I2C_M_RD, .buf = b1, .len = 2 } };
ret = i2c->xfer (i2c, msg, 2);
......@@ -128,7 +128,7 @@ static
int sp5659_write (struct dvb_i2c_bus *i2c, u8 data [4])
{
int ret;
struct i2c_msg msg = { addr: 0x60, flags: 0, buf: data, len: 4 };
struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = 4 };
ret = i2c->xfer (i2c, &msg, 1);
......@@ -419,7 +419,7 @@ static
int tdlb7_attach (struct dvb_i2c_bus *i2c)
{
struct i2c_msg msg = { addr: 0x71, flags: 0, buf: NULL, len: 0 };
struct i2c_msg msg = { .addr = 0x71, .flags = 0, .buf = NULL, .len = 0 };
dprintk ("%s\n", __FUNCTION__);
......
......@@ -20,10 +20,14 @@
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>
#include "dvb_frontend.h"
#include "dvb_functions.h"
static int debug = 0;
......@@ -32,33 +36,25 @@ static int debug = 0;
static
struct dvb_frontend_info tdmb7_info = {
name: "Alps TDMB7",
type: FE_OFDM,
frequency_min: 470000000,
frequency_max: 860000000,
frequency_stepsize: 166667,
.name = "Alps TDMB7",
.type = FE_OFDM,
.frequency_min = 470000000,
.frequency_max = 860000000,
.frequency_stepsize = 166667,
#if 0
frequency_tolerance: ???,
symbol_rate_min: ???,
symbol_rate_max: ???,
symbol_rate_tolerance: 500, /* ppm */
notifier_delay: 0,
.frequency_tolerance = ???,
.symbol_rate_min = ???,
.symbol_rate_max = ???,
.symbol_rate_tolerance = 500, /* ppm */
.notifier_delay = 0,
#endif
caps: FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
FE_CAN_CLEAN_SETUP | FE_CAN_RECOVER
};
static
inline void ddelay (int timeout)
{
current->state=TASK_INTERRUPTIBLE;
schedule_timeout(timeout);
}
static
u8 init_tab [] = {
0x04, 0x10,
......@@ -87,7 +83,7 @@ int cx22700_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data)
{
int ret;
u8 buf [] = { reg, data };
struct i2c_msg msg = { addr: 0x43, flags: 0, buf: buf, len: 2 };
struct i2c_msg msg = { .addr = 0x43, .flags = 0, .buf = buf, .len = 2 };
dprintk ("%s\n", __FUNCTION__);
......@@ -107,8 +103,8 @@ u8 cx22700_readreg (struct dvb_i2c_bus *i2c, u8 reg)
int ret;
u8 b0 [] = { reg };
u8 b1 [] = { 0 };
struct i2c_msg msg [] = { { addr: 0x43, flags: 0, buf: b0, len: 1 },
{ addr: 0x43, flags: I2C_M_RD, buf: b1, len: 1 } };
struct i2c_msg msg [] = { { .addr = 0x43, .flags = 0, .buf = b0, .len = 1 },
{ .addr = 0x43, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
dprintk ("%s\n", __FUNCTION__);
......@@ -124,7 +120,7 @@ u8 cx22700_readreg (struct dvb_i2c_bus *i2c, u8 reg)
static
int pll_write (struct dvb_i2c_bus *i2c, u8 data [4])
{
struct i2c_msg msg = { addr: 0x61, flags: 0, buf: data, len: 4 };
struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = 4 };
int ret;
cx22700_writereg (i2c, 0x0a, 0x00); /* open i2c bus switch */
......@@ -154,7 +150,7 @@ int pll_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
freq < 470000000 ? 0x42 : freq < 862000000 ? 0x41 : 0x81 };
#endif
dprintk ("%s: freq == %i, div == %i\n", __FUNCTION__, freq, div);
dprintk ("%s: freq == %i, div == %i\n", __FUNCTION__, (int) freq, (int) div);
return pll_write (i2c, buf);
}
......@@ -170,7 +166,7 @@ int cx22700_init (struct dvb_i2c_bus *i2c)
cx22700_writereg (i2c, 0x00, 0x02); /* soft reset */
cx22700_writereg (i2c, 0x00, 0x00);
ddelay (HZ/100);
dvb_delay (HZ/100);
for (i=0; i<sizeof(init_tab); i+=2)
cx22700_writereg (i2c, init_tab[i], init_tab[i+1]);
......@@ -355,7 +351,7 @@ int tdmb7_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
}
case FE_READ_BER:
*((uint32_t*) arg) = cx22700_readreg (i2c, 0x0c) & 0x7f;
*((u32*) arg) = cx22700_readreg (i2c, 0x0c) & 0x7f;
cx22700_writereg (i2c, 0x0c, 0x00);
break;
......@@ -363,18 +359,18 @@ int tdmb7_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
{
u16 rs_ber = (cx22700_readreg (i2c, 0x0d) << 9)
| (cx22700_readreg (i2c, 0x0e) << 1);
*((uint16_t*) arg) = ~rs_ber;
*((u16*) arg) = ~rs_ber;
break;
}
case FE_READ_SNR:
{
u16 rs_ber = (cx22700_readreg (i2c, 0x0d) << 9)
| (cx22700_readreg (i2c, 0x0e) << 1);
*((uint16_t*) arg) = ~rs_ber;
*((u16*) arg) = ~rs_ber;
break;
}
case FE_READ_UNCORRECTED_BLOCKS:
*((uint32_t*) arg) = cx22700_readreg (i2c, 0x0f);
*((u32*) arg) = cx22700_readreg (i2c, 0x0f);
cx22700_writereg (i2c, 0x0f, 0x00);
break;
......@@ -420,7 +416,7 @@ int tdmb7_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
static
int tdmb7_attach (struct dvb_i2c_bus *i2c)
{
struct i2c_msg msg = { addr: 0x43, flags: 0, buf: NULL, len: 0 };
struct i2c_msg msg = { .addr = 0x43, .flags = 0, .buf = NULL,. len = 0 };
dprintk ("%s\n", __FUNCTION__);
......
......@@ -22,11 +22,11 @@
*
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#if defined(__powerpc__)
#include <asm/bitops.h>
......@@ -34,6 +34,7 @@
#include "dvb_frontend.h"
#include "dvb_i2c.h"
#include "dvb_functions.h"
static int debug = 0;
......@@ -67,8 +68,8 @@ static struct dvb_frontend_info at76c651_info = {
FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | FE_CAN_QAM_128 |
FE_CAN_QAM_256,
/* FE_CAN_QAM_512 | FE_CAN_QAM_1024 | */
FE_CAN_QAM_256 /* | FE_CAN_QAM_512 | FE_CAN_QAM_1024 */ |
FE_CAN_RECOVER | FE_CAN_CLEAN_SETUP | FE_CAN_MUTE_TS
};
......@@ -94,7 +95,7 @@ at76c651_writereg(struct dvb_i2c_bus *i2c, u8 reg, u8 data)
int ret;
u8 buf[] = { reg, data };
struct i2c_msg msg = { addr:0x1a >> 1, flags:0, buf:buf, len:2 };
struct i2c_msg msg = { .addr = 0x1a >> 1, .flags = 0, .buf = buf, .len = 2 };
ret = i2c->xfer(i2c, &msg, 1);
......@@ -103,7 +104,7 @@ at76c651_writereg(struct dvb_i2c_bus *i2c, u8 reg, u8 data)
"(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
__FUNCTION__, reg, data, ret);
mdelay(10);
dvb_delay(10);
return (ret != 1) ? -EREMOTEIO : 0;
......@@ -116,8 +117,8 @@ at76c651_readreg(struct dvb_i2c_bus *i2c, u8 reg)
int ret;
u8 b0[] = { reg };
u8 b1[] = { 0 };
struct i2c_msg msg[] = { {addr: 0x1a >> 1, flags: 0, buf: b0, len:1},
{addr: 0x1a >> 1, flags: I2C_M_RD, buf: b1, len:1} };
struct i2c_msg msg[] = { {.addr = 0x1a >> 1, .flags = 0, .buf = b0, .len = 1},
{.addr = 0x1a >> 1, .flags = I2C_M_RD, .buf = b1, .len = 1} };
ret = i2c->xfer(i2c, msg, 2);
......@@ -192,7 +193,7 @@ dat7021_write(struct dvb_i2c_bus *i2c, u32 tw)
int ret;
struct i2c_msg msg =
{ addr:0xc2 >> 1, flags:0, buf:(u8 *) & tw, len:sizeof (tw) };
{ .addr = 0xc2 >> 1, .flags = 0, .buf = (u8 *) & tw, .len = sizeof (tw) };
at76c651_switch_tuner_i2c(i2c, 1);
......
......@@ -32,17 +32,17 @@ static int sct = 0;
static
struct dvb_frontend_info dvb_s_dummyfe_info = {
name: "DVB-S dummy frontend",
type: FE_QPSK,
frequency_min: 950000,
frequency_max: 2150000,
frequency_stepsize: 250, /* kHz for QPSK frontends */
frequency_tolerance: 29500,
symbol_rate_min: 1000000,
symbol_rate_max: 45000000,
/* symbol_rate_tolerance: ???,*/
notifier_delay: 50, /* 1/20 s */
caps: FE_CAN_INVERSION_AUTO |
.name = "DVB-S dummy frontend",
.type = FE_QPSK,
.frequency_min = 950000,
.frequency_max = 2150000,
.frequency_stepsize = 250, /* kHz for QPSK frontends */
.frequency_tolerance = 29500,
.symbol_rate_min = 1000000,
.symbol_rate_max = 45000000,
/* .symbol_rate_tolerance = ???,*/
.notifier_delay = 50, /* 1/20 s */
.caps = FE_CAN_INVERSION_AUTO |
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
FE_CAN_QPSK
......@@ -58,9 +58,9 @@ struct dvb_frontend_info dvb_c_dummyfe_info = {
.symbol_rate_min = (57840000/2)/64, /* SACLK/64 == (XIN/2)/64 */
.symbol_rate_max = (57840000/2)/4, /* SACLK/4 */
#if 0
frequency_tolerance: ???,
symbol_rate_tolerance: ???, /* ppm */ /* == 8% (spec p. 5) */
notifier_delay: ?,
.frequency_tolerance = ???,
.symbol_rate_tolerance = ???, /* ppm */ /* == 8% (spec p. 5) */
.notifier_delay = ?,
#endif
.caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
FE_CAN_QAM_128 | FE_CAN_QAM_256 |
......
......@@ -22,10 +22,14 @@
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>
#include "dvb_frontend.h"
#include "dvb_functions.h"
static int debug = 0;
......@@ -33,15 +37,15 @@ static int debug = 0;
struct dvb_frontend_info grundig_29504_401_info = {
name: "Grundig 29504-401",
type: FE_OFDM,
/* frequency_min: ???,*/
/* frequency_max: ???,*/
frequency_stepsize: 166666,
/* frequency_tolerance: ???,*/
/* symbol_rate_tolerance: ???,*/
notifier_delay: 0,
caps: FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
.name = "Grundig 29504-401",
.type = FE_OFDM,
/* .frequency_min = ???,*/
/* .frequency_max = ???,*/
.frequency_stepsize = 166666,
/* .frequency_tolerance = ???,*/
/* .symbol_rate_tolerance = ???,*/
.notifier_delay = 0,
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
FE_CAN_MUTE_TS /*| FE_CAN_CLEAN_SETUP*/
......@@ -53,7 +57,7 @@ int l64781_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data)
{
int ret;
u8 buf [] = { reg, data };
struct i2c_msg msg = { addr: 0x55, flags: 0, buf: buf, len: 2 };
struct i2c_msg msg = { .addr = 0x55, .flags = 0, .buf = buf, .len = 2 };
if ((ret = i2c->xfer (i2c, &msg, 1)) != 1)
dprintk ("%s: write_reg error (reg == %02x) = %02x!\n",
......@@ -69,8 +73,8 @@ u8 l64781_readreg (struct dvb_i2c_bus *i2c, u8 reg)
int ret;
u8 b0 [] = { reg };
u8 b1 [] = { 0 };
struct i2c_msg msg [] = { { addr: 0x55, flags: 0, buf: b0, len: 1 },
{ addr: 0x55, flags: I2C_M_RD, buf: b1, len: 1 } };
struct i2c_msg msg [] = { { .addr = 0x55, .flags = 0, .buf = b0, .len = 1 },
{ .addr = 0x55, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
ret = i2c->xfer (i2c, msg, 2);
......@@ -85,7 +89,7 @@ static
int tsa5060_write (struct dvb_i2c_bus *i2c, u8 data [4])
{
int ret;
struct i2c_msg msg = { addr: 0x61, flags: 0, buf: data, len: 4 };
struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = 4 };
if ((ret = i2c->xfer (i2c, &msg, 1)) != 1)
dprintk ("%s: write_reg error == %02x!\n", __FUNCTION__, ret);
......@@ -97,22 +101,27 @@ int tsa5060_write (struct dvb_i2c_bus *i2c, u8 data [4])
/**
* set up the downconverter frequency divisor for a
* reference clock comparision frequency of 166666 Hz.
* frequency offset is 36000000 Hz.
* frequency offset is 36125000 Hz.
*/
static
int tsa5060_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
{
u32 div;
u8 buf [4];
u8 cfg;
u8 cfg, cpump, band_select;
div = (36000000 + freq) / 166666;
div = (36125000 + freq) / 166666;
cfg = 0x88;
cpump = div < 175000000 ? 2 : div < 390000000 ? 1 :
div < 470000000 ? 2 : div < 750000000 ? 1 : 3;
band_select = div < 175000000 ? 0x0e : div < 470000000 ? 0x05 : 0x03;
buf [0] = (div >> 8) & 0x7f;
buf [1] = div & 0xff;
buf [2] = ((div >> 10) & 0x60) | cfg;
buf [3] = 0xc0;
buf [3] = cpump | band_select;
return tsa5060_write (i2c, buf);
}
......@@ -269,7 +278,7 @@ static
void reset_and_configure (struct dvb_i2c_bus *i2c)
{
u8 buf [] = { 0x06 };
struct i2c_msg msg = { addr: 0x00, flags: 0, buf: buf, len: 1 };
struct i2c_msg msg = { .addr = 0x00, .flags = 0, .buf = buf, .len = 1 };
i2c->xfer (i2c, &msg, 1);
}
......@@ -420,8 +429,8 @@ int l64781_attach (struct dvb_i2c_bus *i2c)
{
u8 b0 [] = { 0x1a };
u8 b1 [] = { 0x00 };
struct i2c_msg msg [] = { { addr: 0x55, flags: 0, buf: b0, len: 1 },
{ addr: 0x55, flags: I2C_M_RD, buf: b1, len: 1 } };
struct i2c_msg msg [] = { { .addr = 0x55, .flags = 0, .buf = b0, .len = 1 },
{ .addr = 0x55, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
if (i2c->xfer (i2c, msg, 2) == 2) /* probably an EEPROM... */
return -ENODEV;
......
......@@ -25,9 +25,13 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>
#include "dvb_frontend.h"
#include "dvb_functions.h"
static int debug = 0;
#define dprintk if (debug) printk
......@@ -35,17 +39,17 @@ static int debug = 0;
static
struct dvb_frontend_info grundig_29504_491_info = {
name: "Grundig 29504-491, (TDA8083 based)",
type: FE_QPSK,
frequency_min: 950000, /* FIXME: guessed! */
frequency_max: 1400000, /* FIXME: guessed! */
frequency_stepsize: 125, /* kHz for QPSK frontends */
/* frequency_tolerance: ???,*/
symbol_rate_min: 1000000, /* FIXME: guessed! */
symbol_rate_max: 45000000, /* FIXME: guessed! */
/* symbol_rate_tolerance: ???,*/
notifier_delay: 0,
caps: FE_CAN_INVERSION_AUTO |
.name = "Grundig 29504-491, (TDA8083 based)",
.type = FE_QPSK,
.frequency_min = 950000, /* FIXME: guessed! */
.frequency_max = 1400000, /* FIXME: guessed! */
.frequency_stepsize = 125, /* kHz for QPSK frontends */
/* .frequency_tolerance = ???,*/
.symbol_rate_min = 1000000, /* FIXME: guessed! */
.symbol_rate_max = 45000000, /* FIXME: guessed! */
/* .symbol_rate_tolerance = ???,*/
.notifier_delay = 0,
.caps = FE_CAN_INVERSION_AUTO |
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
......@@ -72,7 +76,7 @@ int tda8083_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data)
{
int ret;
u8 buf [] = { reg, data };
struct i2c_msg msg = { addr: 0x68, flags: 0, buf: buf, len: 2 };
struct i2c_msg msg = { .addr = 0x68, .flags = 0, .buf = buf, .len = 2 };
ret = i2c->xfer (i2c, &msg, 1);
......@@ -88,8 +92,8 @@ static
int tda8083_readregs (struct dvb_i2c_bus *i2c, u8 reg1, u8 *b, u8 len)
{
int ret;
struct i2c_msg msg [] = { { addr: 0x68, flags: 0, buf: &reg1, len: 1 },
{ addr: 0x68, flags: I2C_M_RD, buf: b, len: len } };
struct i2c_msg msg [] = { { .addr = 0x68, .flags = 0, .buf = &reg1, .len = 1 },
{ .addr = 0x68, .flags = I2C_M_RD, .buf = b, .len = len } };
ret = i2c->xfer (i2c, msg, 2);
......@@ -116,7 +120,7 @@ static
int tsa5522_write (struct dvb_i2c_bus *i2c, u8 data [4])
{
int ret;
struct i2c_msg msg = { addr: 0x61, flags: 0, buf: data, len: 4 };
struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = 4 };
ret = i2c->xfer (i2c, &msg, 1);
......@@ -222,7 +226,7 @@ int tda8083_set_symbolrate (struct dvb_i2c_bus *i2c, u32 srate)
tmp = (tmp % srate) << 8;
ratio = (ratio << 8) + tmp / srate;
dprintk("tda8083: ratio == %08x\n", ratio);
dprintk("tda8083: ratio == %08x\n", (unsigned int) ratio);
tda8083_writereg (i2c, 0x05, filter);
tda8083_writereg (i2c, 0x02, (ratio >> 16) & 0xff);
......@@ -244,8 +248,7 @@ void tda8083_wait_diseqc_fifo (struct dvb_i2c_bus *i2c, int timeout)
while (jiffies - start < timeout &&
!(tda8083_readreg(i2c, 0x02) & 0x80))
{
current->state = TASK_INTERRUPTIBLE;
schedule_timeout (5);
dvb_delay(50);
};
}
......
......@@ -25,13 +25,11 @@
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/poll.h>
#include <asm/io.h>
#include <linux/i2c.h>
#include "dvb_frontend.h"
#include "nxt6000.h"
......@@ -90,11 +88,11 @@ static int nxt6000_write(struct dvb_i2c_bus *i2c, u8 addr, u8 reg, u8 data)
{
u8 buf[] = {reg, data};
struct i2c_msg msg = {addr: addr >> 1, flags: 0, buf: buf, len: 2};
struct i2c_msg msg = {.addr = addr >> 1, .flags = 0, .buf = buf, .len = 2};
int ret;
if ((ret = i2c->xfer(i2c, &msg, 1)) != 1)
dprintk("nxt6000: nxt6000_write error (addr: 0x%02X, reg: 0x%02X, data: 0x%02X, ret: %d)\n", addr, reg, data, ret);
dprintk("nxt6000: nxt6000_write error (.addr = 0x%02X, reg: 0x%02X, data: 0x%02X, ret: %d)\n", addr, reg, data, ret);
return (ret != 1) ? -EFAULT : 0;
......@@ -115,13 +113,13 @@ static u8 nxt6000_read(struct dvb_i2c_bus *i2c, u8 addr, u8 reg)
int ret;
u8 b0[] = {reg};
u8 b1[] = {0};
struct i2c_msg msgs[] = {{addr: addr >> 1, flags: 0, buf: b0, len: 1},
{addr: addr >> 1, flags: I2C_M_RD, buf: b1, len: 1}};
struct i2c_msg msgs[] = {{.addr = addr >> 1, .flags = 0, .buf = b0, .len = 1},
{.addr = addr >> 1, .flags = I2C_M_RD, .buf = b1, .len = 1}};
ret = i2c->xfer(i2c, msgs, 2);
if (ret != 2)
dprintk("nxt6000: nxt6000_read error (addr: 0x%02X, reg: 0x%02X, ret: %d)\n", addr, reg, ret);
dprintk("nxt6000: nxt6000_read error (.addr = 0x%02X, reg: 0x%02X, ret: %d)\n", addr, reg, ret);
return b1[0];
......@@ -139,7 +137,7 @@ static u8 nxt6000_readreg(struct dvb_frontend *fe, u8 reg)
static int pll_write(struct dvb_i2c_bus *i2c, u8 demod_addr, u8 tuner_addr, u8 *buf, u8 len)
{
struct i2c_msg msg = {addr: tuner_addr >> 1, flags: 0, buf: buf, len: len};
struct i2c_msg msg = {.addr = tuner_addr >> 1, .flags = 0, .buf = buf, .len = len};
int ret;
nxt6000_write(i2c, demod_addr, ENABLE_TUNER_IIC, 0x01); /* open i2c bus switch */
......
......@@ -36,35 +36,43 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include "dvb_frontend.h"
#include "dvb_functions.h"
#if 0
#define dprintk(x...) printk(x)
#else
#define dprintk(x...)
#endif
static int debug = 0;
#define dprintk if (debug) printk
/* frontend types */
#define UNKNOWN_FRONTEND -1
#define PHILIPS_SU1278SH 0
#define ALPS_BSRU6 1
#define LG_TDQF_S001F 2
#define PHILIPS_SU1278 3
/* Master Clock = 88 MHz */
#define M_CLK (88000000UL)
static
struct dvb_frontend_info uni0299_info = {
name: "STV0299/TSA5059/SL1935 based",
type: FE_QPSK,
frequency_min: 950000,
frequency_max: 2150000,
frequency_stepsize: 125, /* kHz for QPSK frontends */
frequency_tolerance: M_CLK/2000,
symbol_rate_min: 1000000,
symbol_rate_max: 45000000,
symbol_rate_tolerance: 500, /* ppm */
notifier_delay: 0,
caps: FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
.name = "STV0299/TSA5059/SL1935 based",
.type = FE_QPSK,
.frequency_min = 950000,
.frequency_max = 2150000,
.frequency_stepsize = 125, /* kHz for QPSK frontends */
.frequency_tolerance = M_CLK/2000,
.symbol_rate_min = 1000000,
.symbol_rate_max = 45000000,
.symbol_rate_tolerance = 500, /* ppm */
.notifier_delay = 0,
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
FE_CAN_QPSK |
FE_CAN_FEC_AUTO | FE_CAN_INVERSION_AUTO |
......@@ -74,11 +82,6 @@ struct dvb_frontend_info uni0299_info = {
static
u8 init_tab [] = {
/* clock registers */
0x01, 0x15, /* K = 0, DIRCLK = 0, M = 0x15 */
0x02, 0x30, /* STDBY = 0, VCO = 0 (ON), SERCLK = 0, P = 0 */
/* f_VCO = 4MHz * 4 * (M+1) / (K+1) = 352 MHz */
0x03, 0x00, /* auxiliary clock not used */
0x04, 0x7d, /* F22FR = 0x7d */
/* F22 = f_VCO / 128 / 0x7d = 22 kHz */
......@@ -90,7 +93,7 @@ u8 init_tab [] = {
0x07, 0x00, /* DAC LSB */
/* DiSEqC registers */
0x08, 0x40, /* DiSEqC off */
0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
0x09, 0x00, /* FIFO */
/* Input/Output configuration register */
......@@ -105,34 +108,27 @@ u8 init_tab [] = {
0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
0x10, 0x3f, // AGC2 0x3d
0x11, 0x84,
0x12, 0xb5, // Lock detect: -64 Carrier freq detect:on
0x13, 0xb6, // alpha_car b:4 a:0 noise est:256ks derot:on
0x14, 0x93, // beat carc:0 d:0 e:0xf phase detect algo: 1
0x15, 0xc9, // lock detector threshold
0x16, 0x1d, /* AGC1 integrator value */
0x16, 0x00,
0x17, 0x00,
0x18, 0x14,
0x19, 0xf2,
0x1a, 0x11,
0x18, 0x00,
0x19, 0x00,
0x1a, 0x00,
0x1b, 0x9c,
0x1c, 0x00,
0x1d, 0x00,
0x1e, 0x0b,
0x1f, 0x50,
0x20, 0x00,
0x21, 0x00,
0x22, 0x00,
0x23, 0x00,
0x24, 0xff,
0x25, 0xff,
0x26, 0xff,
0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
0x29, 0x1e, // 1/2 threshold
0x2a, 0x14, // 2/3 threshold
0x2b, 0x0f, // 3/4 threshold
......@@ -145,38 +141,6 @@ u8 init_tab [] = {
0x32, 0x19, // viterbi and synchro search
0x33, 0xfc, // rs control
0x34, 0x93, // error control
0x0b, 0x00,
0x27, 0x00,
0x2f, 0x00,
0x30, 0x00,
0x35, 0x00,
0x36, 0x00,
0x37, 0x00,
0x38, 0x00,
0x39, 0x00,
0x3a, 0x00,
0x3b, 0x00,
0x3c, 0x00,
0x3d, 0x00,
0x3e, 0x00,
0x3f, 0x00,
0x40, 0x00,
0x41, 0x00,
0x42, 0x00,
0x43, 0x00,
0x44, 0x00,
0x45, 0x00,
0x46, 0x00,
0x47, 0x00,
0x48, 0x00,
0x49, 0x00,
0x4a, 0x00,
0x4b, 0x00,
0x4c, 0x00,
0x4d, 0x00,
0x4e, 0x00,
0x4f, 0x00
};
......@@ -185,15 +149,13 @@ int stv0299_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data)
{
int ret;
u8 buf [] = { reg, data };
struct i2c_msg msg = { addr: 0x68, flags: 0, buf: buf, len: 2 };
dprintk ("%s\n", __FUNCTION__);
struct i2c_msg msg = { .addr = 0x68, .flags = 0, .buf = buf, .len = 2 };
ret = i2c->xfer (i2c, &msg, 1);
if (ret != 1)
dprintk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
__FUNCTION__, reg, data, ret);
dprintk("%s: writereg error (reg == 0x%02x, val == 0x%02x, "
"ret == %i)\n", __FUNCTION__, reg, data, ret);
return (ret != 1) ? -1 : 0;
}
......@@ -205,10 +167,8 @@ u8 stv0299_readreg (struct dvb_i2c_bus *i2c, u8 reg)
int ret;
u8 b0 [] = { reg };
u8 b1 [] = { 0 };
struct i2c_msg msg [] = { { addr: 0x68, flags: 0, buf: b0, len: 1 },
{ addr: 0x68, flags: I2C_M_RD, buf: b1, len: 1 } };
dprintk ("%s\n", __FUNCTION__);
struct i2c_msg msg [] = { { .addr = 0x68, .flags = 0, .buf = b0, .len = 1 },
{ .addr = 0x68, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
ret = i2c->xfer (i2c, msg, 2);
......@@ -223,44 +183,34 @@ static
int stv0299_readregs (struct dvb_i2c_bus *i2c, u8 reg1, u8 *b, u8 len)
{
int ret;
struct i2c_msg msg [] = { { addr: 0x68, flags: 0, buf: &reg1, len: 1 },
{ addr: 0x68, flags: I2C_M_RD, buf: b, len: len } };
dprintk ("%s\n", __FUNCTION__);
struct i2c_msg msg [] = { { .addr = 0x68, .flags = 0, .buf = &reg1, .len = 1 },
{ .addr = 0x68, .flags = I2C_M_RD, .buf = b, .len = len } };
ret = i2c->xfer (i2c, msg, 2);
if (ret != 2)
dprintk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
return ret == 2 ? 0 : -1;
return ret == 2 ? 0 : ret;
}
static
int pll_write (struct dvb_i2c_bus *i2c, u8 data [4], int ftype)
int pll_write (struct dvb_i2c_bus *i2c, u8 addr, u8 *data, int len)
{
int ret;
u8 rpt1 [] = { 0x05, 0xb5 }; /* enable i2c repeater on stv0299 */
/* TSA5059 i2c-bus address */
u8 addr = (ftype == PHILIPS_SU1278SH) ? 0x60 : 0x61;
struct i2c_msg msg [] = {{ addr: 0x68, flags: 0, buf: rpt1, len: 2 },
{ addr: addr, flags: 0, buf: data, len: 4 }};
u8 rpt2 [] = { 0x05, 0x35 }; /* disable i2c repeater on stv0299 */
struct i2c_msg msg [] = {{ .addr = 0x68, .flags = 0, .buf = rpt1, .len = 2 },
{ addr: addr, .flags = 0, .buf = data, .len = len },
{ .addr = 0x68, .flags = 0, .buf = rpt2, .len = 2 }};
dprintk ("%s\n", __FUNCTION__);
ret = i2c->xfer (i2c, msg, 3);
if (ftype == LG_TDQF_S001F || ftype == ALPS_BSRU6) {
ret = i2c->xfer (i2c, &msg[0], 1);
ret += i2c->xfer (i2c, &msg[1], 1);
}
else {
ret = i2c->xfer (i2c, msg, 2);
}
if (ret != 2)
dprintk("%s: i/o error (ret == %i)\n", __FUNCTION__, ret);
if (ret != 3)
printk("%s: i/o error (ret == %i)\n", __FUNCTION__, ret);
return (ret != 2) ? -1 : 0;
return (ret != 3) ? ret : 0;
}
......@@ -288,7 +238,7 @@ int sl1935_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, int ftype)
else
buf[3] = 0x00;
return pll_write (i2c, buf, ftype);
return pll_write (i2c, 0x61, buf, sizeof(buf));
}
/**
......@@ -298,10 +248,12 @@ int sl1935_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, int ftype)
static
int tsa5059_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, int ftype)
{
u8 addr = (ftype == PHILIPS_SU1278SH) ? 0x60 : 0x61;
u32 div = freq / 125;
u8 buf[4] = { (div >> 8) & 0x7f, div & 0xff, 0x84 };
dprintk ("%s: freq %i, ftype %i\n", __FUNCTION__, freq, ftype);
if (ftype == PHILIPS_SU1278SH)
/* activate f_xtal/f_comp signal output */
/* charge pump current C0/C1 = 00 */
......@@ -309,16 +261,144 @@ int tsa5059_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, int ftype)
else
buf[3] = freq > 1530000 ? 0xc0 : 0xc4;
dprintk ("%s\n", __FUNCTION__);
return pll_write (i2c, addr, buf, sizeof(buf));
}
return pll_write (i2c, buf, ftype);
#define ABS(x) ((x) < 0 ? -(x) : (x))
#define MIN2(a,b) ((a) < (b) ? (a) : (b))
#define MIN3(a,b,c) MIN2(MIN2(a,b),c)
static
int tua6100_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq,
int ftype, int srate)
{
u8 reg0 [2] = { 0x00, 0x00 };
u8 reg1 [4] = { 0x01, 0x00, 0x00, 0x00 };
u8 reg2 [3] = { 0x02, 0x00, 0x00 };
int _fband;
int first_ZF;
int R, A, N, P, M;
int err;
first_ZF = (freq) / 1000;
if (ABS(MIN2(ABS(first_ZF-1190),ABS(first_ZF-1790))) <
ABS(MIN3(ABS(first_ZF-1202),ABS(first_ZF-1542),ABS(first_ZF-1890))))
_fband = 2;
else
_fband = 3;
if (_fband == 2) {
if (((first_ZF >= 950) && (first_ZF < 1350)) ||
((first_ZF >= 1430) && (first_ZF < 1950)))
reg0[1] = 0x07;
else if (((first_ZF >= 1350) && (first_ZF < 1430)) ||
((first_ZF >= 1950) && (first_ZF < 2150)))
reg0[1] = 0x0B;
}
if(_fband == 3) {
if (((first_ZF >= 950) && (first_ZF < 1350)) ||
((first_ZF >= 1455) && (first_ZF < 1950)))
reg0[1] = 0x07;
else if (((first_ZF >= 1350) && (first_ZF < 1420)) ||
((first_ZF >= 1950) && (first_ZF < 2150)))
reg0[1] = 0x0B;
else if ((first_ZF >= 1420) && (first_ZF < 1455))
reg0[1] = 0x0F;
}
if (first_ZF > 1525)
reg1[1] |= 0x80;
else
reg1[1] &= 0x7F;
if (_fband == 2) {
if (first_ZF > 1430) { /* 1430MHZ */
reg1[1] &= 0xCF; /* N2 */
reg2[1] &= 0xCF; /* R2 */
reg2[1] |= 0x10;
} else {
reg1[1] &= 0xCF; /* N2 */
reg1[1] |= 0x20;
reg2[1] &= 0xCF; /* R2 */
reg2[1] |= 0x10;
}
}
if (_fband == 3) {
if ((first_ZF >= 1455) &&
(first_ZF < 1630)) {
reg1[1] &= 0xCF; /* N2 */
reg1[1] |= 0x20;
reg2[1] &= 0xCF; /* R2 */
} else {
if (first_ZF < 1455) {
reg1[1] &= 0xCF; /* N2 */
reg1[1] |= 0x20;
reg2[1] &= 0xCF; /* R2 */
reg2[1] |= 0x10;
} else {
if (first_ZF >= 1630) {
reg1[1] &= 0xCF; /* N2 */
reg2[1] &= 0xCF; /* R2 */
reg2[1] |= 0x10;
}
}
}
}
/* set ports, enable P0 for symbol rates > 4Ms/s */
if (srate >= 4000000)
reg1[1] |= 0x0c;
else
reg1[1] |= 0x04;
reg2[1] |= 0x0c;
R = 64;
A = 64;
P = 64; //32
M = (freq * R) / 4; /* in Mhz */
N = (M - A * 1000) / (P * 1000);
reg1[1] |= (N >> 9) & 0x03;
reg1[2] = (N >> 1) & 0xff;
reg1[3] = (N << 7) & 0x80;
reg2[1] |= (R >> 8) & 0x03;
reg2[2] = R & 0xFF; /* R */
reg1[3] |= A & 0x7f; /* A */
if (P == 64)
reg1[1] |= 0x40; /* Prescaler 64/65 */
reg0[1] |= 0x03;
if ((err = pll_write(i2c, 0x60, reg0, sizeof(reg0))))
return err;
if ((err = pll_write(i2c, 0x60, reg1, sizeof(reg1))))
return err;
if ((err = pll_write(i2c, 0x60, reg2, sizeof(reg2))))
return err;
return 0;
}
static
int pll_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, int ftype)
int pll_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, int ftype, int srate)
{
if (ftype == LG_TDQF_S001F)
return sl1935_set_tv_freq(i2c, freq, ftype);
else if (ftype == PHILIPS_SU1278)
return tua6100_set_tv_freq(i2c, freq, ftype, srate);
else
return tsa5059_set_tv_freq(i2c, freq, ftype);
}
......@@ -331,8 +411,8 @@ int tsa5059_read_status (struct dvb_i2c_bus *i2c)
u8 rpt1 [] = { 0x05, 0xb5 };
u8 stat [] = { 0 };
struct i2c_msg msg [] = {{ addr: 0x68, flags: 0, buf: rpt1, len: 2 },
{ addr: 0x60, flags: I2C_M_RD, buf: stat, len: 1 }};
struct i2c_msg msg [] = {{ .addr = 0x68, .flags = 0, .buf = rpt1, .len = 2 },
{ .addr = 0x60, .flags = I2C_M_RD, .buf = stat, .len = 1 }};
dprintk ("%s\n", __FUNCTION__);
......@@ -353,12 +433,18 @@ int stv0299_init (struct dvb_i2c_bus *i2c, int ftype)
dprintk("stv0299: init chip\n");
stv0299_writereg (i2c, 0x01, 0x15);
stv0299_writereg (i2c, 0x02, ftype == PHILIPS_SU1278 ? 0x00 : 0x30);
stv0299_writereg (i2c, 0x03, 0x00);
for (i=0; i<sizeof(init_tab); i+=2)
stv0299_writereg (i2c, init_tab[i], init_tab[i+1]);
/* AGC1 reference register setup */
if (ftype == PHILIPS_SU1278SH)
stv0299_writereg (i2c, 0x0f, 0xd2); /* Iagc = Inverse, m1 = 18 */
else if (ftype == PHILIPS_SU1278)
stv0299_writereg (i2c, 0x0f, 0x94); /* Iagc = Inverse, m1 = 18 */
else
stv0299_writereg (i2c, 0x0f, 0x52); /* Iagc = Normal, m1 = 18 */
......@@ -371,10 +457,13 @@ int stv0299_check_inversion (struct dvb_i2c_bus *i2c)
{
dprintk ("%s\n", __FUNCTION__);
if ((stv0299_readreg (i2c, 0x1b) & 0x98) != 0x98) {
dvb_delay(30);
if ((stv0299_readreg (i2c, 0x1b) & 0x98) != 0x98) {
u8 val = stv0299_readreg (i2c, 0x0c);
return stv0299_writereg (i2c, 0x0c, val ^ 0x01);
}
}
return 0;
}
......@@ -435,8 +524,7 @@ int stv0299_wait_diseqc_fifo (struct dvb_i2c_bus *i2c, int timeout)
dprintk ("%s: timeout!!\n", __FUNCTION__);
return -ETIMEDOUT;
}
current->state = TASK_INTERRUPTIBLE;
schedule_timeout (1);
dvb_delay(10);
};
return 0;
......@@ -455,8 +543,7 @@ int stv0299_wait_diseqc_idle (struct dvb_i2c_bus *i2c, int timeout)
dprintk ("%s: timeout!!\n", __FUNCTION__);
return -ETIMEDOUT;
}
current->state = TASK_INTERRUPTIBLE;
schedule_timeout (1);
dvb_delay(10);
};
return 0;
......@@ -528,7 +615,9 @@ int stv0299_set_tone (struct dvb_i2c_bus *i2c, fe_sec_tone_mode_t tone)
{
u8 val;
dprintk ("%s\n", __FUNCTION__);
dprintk("%s: %s\n", __FUNCTION__,
tone == SEC_TONE_ON ? "SEC_TONE_ON" :
tone == SEC_TONE_OFF ? "SEC_TONE_OFF" : "??");
if (stv0299_wait_diseqc_idle (i2c, 100) < 0)
return -ETIMEDOUT;
......@@ -549,23 +638,38 @@ int stv0299_set_tone (struct dvb_i2c_bus *i2c, fe_sec_tone_mode_t tone)
static
int stv0299_set_voltage (struct dvb_i2c_bus *i2c, fe_sec_voltage_t voltage)
{
u8 val;
u8 reg0x08;
u8 reg0x0c;
dprintk ("%s\n", __FUNCTION__);
dprintk("%s: %s\n", __FUNCTION__,
voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" :
voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??");
val = stv0299_readreg (i2c, 0x0c);
val &= 0x0f;
val |= 0x40; /* LNB power on */
reg0x08 = stv0299_readreg (i2c, 0x08);
reg0x0c = stv0299_readreg (i2c, 0x0c);
/**
* H/V switching over OP0, OP1 and OP2 are LNB power enable bits
*/
reg0x0c &= 0x0f;
if (voltage == SEC_VOLTAGE_OFF) {
stv0299_writereg (i2c, 0x08, reg0x08 & ~0x40);
return stv0299_writereg (i2c, 0x0c, reg0x0c & ~0x40);
} else {
stv0299_writereg (i2c, 0x08, reg0x08 | 0x40);
reg0x0c |= 0x40; /* LNB power on */
switch (voltage) {
case SEC_VOLTAGE_13:
return stv0299_writereg (i2c, 0x0c, val);
return stv0299_writereg (i2c, 0x0c, reg0x0c);
case SEC_VOLTAGE_18:
return stv0299_writereg (i2c, 0x0c, val | 0x10);
return stv0299_writereg (i2c, 0x0c, reg0x0c | 0x10);
default:
return -EINVAL;
};
}
}
static
......@@ -642,11 +746,9 @@ int stv0299_get_symbolrate (struct dvb_i2c_bus *i2c)
static
int uni0299_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
{
int tuner_type = (int)fe->data;
int tuner_type = (long) fe->data;
struct dvb_i2c_bus *i2c = fe->i2c;
dprintk ("%s\n", __FUNCTION__);
switch (cmd) {
case FE_GET_INFO:
memcpy (arg, &uni0299_info, sizeof(struct dvb_frontend_info));
......@@ -692,7 +794,7 @@ int uni0299_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
dprintk ("AGC2I: 0x%02x%02x, signal=0x%04x\n",
stv0299_readreg (i2c, 0x18),
stv0299_readreg (i2c, 0x19), signal);
stv0299_readreg (i2c, 0x19), (int) signal);
signal = signal * 5 / 4;
*((u16*) arg) = (signal > 0xffff) ? 0xffff :
......@@ -716,15 +818,16 @@ int uni0299_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
{
struct dvb_frontend_parameters *p = arg;
pll_set_tv_freq (i2c, p->frequency, tuner_type);
pll_set_tv_freq (i2c, p->frequency, tuner_type,
p->u.qpsk.symbol_rate);
stv0299_set_FEC (i2c, p->u.qpsk.fec_inner);
stv0299_set_symbolrate (i2c, p->u.qpsk.symbol_rate);
stv0299_check_inversion (i2c);
/* pll_set_tv_freq (i2c, p->frequency, tuner_type); */
stv0299_writereg (i2c, 0x22, 0x00);
stv0299_writereg (i2c, 0x23, 0x00);
stv0299_readreg (i2c, 0x23);
stv0299_writereg (i2c, 0x12, 0xb9);
stv0299_check_inversion (i2c);
/* printk ("%s: tsa5059 status: %x\n", __FUNCTION__, tsa5059_read_status(i2c)); */
break;
......@@ -752,19 +855,13 @@ int uni0299_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
case FE_SLEEP:
stv0299_writereg (i2c, 0x0c, 0x00); /* LNB power off! */
stv0299_writereg (i2c, 0x08, 0x00); /* LNB power off! */
stv0299_writereg (i2c, 0x02, 0x80);
break;
case FE_INIT:
return stv0299_init (i2c, tuner_type);
case FE_RESET:
stv0299_writereg (i2c, 0x22, 0x00);
stv0299_writereg (i2c, 0x23, 0x00);
stv0299_readreg (i2c, 0x23);
stv0299_writereg (i2c, 0x12, 0xb9);
break;
case FE_DISEQC_SEND_MASTER_CMD:
return stv0299_send_diseqc_msg (i2c, arg);
......@@ -785,47 +882,66 @@ int uni0299_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
}
static
int probe_tuner (struct dvb_i2c_bus *i2c)
long probe_tuner (struct dvb_i2c_bus *i2c)
{
int type;
/* read the status register of TSA5059 */
u8 rpt[] = { 0x05, 0xb5 };
u8 stat [] = { 0 };
struct i2c_msg msg1 [] = {{ addr: 0x68, flags: 0, buf: rpt, len: 2 },
{ addr: 0x60, flags: I2C_M_RD, buf: stat, len: 1 }};
struct i2c_msg msg2 [] = {{ addr: 0x68, flags: 0, buf: rpt, len: 2 },
{ addr: 0x61, flags: I2C_M_RD, buf: stat, len: 1 }};
if (i2c->xfer(i2c, msg1, 2) == 2) {
type = PHILIPS_SU1278SH;
u8 tda6100_buf [] = { 0, 0 };
int ret;
struct i2c_msg msg1 [] = {{ .addr = 0x68, .flags = 0, .buf = rpt, len: 2 },
{ .addr = 0x60, .flags = I2C_M_RD, .buf = stat, .len = 1 }};
struct i2c_msg msg2 [] = {{ .addr = 0x68, .flags = 0, .buf = rpt, len: 2 },
{ .addr = 0x61, .flags = I2C_M_RD, .buf = stat, .len = 1 }};
struct i2c_msg msg3 [] = {{ .addr = 0x68, .flags = 0, .buf = rpt, len: 2 },
{ .addr = 0x60, .flags = 0, .buf = tda6100_buf, .len = 2 }};
stv0299_writereg (i2c, 0x01, 0x15);
stv0299_writereg (i2c, 0x02, 0x30);
stv0299_writereg (i2c, 0x03, 0x00);
if ((ret = i2c->xfer(i2c, msg1, 2)) == 2) {
printk ("%s: setup for tuner SU1278/SH\n", __FILE__);
} else if (i2c->xfer(i2c, msg2, 2) == 2) {
if (0) { // if ((stat[0] & 0x3f) == 0) {
type = LG_TDQF_S001F;
printk ("%s: setup for tuner TDQF-S001F\n", __FILE__);
}
else {
type = ALPS_BSRU6;
printk ("%s: setup for tuner BSRU6, TDQB-S00x\n", __FILE__);
return PHILIPS_SU1278SH;
}
if ((ret = i2c->xfer(i2c, msg2, 2)) == 2) {
//if ((stat[0] & 0x3f) == 0) {
if (0) {
printk ("%s: setup for tuner TDQF-S001F\n", __FILE__);
return LG_TDQF_S001F;
} else {
type = UNKNOWN_FRONTEND;
printk ("%s: unknown PLL synthesizer, "
"please report to <linuxdvb@linuxtv.org>!!\n",
printk ("%s: setup for tuner BSRU6, TDQB-S00x\n",
__FILE__);
return ALPS_BSRU6;
}
}
/**
* setup i2c timing for SU1278...
*/
stv0299_writereg (i2c, 0x02, 0x00);
if ((ret = i2c->xfer(i2c, msg3, 2)) == 2) {
printk ("%s: setup for tuner Philips SU1278\n", __FILE__);
return PHILIPS_SU1278;
}
return type;
printk ("%s: unknown PLL synthesizer (ret == %i), "
"please report to <linuxdvb@linuxtv.org>!!\n",
__FILE__, ret);
return UNKNOWN_FRONTEND;
}
static
int uni0299_attach (struct dvb_i2c_bus *i2c)
{
int tuner_type;
long tuner_type;
u8 id = stv0299_readreg (i2c, 0x00);
dprintk ("%s\n", __FUNCTION__);
dprintk ("%s: id == 0x%02x\n", __FUNCTION__, id);
/* register 0x00 contains 0xa1 for STV0299 and STV0299B */
/* register 0x00 might contain 0x80 when returning from standby */
......@@ -855,8 +971,7 @@ static
int __init init_uni0299 (void)
{
dprintk ("%s\n", __FUNCTION__);
return dvb_register_i2c_device (THIS_MODULE, uni0299_attach, uni0299_detach);
return dvb_register_i2c_device (NULL, uni0299_attach, uni0299_detach);
}
......@@ -871,9 +986,6 @@ void __exit exit_uni0299 (void)
module_init (init_uni0299);
module_exit (exit_uni0299);
MODULE_PARM(debug,"i");
MODULE_PARM_DESC(debug, "enable verbose debug messages");
MODULE_DESCRIPTION("Universal STV0299/TSA5059/SL1935 DVB Frontend driver");
MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Peter Schildmann, Felix Domke, Andreas Oberritter");
MODULE_LICENSE("GPL");
......
......@@ -19,11 +19,15 @@
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/slab.h>
#include "dvb_frontend.h"
#include "dvb_functions.h"
#if 0
......@@ -39,37 +43,33 @@
*/
#define SET_PWM(data,pwm) do { \
(int) data &= ~0xff; \
(int) data |= pwm; \
(long) data &= ~0xff; \
(long) data |= pwm; \
} while (0)
#define SET_REG0(data,reg0) do { \
(int) data &= ~(0xff << 8); \
(int) data |= reg0 << 8; \
(long) data &= ~(0xff << 8); \
(long) data |= reg0 << 8; \
} while (0)
#define SET_TUNER(data,type) do { \
(int) data &= ~(0xff << 16); \
(int) data |= type << 16; \
(long) data &= ~(0xff << 16); \
(long) data |= type << 16; \
} while (0)
#define SET_DEMOD_ADDR(data,type) do { \
(int) data &= ~(0xff << 24); \
(int) data |= type << 24; \
(long) data &= ~(0xff << 24); \
(long) data |= type << 24; \
} while (0)
#define GET_PWM(data) ((u8) ((int) data & 0xff))
#define GET_REG0(data) ((u8) (((int) data >> 8) & 0xff))
#define GET_TUNER(data) ((u8) (((int) data >> 16) & 0xff))
#define GET_DEMOD_ADDR(data) ((u8) (((int) data >> 24) & 0xff))
#define GET_PWM(data) ((u8) ((long) data & 0xff))
#define GET_REG0(data) ((u8) (((long) data >> 8) & 0xff))
#define GET_TUNER(data) ((u8) (((long) data >> 16) & 0xff))
#define GET_DEMOD_ADDR(data) ((u8) (((long) data >> 24) & 0xff))
#define XIN 57840000UL
#define FIN (XIN >> 4)
static inline
void ddelay (int ms)
{
current->state=TASK_INTERRUPTIBLE;
schedule_timeout((HZ*ms)/1000);
}
static
......@@ -79,8 +79,8 @@ struct dvb_frontend_info ves1820_info = {
.frequency_stepsize = 62500,
.frequency_min = 51000000,
.frequency_max = 858000000,
.symbol_rate_min = (57840000/2)/64, /* SACLK/64 == (XIN/2)/64 */
.symbol_rate_max = (57840000/2)/4, /* SACLK/4 */
.symbol_rate_min = (XIN/2)/64, /* SACLK/64 == (XIN/2)/64 */
.symbol_rate_max = (XIN/2)/4, /* SACLK/4 */
#if 0
frequency_tolerance: ???,
symbol_rate_tolerance: ???, /* ppm */ /* == 8% (spec p. 5) */
......@@ -112,7 +112,7 @@ int ves1820_writereg (struct dvb_frontend *fe, u8 reg, u8 data)
{
u8 addr = GET_DEMOD_ADDR(fe->data);
u8 buf[] = { 0x00, reg, data };
struct i2c_msg msg = { addr: addr, flags: 0, buf: buf, len: 3 };
struct i2c_msg msg = { addr: addr, .flags = 0, .buf = buf, .len = 3 };
struct dvb_i2c_bus *i2c = fe->i2c;
int ret;
......@@ -123,7 +123,7 @@ int ves1820_writereg (struct dvb_frontend *fe, u8 reg, u8 data)
"(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
__FUNCTION__, reg, data, ret);
mdelay(10);
dvb_delay(10);
return (ret != 1) ? -EREMOTEIO : 0;
}
......@@ -134,8 +134,8 @@ u8 ves1820_readreg (struct dvb_frontend *fe, u8 reg)
u8 b0 [] = { 0x00, reg };
u8 b1 [] = { 0 };
u8 addr = GET_DEMOD_ADDR(fe->data);
struct i2c_msg msg [] = { { addr: addr, flags: 0, buf: b0, len: 2 },
{ addr: addr, flags: I2C_M_RD, buf: b1, len: 1 } };
struct i2c_msg msg [] = { { addr: addr, .flags = 0, .buf = b0, .len = 2 },
{ addr: addr, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
struct dvb_i2c_bus *i2c = fe->i2c;
int ret;
......@@ -152,7 +152,7 @@ static
int tuner_write (struct dvb_i2c_bus *i2c, u8 addr, u8 data [4])
{
int ret;
struct i2c_msg msg = { addr: addr, flags: 0, buf: data, len: 4 };
struct i2c_msg msg = { addr: addr, .flags = 0, .buf = data, .len = 4 };
ret = i2c->xfer (i2c, &msg, 1);
......@@ -170,7 +170,7 @@ int tuner_write (struct dvb_i2c_bus *i2c, u8 addr, u8 data [4])
static
int tuner_set_tv_freq (struct dvb_frontend *fe, u32 freq)
{
u32 div;
u32 div, ifreq;
static u8 addr [] = { 0x61, 0x62 };
static u8 byte3 [] = { 0x8e, 0x85 };
int tuner_type = GET_TUNER(fe->data);
......@@ -179,7 +179,13 @@ int tuner_set_tv_freq (struct dvb_frontend *fe, u32 freq)
if (tuner_type == 0xff) /* PLL not reachable over i2c ... */
return 0;
div = (freq + 36125000 + 31250) / 62500;
if (strstr (fe->i2c->adapter->name, "Technotrend"))
ifreq = 35937500;
else
ifreq = 36125000;
div = (freq + ifreq + 31250) / 62500;
buf[0] = (div >> 8) & 0x7f;
buf[1] = div & 0xff;
buf[2] = byte3[tuner_type];
......@@ -198,18 +204,24 @@ int tuner_set_tv_freq (struct dvb_frontend *fe, u32 freq)
static
int ves1820_setup_reg0 (struct dvb_frontend *fe, u8 reg0)
int ves1820_setup_reg0 (struct dvb_frontend *fe, u8 reg0,
fe_spectral_inversion_t inversion)
{
reg0 |= GET_REG0(fe->data) & 0x62;
if (INVERSION_ON == inversion)
reg0 &= ~0x20;
else if (INVERSION_OFF == inversion)
reg0 |= 0x20;
ves1820_writereg (fe, 0x00, reg0 & 0xfe);
ves1820_writereg (fe, 0x00, reg0 | 0x01);
/**
* check lock and toggle inversion bit if required...
*/
if (!(ves1820_readreg (fe, 0x11) & 0x08)) {
ddelay(1);
if (INVERSION_AUTO == inversion && !(ves1820_readreg (fe, 0x11) & 0x08)) {
dvb_delay(10);
if (!(ves1820_readreg (fe, 0x11) & 0x08)) {
reg0 ^= 0x20;
ves1820_writereg (fe, 0x00, reg0 & 0xfe);
......@@ -250,9 +262,6 @@ int ves1820_set_symbolrate (struct dvb_frontend *fe, u32 symbolrate)
u16 NDEC = 0;
u32 tmp, ratio;
#define XIN 57840000UL
#define FIN (XIN >> 4)
if (symbolrate > XIN/2)
symbolrate = XIN/2;
......@@ -305,7 +314,7 @@ int ves1820_set_parameters (struct dvb_frontend *fe,
struct dvb_frontend_parameters *p)
{
static const u8 reg0x00 [] = { 0x00, 0x04, 0x08, 0x0c, 0x10 };
static const u8 reg0x01 [] = { 140, 140, 106, 120, 92 };
static const u8 reg0x01 [] = { 140, 140, 106, 100, 92 };
static const u8 reg0x05 [] = { 135, 100, 70, 54, 38 };
static const u8 reg0x08 [] = { 162, 116, 67, 52, 35 };
static const u8 reg0x09 [] = { 145, 150, 106, 126, 107 };
......@@ -323,7 +332,7 @@ int ves1820_set_parameters (struct dvb_frontend *fe,
ves1820_writereg (fe, 0x08, reg0x08[real_qam]);
ves1820_writereg (fe, 0x09, reg0x09[real_qam]);
ves1820_setup_reg0 (fe, reg0x00[real_qam]);
ves1820_setup_reg0 (fe, reg0x00[real_qam], p->inversion);
return 0;
}
......@@ -400,15 +409,31 @@ int ves1820_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
return ves1820_set_parameters (fe, arg);
case FE_GET_FRONTEND:
/* XXX FIXME: implement! */
/*
struct frontend *front = (struct frontend *)arg;
{
struct dvb_frontend_parameters *p = (struct dvb_frontend_parameters *)arg;
u8 reg0 = GET_REG0(fe->data);
int sync;
s8 afc = 0;
front->afc=(int)((char)(readreg(client,0x19)));
front->afc=(front->afc*(int)(front->param.u.qam.SymbolRate/8))/128;
*/
break;
sync = ves1820_readreg (fe, 0x11);
if (sync & 2)
/* AFC only valid when carrier has been recovered */
afc = ves1820_readreg(fe, 0x19);
printk ("%s: AFC (%d) %dHz\n", __FILE__, afc,
-((s32)(p->u.qam.symbol_rate >> 3) * afc >> 7));
p->inversion = reg0 & 0x20 ? INVERSION_OFF : INVERSION_ON;
p->u.qam.modulation = ((reg0 >> 2) & 7) + QAM_16;
p->u.qam.fec_inner = FEC_NONE;
p->frequency = ((p->frequency + 31250) / 62500) * 62500;
// To prevent overflow, shift symbol rate first a
// couple of bits.
p->frequency -= (s32)(p->u.qam.symbol_rate >> 3) * afc >> 7;
break;
}
case FE_SLEEP:
ves1820_writereg (fe, 0x1b, 0x02); /* pdown ADC */
ves1820_writereg (fe, 0x00, 0x80); /* standby */
......@@ -426,12 +451,12 @@ int ves1820_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
static
int probe_tuner (struct dvb_i2c_bus *i2c)
long probe_tuner (struct dvb_i2c_bus *i2c)
{
static const
struct i2c_msg msg1 = { addr: 0x61, flags: 0, buf: NULL, len: 0 };
struct i2c_msg msg1 = { .addr = 0x61, .flags = 0, .buf = NULL, .len = 0 };
static const
struct i2c_msg msg2 = { addr: 0x62, flags: 0, buf: NULL, len: 0 };
struct i2c_msg msg2 = { .addr = 0x62, .flags = 0, .buf = NULL, .len = 0 };
int type;
if (i2c->xfer(i2c, &msg1, 1) == 1) {
......@@ -456,8 +481,8 @@ u8 read_pwm (struct dvb_i2c_bus *i2c)
{
u8 b = 0xff;
u8 pwm;
struct i2c_msg msg [] = { { addr: 0x50, flags: 0, buf: &b, len: 1 },
{ addr: 0x50, flags: I2C_M_RD, buf: &pwm, len: 1 } };
struct i2c_msg msg [] = { { .addr = 0x50, .flags = 0, .buf = &b, .len = 1 },
{ .addr = 0x50, .flags = I2C_M_RD, .buf = &pwm, .len = 1 } };
i2c->xfer (i2c, msg, 2);
......@@ -471,12 +496,12 @@ u8 read_pwm (struct dvb_i2c_bus *i2c)
static
int probe_demod_addr (struct dvb_i2c_bus *i2c)
long probe_demod_addr (struct dvb_i2c_bus *i2c)
{
u8 b [] = { 0x00, 0x1a };
u8 id;
struct i2c_msg msg [] = { { addr: 0x08, flags: 0, buf: b, len: 2 },
{ addr: 0x08, flags: I2C_M_RD, buf: &id, len: 1 } };
struct i2c_msg msg [] = { { .addr = 0x08, .flags = 0, .buf = b, .len = 2 },
{ .addr = 0x08, .flags = I2C_M_RD, .buf = &id, .len = 1 } };
if (i2c->xfer(i2c, msg, 2) == 2 && (id & 0xf0) == 0x70)
return msg[0].addr;
......@@ -494,8 +519,8 @@ static
int ves1820_attach (struct dvb_i2c_bus *i2c)
{
void *data = NULL;
int demod_addr;
int tuner_type;
long demod_addr;
long tuner_type;
if ((demod_addr = probe_demod_addr(i2c)) < 0)
return -ENODEV;
......
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