Commit ccb8a29e authored by Jason Gunthorpe's avatar Jason Gunthorpe

RDMA/hns: Fix endian problems around imm_data and rkey

This matches the changes made recently to the userspace hns
driver when it was made sparse clean.

See rdma-core commit bffd380cfe56 ("libhns: Make the provider sparse
clean")

wc->imm_data is not used in the kernel so this change has no practical
impact.
Signed-off-by: default avatarJason Gunthorpe <jgg@mellanox.com>
parent c966ea12
...@@ -2311,15 +2311,16 @@ static int hns_roce_v1_poll_one(struct hns_roce_cq *hr_cq, ...@@ -2311,15 +2311,16 @@ static int hns_roce_v1_poll_one(struct hns_roce_cq *hr_cq,
case HNS_ROCE_OPCODE_RDMA_WITH_IMM_RECEIVE: case HNS_ROCE_OPCODE_RDMA_WITH_IMM_RECEIVE:
wc->opcode = IB_WC_RECV_RDMA_WITH_IMM; wc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
wc->wc_flags = IB_WC_WITH_IMM; wc->wc_flags = IB_WC_WITH_IMM;
wc->ex.imm_data = le32_to_cpu(cqe->immediate_data); wc->ex.imm_data =
cpu_to_be32(le32_to_cpu(cqe->immediate_data));
break; break;
case HNS_ROCE_OPCODE_SEND_DATA_RECEIVE: case HNS_ROCE_OPCODE_SEND_DATA_RECEIVE:
if (roce_get_bit(cqe->cqe_byte_4, if (roce_get_bit(cqe->cqe_byte_4,
CQE_BYTE_4_IMM_INDICATOR_S)) { CQE_BYTE_4_IMM_INDICATOR_S)) {
wc->opcode = IB_WC_RECV; wc->opcode = IB_WC_RECV;
wc->wc_flags = IB_WC_WITH_IMM; wc->wc_flags = IB_WC_WITH_IMM;
wc->ex.imm_data = le32_to_cpu( wc->ex.imm_data = cpu_to_be32(
cqe->immediate_data); le32_to_cpu(cqe->immediate_data));
} else { } else {
wc->opcode = IB_WC_RECV; wc->opcode = IB_WC_RECV;
wc->wc_flags = 0; wc->wc_flags = 0;
......
...@@ -1709,7 +1709,7 @@ static int hns_roce_v2_poll_one(struct hns_roce_cq *hr_cq, ...@@ -1709,7 +1709,7 @@ static int hns_roce_v2_poll_one(struct hns_roce_cq *hr_cq,
case HNS_ROCE_V2_OPCODE_RDMA_WRITE_IMM: case HNS_ROCE_V2_OPCODE_RDMA_WRITE_IMM:
wc->opcode = IB_WC_RECV_RDMA_WITH_IMM; wc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
wc->wc_flags = IB_WC_WITH_IMM; wc->wc_flags = IB_WC_WITH_IMM;
wc->ex.imm_data = le32_to_cpu(cqe->rkey_immtdata); wc->ex.imm_data = cqe->immtdata;
break; break;
case HNS_ROCE_V2_OPCODE_SEND: case HNS_ROCE_V2_OPCODE_SEND:
wc->opcode = IB_WC_RECV; wc->opcode = IB_WC_RECV;
...@@ -1718,12 +1718,12 @@ static int hns_roce_v2_poll_one(struct hns_roce_cq *hr_cq, ...@@ -1718,12 +1718,12 @@ static int hns_roce_v2_poll_one(struct hns_roce_cq *hr_cq,
case HNS_ROCE_V2_OPCODE_SEND_WITH_IMM: case HNS_ROCE_V2_OPCODE_SEND_WITH_IMM:
wc->opcode = IB_WC_RECV; wc->opcode = IB_WC_RECV;
wc->wc_flags = IB_WC_WITH_IMM; wc->wc_flags = IB_WC_WITH_IMM;
wc->ex.imm_data = le32_to_cpu(cqe->rkey_immtdata); wc->ex.imm_data = cqe->immtdata;
break; break;
case HNS_ROCE_V2_OPCODE_SEND_WITH_INV: case HNS_ROCE_V2_OPCODE_SEND_WITH_INV:
wc->opcode = IB_WC_RECV; wc->opcode = IB_WC_RECV;
wc->wc_flags = IB_WC_WITH_INVALIDATE; wc->wc_flags = IB_WC_WITH_INVALIDATE;
wc->ex.invalidate_rkey = cqe->rkey_immtdata; wc->ex.invalidate_rkey = le32_to_cpu(cqe->rkey);
break; break;
default: default:
wc->status = IB_WC_GENERAL_ERR; wc->status = IB_WC_GENERAL_ERR;
......
...@@ -762,7 +762,10 @@ struct hns_roce_v2_qp_context { ...@@ -762,7 +762,10 @@ struct hns_roce_v2_qp_context {
struct hns_roce_v2_cqe { struct hns_roce_v2_cqe {
u32 byte_4; u32 byte_4;
u32 rkey_immtdata; union {
__le32 rkey;
__be32 immtdata;
};
u32 byte_12; u32 byte_12;
u32 byte_16; u32 byte_16;
u32 byte_cnt; u32 byte_cnt;
......
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