Commit cd3c1bee authored by Laurent Pinchart's avatar Laurent Pinchart

sh-pfc: Constify all SoC data

None of the SoC data need to be modified. Constify it.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 861601de
...@@ -96,7 +96,8 @@ int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin) ...@@ -96,7 +96,8 @@ int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin)
return -1; return -1;
} }
static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r) static int sh_pfc_enum_in_range(pinmux_enum_t enum_id,
const struct pinmux_range *r)
{ {
if (enum_id < r->begin) if (enum_id < r->begin)
return 0; return 0;
...@@ -142,7 +143,7 @@ void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width, ...@@ -142,7 +143,7 @@ void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
} }
static void sh_pfc_config_reg_helper(struct sh_pfc *pfc, static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
struct pinmux_cfg_reg *crp, const struct pinmux_cfg_reg *crp,
unsigned long in_pos, unsigned long in_pos,
void __iomem **mapped_regp, void __iomem **mapped_regp,
unsigned long *maskp, unsigned long *maskp,
...@@ -164,7 +165,7 @@ static void sh_pfc_config_reg_helper(struct sh_pfc *pfc, ...@@ -164,7 +165,7 @@ static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
} }
static void sh_pfc_write_config_reg(struct sh_pfc *pfc, static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
struct pinmux_cfg_reg *crp, const struct pinmux_cfg_reg *crp,
unsigned long field, unsigned long value) unsigned long field, unsigned long value)
{ {
void __iomem *mapped_reg; void __iomem *mapped_reg;
...@@ -192,10 +193,10 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc, ...@@ -192,10 +193,10 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
} }
static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id, static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
struct pinmux_cfg_reg **crp, int *fieldp, const struct pinmux_cfg_reg **crp, int *fieldp,
int *valuep) int *valuep)
{ {
struct pinmux_cfg_reg *config_reg; const struct pinmux_cfg_reg *config_reg;
unsigned long r_width, f_width, curr_width, ncomb; unsigned long r_width, f_width, curr_width, ncomb;
int k, m, n, pos, bit_pos; int k, m, n, pos, bit_pos;
...@@ -238,7 +239,7 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id, ...@@ -238,7 +239,7 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos, static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos,
pinmux_enum_t *enum_idp) pinmux_enum_t *enum_idp)
{ {
pinmux_enum_t *data = pfc->info->gpio_data; const pinmux_enum_t *data = pfc->info->gpio_data;
int k; int k;
if (pos) { if (pos) {
...@@ -259,9 +260,9 @@ static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos, ...@@ -259,9 +260,9 @@ static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos,
int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type) int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
{ {
struct pinmux_cfg_reg *cr = NULL; const struct pinmux_cfg_reg *cr = NULL;
pinmux_enum_t enum_id; pinmux_enum_t enum_id;
struct pinmux_range *range; const struct pinmux_range *range;
int in_range, pos, field, value; int in_range, pos, field, value;
switch (pinmux_type) { switch (pinmux_type) {
...@@ -352,7 +353,7 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type) ...@@ -352,7 +353,7 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
static int sh_pfc_probe(struct platform_device *pdev) static int sh_pfc_probe(struct platform_device *pdev)
{ {
struct sh_pfc_soc_info *info; const struct sh_pfc_soc_info *info;
struct sh_pfc *pfc; struct sh_pfc *pfc;
int ret; int ret;
......
...@@ -26,7 +26,7 @@ struct sh_pfc_pinctrl; ...@@ -26,7 +26,7 @@ struct sh_pfc_pinctrl;
struct sh_pfc { struct sh_pfc {
struct device *dev; struct device *dev;
struct sh_pfc_soc_info *info; const struct sh_pfc_soc_info *info;
spinlock_t lock; spinlock_t lock;
unsigned int num_windows; unsigned int num_windows;
...@@ -54,21 +54,21 @@ void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width, ...@@ -54,21 +54,21 @@ void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin); int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type); int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
extern struct sh_pfc_soc_info r8a7740_pinmux_info; extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
extern struct sh_pfc_soc_info r8a7779_pinmux_info; extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
extern struct sh_pfc_soc_info sh7203_pinmux_info; extern const struct sh_pfc_soc_info sh7203_pinmux_info;
extern struct sh_pfc_soc_info sh7264_pinmux_info; extern const struct sh_pfc_soc_info sh7264_pinmux_info;
extern struct sh_pfc_soc_info sh7269_pinmux_info; extern const struct sh_pfc_soc_info sh7269_pinmux_info;
extern struct sh_pfc_soc_info sh7372_pinmux_info; extern const struct sh_pfc_soc_info sh7372_pinmux_info;
extern struct sh_pfc_soc_info sh73a0_pinmux_info; extern const struct sh_pfc_soc_info sh73a0_pinmux_info;
extern struct sh_pfc_soc_info sh7720_pinmux_info; extern const struct sh_pfc_soc_info sh7720_pinmux_info;
extern struct sh_pfc_soc_info sh7722_pinmux_info; extern const struct sh_pfc_soc_info sh7722_pinmux_info;
extern struct sh_pfc_soc_info sh7723_pinmux_info; extern const struct sh_pfc_soc_info sh7723_pinmux_info;
extern struct sh_pfc_soc_info sh7724_pinmux_info; extern const struct sh_pfc_soc_info sh7724_pinmux_info;
extern struct sh_pfc_soc_info sh7734_pinmux_info; extern const struct sh_pfc_soc_info sh7734_pinmux_info;
extern struct sh_pfc_soc_info sh7757_pinmux_info; extern const struct sh_pfc_soc_info sh7757_pinmux_info;
extern struct sh_pfc_soc_info sh7785_pinmux_info; extern const struct sh_pfc_soc_info sh7785_pinmux_info;
extern struct sh_pfc_soc_info sh7786_pinmux_info; extern const struct sh_pfc_soc_info sh7786_pinmux_info;
extern struct sh_pfc_soc_info shx3_pinmux_info; extern const struct sh_pfc_soc_info shx3_pinmux_info;
#endif /* __SH_PFC_CORE_H__ */ #endif /* __SH_PFC_CORE_H__ */
...@@ -82,7 +82,7 @@ static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned gpio) ...@@ -82,7 +82,7 @@ static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned gpio)
{ {
struct sh_pfc *pfc = chip->pfc; struct sh_pfc *pfc = chip->pfc;
struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[gpio]; struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[gpio];
struct sh_pfc_pin *pin = &pfc->info->pins[gpio]; const struct sh_pfc_pin *pin = &pfc->info->pins[gpio];
const struct pinmux_data_reg *dreg; const struct pinmux_data_reg *dreg;
unsigned int bit; unsigned int bit;
unsigned int i; unsigned int i;
......
...@@ -577,7 +577,7 @@ enum { ...@@ -577,7 +577,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* specify valid pin states for each pin in GPIO mode */ /* specify valid pin states for each pin in GPIO mode */
/* I/O and Pull U/D */ /* I/O and Pull U/D */
...@@ -1660,7 +1660,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -1660,7 +1660,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* IRQ */ /* IRQ */
GPIO_FN(IRQ0_PORT2), GPIO_FN(IRQ0_PORT13), GPIO_FN(IRQ0_PORT2), GPIO_FN(IRQ0_PORT13),
GPIO_FN(IRQ1), GPIO_FN(IRQ1),
...@@ -2128,7 +2128,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -2128,7 +2128,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(TRACEAUD_FROM_MEMC), GPIO_FN(TRACEAUD_FROM_MEMC),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
PORTCR(0, 0xe6050000), /* PORT0CR */ PORTCR(0, 0xe6050000), /* PORT0CR */
PORTCR(1, 0xe6050001), /* PORT1CR */ PORTCR(1, 0xe6050001), /* PORT1CR */
PORTCR(2, 0xe6050002), /* PORT2CR */ PORTCR(2, 0xe6050002), /* PORT2CR */
...@@ -2442,7 +2442,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -2442,7 +2442,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{ }, { },
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PORTL031_000DR", 0xe6054800, 32) { { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054800, 32) {
PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA, PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA, PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
...@@ -2546,7 +2546,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -2546,7 +2546,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
static struct pinmux_irq pinmux_irqs[] = { static const struct pinmux_irq pinmux_irqs[] = {
PINMUX_IRQ(evt2irq(0x0200), GPIO_PORT2, GPIO_PORT13), /* IRQ0A */ PINMUX_IRQ(evt2irq(0x0200), GPIO_PORT2, GPIO_PORT13), /* IRQ0A */
PINMUX_IRQ(evt2irq(0x0220), GPIO_PORT20), /* IRQ1A */ PINMUX_IRQ(evt2irq(0x0220), GPIO_PORT20), /* IRQ1A */
PINMUX_IRQ(evt2irq(0x0240), GPIO_PORT11, GPIO_PORT12), /* IRQ2A */ PINMUX_IRQ(evt2irq(0x0240), GPIO_PORT11, GPIO_PORT12), /* IRQ2A */
...@@ -2581,7 +2581,7 @@ static struct pinmux_irq pinmux_irqs[] = { ...@@ -2581,7 +2581,7 @@ static struct pinmux_irq pinmux_irqs[] = {
PINMUX_IRQ(evt2irq(0x33E0), GPIO_PORT41, GPIO_PORT167),/* IRQ31A */ PINMUX_IRQ(evt2irq(0x33E0), GPIO_PORT41, GPIO_PORT167),/* IRQ31A */
}; };
struct sh_pfc_soc_info r8a7740_pinmux_info = { const struct sh_pfc_soc_info r8a7740_pinmux_info = {
.name = "r8a7740_pfc", .name = "r8a7740_pfc",
.input = { PINMUX_INPUT_BEGIN, .input = { PINMUX_INPUT_BEGIN,
PINMUX_INPUT_END }, PINMUX_INPUT_END },
......
...@@ -631,7 +631,7 @@ enum { ...@@ -631,7 +631,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
PINMUX_DATA(AVS1_MARK, FN_AVS1), PINMUX_DATA(AVS1_MARK, FN_AVS1),
...@@ -1438,7 +1438,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -1438,7 +1438,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(AVS1), GPIO_FN(AVS2), GPIO_FN(A17), GPIO_FN(A18), GPIO_FN(AVS1), GPIO_FN(AVS2), GPIO_FN(A17), GPIO_FN(A18),
GPIO_FN(A19), GPIO_FN(A19),
...@@ -1710,7 +1710,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1710,7 +1710,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(VI3_DATA7), GPIO_FN(GPS_MAG), GPIO_FN(FCE), GPIO_FN(SCK4_B), GPIO_FN(VI3_DATA7), GPIO_FN(GPS_MAG), GPIO_FN(FCE), GPIO_FN(SCK4_B),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1) { { PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1) {
GP_0_31_FN, FN_IP3_31_29, GP_0_31_FN, FN_IP3_31_29,
GP_0_30_FN, FN_IP3_26_24, GP_0_30_FN, FN_IP3_26_24,
...@@ -2571,7 +2571,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -2571,7 +2571,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{ }, { },
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("INDT0", 0xffc40008, 32) { GP_INDT(0) } }, { PINMUX_DATA_REG("INDT0", 0xffc40008, 32) { GP_INDT(0) } },
{ PINMUX_DATA_REG("INDT1", 0xffc41008, 32) { GP_INDT(1) } }, { PINMUX_DATA_REG("INDT1", 0xffc41008, 32) { GP_INDT(1) } },
{ PINMUX_DATA_REG("INDT2", 0xffc42008, 32) { GP_INDT(2) } }, { PINMUX_DATA_REG("INDT2", 0xffc42008, 32) { GP_INDT(2) } },
...@@ -2587,7 +2587,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -2587,7 +2587,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info r8a7779_pinmux_info = { const struct sh_pfc_soc_info r8a7779_pinmux_info = {
.name = "r8a7779_pfc", .name = "r8a7779_pfc",
.unlock_reg = 0xfffc0000, /* PMMR */ .unlock_reg = 0xfffc0000, /* PMMR */
......
...@@ -272,7 +272,7 @@ enum { ...@@ -272,7 +272,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* PA */ /* PA */
PINMUX_DATA(PA7_DATA, PA7_IN), PINMUX_DATA(PA7_DATA, PA7_IN),
...@@ -819,7 +819,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -819,7 +819,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* INTC */ /* INTC */
GPIO_FN(PINT7_PB), GPIO_FN(PINT7_PB),
GPIO_FN(PINT6_PB), GPIO_FN(PINT6_PB),
...@@ -1077,7 +1077,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1077,7 +1077,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(LCD_DATA0), GPIO_FN(LCD_DATA0),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1) { { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1) {
0, 0, 0, 0,
0, 0, 0, 0,
...@@ -1529,7 +1529,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -1529,7 +1529,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{} {}
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADRL", 0xfffe3802, 16) { { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16) {
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
...@@ -1575,7 +1575,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -1575,7 +1575,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info sh7203_pinmux_info = { const struct sh_pfc_soc_info sh7203_pinmux_info = {
.name = "sh7203_pfc", .name = "sh7203_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
......
...@@ -604,7 +604,7 @@ enum { ...@@ -604,7 +604,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* Port A */ /* Port A */
PINMUX_DATA(PA3_DATA, PA3_IN), PINMUX_DATA(PA3_DATA, PA3_IN),
...@@ -1220,7 +1220,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -1220,7 +1220,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* INTC */ /* INTC */
GPIO_FN(PINT7_PG), GPIO_FN(PINT7_PG),
GPIO_FN(PINT6_PG), GPIO_FN(PINT6_PG),
...@@ -1470,7 +1470,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1470,7 +1470,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(LCD_M_DISP), GPIO_FN(LCD_M_DISP),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) { { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
...@@ -2036,7 +2036,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -2036,7 +2036,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{} {}
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADR1", 0xfffe3814, 16) { { PINMUX_DATA_REG("PADR1", 0xfffe3814, 16) {
0, 0, 0, 0, 0, 0, 0, PA3_DATA, 0, 0, 0, 0, 0, 0, 0, PA3_DATA,
0, 0, 0, 0, 0, 0, 0, PA2_DATA } 0, 0, 0, 0, 0, 0, 0, PA2_DATA }
...@@ -2114,7 +2114,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -2114,7 +2114,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ } { }
}; };
struct sh_pfc_soc_info sh7264_pinmux_info = { const struct sh_pfc_soc_info sh7264_pinmux_info = {
.name = "sh7264_pfc", .name = "sh7264_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
......
...@@ -781,7 +781,7 @@ enum { ...@@ -781,7 +781,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* Port A */ /* Port A */
PINMUX_DATA(PA1_DATA, PA1_IN), PINMUX_DATA(PA1_DATA, PA1_IN),
...@@ -1617,7 +1617,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -1617,7 +1617,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* INTC */ /* INTC */
GPIO_FN(IRQ7_PG), GPIO_FN(IRQ7_PG),
GPIO_FN(IRQ6_PG), GPIO_FN(IRQ6_PG),
...@@ -1949,7 +1949,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1949,7 +1949,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(LCD_M_DISP), GPIO_FN(LCD_M_DISP),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
/* "name" addr register_size Field_Width */ /* "name" addr register_size Field_Width */
/* where Field_Width is 1 for single mode registers or 4 for upto 16 /* where Field_Width is 1 for single mode registers or 4 for upto 16
...@@ -2738,7 +2738,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -2738,7 +2738,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{} {}
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) { { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {
0, 0, 0, 0, 0, 0, 0, PA1_DATA, 0, 0, 0, 0, 0, 0, 0, PA1_DATA,
0, 0, 0, 0, 0, 0, 0, PA0_DATA } 0, 0, 0, 0, 0, 0, 0, PA0_DATA }
...@@ -2817,7 +2817,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -2817,7 +2817,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ } { }
}; };
struct sh_pfc_soc_info sh7269_pinmux_info = { const struct sh_pfc_soc_info sh7269_pinmux_info = {
.name = "sh7269_pfc", .name = "sh7269_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
......
...@@ -368,7 +368,7 @@ enum { ...@@ -368,7 +368,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* specify valid pin states for each pin in GPIO mode */ /* specify valid pin states for each pin in GPIO mode */
PORT_DATA_IO_PD(0), PORT_DATA_IO_PD(1), PORT_DATA_IO_PD(0), PORT_DATA_IO_PD(1),
...@@ -935,7 +935,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -935,7 +935,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* IRQ */ /* IRQ */
GPIO_FN(IRQ0_6), GPIO_FN(IRQ0_162), GPIO_FN(IRQ1), GPIO_FN(IRQ0_6), GPIO_FN(IRQ0_162), GPIO_FN(IRQ1),
GPIO_FN(IRQ2_4), GPIO_FN(IRQ2_5), GPIO_FN(IRQ3_8), GPIO_FN(IRQ2_4), GPIO_FN(IRQ2_5), GPIO_FN(IRQ3_8),
...@@ -1202,7 +1202,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1202,7 +1202,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(SDENC_DV_CLKI), GPIO_FN(SDENC_DV_CLKI),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
PORTCR(0, 0xE6051000), /* PORT0CR */ PORTCR(0, 0xE6051000), /* PORT0CR */
PORTCR(1, 0xE6051001), /* PORT1CR */ PORTCR(1, 0xE6051001), /* PORT1CR */
PORTCR(2, 0xE6051002), /* PORT2CR */ PORTCR(2, 0xE6051002), /* PORT2CR */
...@@ -1474,7 +1474,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -1474,7 +1474,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{ }, { },
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) { { PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) {
PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA, PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA, PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
...@@ -1599,7 +1599,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -1599,7 +1599,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
#define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5)) #define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5))
#define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5)) #define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5))
static struct pinmux_irq pinmux_irqs[] = { static const struct pinmux_irq pinmux_irqs[] = {
PINMUX_IRQ(EXT_IRQ16L(0), GPIO_PORT6, GPIO_PORT162), PINMUX_IRQ(EXT_IRQ16L(0), GPIO_PORT6, GPIO_PORT162),
PINMUX_IRQ(EXT_IRQ16L(1), GPIO_PORT12), PINMUX_IRQ(EXT_IRQ16L(1), GPIO_PORT12),
PINMUX_IRQ(EXT_IRQ16L(2), GPIO_PORT4, GPIO_PORT5), PINMUX_IRQ(EXT_IRQ16L(2), GPIO_PORT4, GPIO_PORT5),
...@@ -1634,7 +1634,7 @@ static struct pinmux_irq pinmux_irqs[] = { ...@@ -1634,7 +1634,7 @@ static struct pinmux_irq pinmux_irqs[] = {
PINMUX_IRQ(EXT_IRQ16H(31), GPIO_PORT138, GPIO_PORT184), PINMUX_IRQ(EXT_IRQ16H(31), GPIO_PORT138, GPIO_PORT184),
}; };
struct sh_pfc_soc_info sh7372_pinmux_info = { const struct sh_pfc_soc_info sh7372_pinmux_info = {
.name = "sh7372_pfc", .name = "sh7372_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
......
...@@ -509,7 +509,7 @@ enum { ...@@ -509,7 +509,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* specify valid pin states for each pin in GPIO mode */ /* specify valid pin states for each pin in GPIO mode */
/* Table 25-1 (I/O and Pull U/D) */ /* Table 25-1 (I/O and Pull U/D) */
...@@ -1543,7 +1543,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -1543,7 +1543,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
GPIO_PORT_ALL(), GPIO_PORT_ALL(),
}; };
static struct pinmux_range pinmux_ranges[] = { static const struct pinmux_range pinmux_ranges[] = {
{.begin = 0, .end = 118,}, {.begin = 0, .end = 118,},
{.begin = 128, .end = 164,}, {.begin = 128, .end = 164,},
{.begin = 192, .end = 282,}, {.begin = 192, .end = 282,},
...@@ -1552,7 +1552,7 @@ static struct pinmux_range pinmux_ranges[] = { ...@@ -1552,7 +1552,7 @@ static struct pinmux_range pinmux_ranges[] = {
#define PINMUX_FN_BASE GPIO_FN_VBUS_0 #define PINMUX_FN_BASE GPIO_FN_VBUS_0
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* Table 25-1 (Functions 0-7) */ /* Table 25-1 (Functions 0-7) */
GPIO_FN(VBUS_0), GPIO_FN(VBUS_0),
GPIO_FN(GPI0), GPIO_FN(GPI0),
...@@ -2228,7 +2228,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -2228,7 +2228,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(FSIAISLD_PU), GPIO_FN(FSIAISLD_PU),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
PORTCR(0, 0xe6050000), /* PORT0CR */ PORTCR(0, 0xe6050000), /* PORT0CR */
PORTCR(1, 0xe6050001), /* PORT1CR */ PORTCR(1, 0xe6050001), /* PORT1CR */
PORTCR(2, 0xe6050002), /* PORT2CR */ PORTCR(2, 0xe6050002), /* PORT2CR */
...@@ -2636,7 +2636,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -2636,7 +2636,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{ }, { },
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) { { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA, PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA, PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
...@@ -2744,7 +2744,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -2744,7 +2744,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
#define EXT_IRQ16L(n) intcs_evt2irq(0x200 + ((n) << 5)) #define EXT_IRQ16L(n) intcs_evt2irq(0x200 + ((n) << 5))
#define EXT_IRQ16H(n) intcs_evt2irq(0x3200 + ((n - 16) << 5)) #define EXT_IRQ16H(n) intcs_evt2irq(0x3200 + ((n - 16) << 5))
static struct pinmux_irq pinmux_irqs[] = { static const struct pinmux_irq pinmux_irqs[] = {
PINMUX_IRQ(EXT_IRQ16H(19), 9), PINMUX_IRQ(EXT_IRQ16H(19), 9),
PINMUX_IRQ(EXT_IRQ16L(1), 10), PINMUX_IRQ(EXT_IRQ16L(1), 10),
PINMUX_IRQ(EXT_IRQ16L(0), 11), PINMUX_IRQ(EXT_IRQ16L(0), 11),
...@@ -2779,7 +2779,7 @@ static struct pinmux_irq pinmux_irqs[] = { ...@@ -2779,7 +2779,7 @@ static struct pinmux_irq pinmux_irqs[] = {
PINMUX_IRQ(EXT_IRQ16L(9), 308), PINMUX_IRQ(EXT_IRQ16L(9), 308),
}; };
struct sh_pfc_soc_info sh73a0_pinmux_info = { const struct sh_pfc_soc_info sh73a0_pinmux_info = {
.name = "sh73a0_pfc", .name = "sh73a0_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
......
...@@ -262,7 +262,7 @@ enum { ...@@ -262,7 +262,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* PTA GPIO */ /* PTA GPIO */
PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU), PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU), PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
...@@ -763,7 +763,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -763,7 +763,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* BSC */ /* BSC */
GPIO_FN(D31), GPIO_FN(D31),
GPIO_FN(D30), GPIO_FN(D30),
...@@ -957,7 +957,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -957,7 +957,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(STATUS1), GPIO_FN(STATUS1),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN, PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN, PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
...@@ -1141,7 +1141,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -1141,7 +1141,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{} {}
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADR", 0xa4050140, 8) { { PINMUX_DATA_REG("PADR", 0xa4050140, 8) {
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
...@@ -1217,7 +1217,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -1217,7 +1217,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info sh7720_pinmux_info = { const struct sh_pfc_soc_info sh7720_pinmux_info = {
.name = "sh7720_pfc", .name = "sh7720_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
......
...@@ -296,7 +296,7 @@ enum { ...@@ -296,7 +296,7 @@ enum {
PINMUX_FUNCTION_END, PINMUX_FUNCTION_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* PTA */ /* PTA */
PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_IN_PD, PTA7_OUT), PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_IN_PD, PTA7_OUT),
PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_IN_PD), PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_IN_PD),
...@@ -986,7 +986,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -986,7 +986,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* SCIF0 */ /* SCIF0 */
GPIO_FN(SCIF0_TXD), GPIO_FN(SCIF0_TXD),
GPIO_FN(SCIF0_RXD), GPIO_FN(SCIF0_RXD),
...@@ -1268,7 +1268,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1268,7 +1268,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(KEYOUT5_IN5), GPIO_FN(KEYOUT5_IN5),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
VIO_D7_SCIF1_SCK, PTA7_OUT, PTA7_IN_PD, PTA7_IN, VIO_D7_SCIF1_SCK, PTA7_OUT, PTA7_IN_PD, PTA7_IN,
VIO_D6_SCIF1_RXD, 0, PTA6_IN_PD, PTA6_IN, VIO_D6_SCIF1_RXD, 0, PTA6_IN_PD, PTA6_IN,
...@@ -1664,7 +1664,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -1664,7 +1664,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{} {}
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADR", 0xa4050120, 8) { { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
...@@ -1760,7 +1760,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -1760,7 +1760,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info sh7722_pinmux_info = { const struct sh_pfc_soc_info sh7722_pinmux_info = {
.name = "sh7722_pfc", .name = "sh7722_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END }, .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
......
...@@ -350,7 +350,7 @@ enum { ...@@ -350,7 +350,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* PTA GPIO */ /* PTA GPIO */
PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT), PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT), PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
...@@ -1143,7 +1143,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -1143,7 +1143,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* SCIF0 */ /* SCIF0 */
GPIO_FN(SCIF0_PTT_TXD), GPIO_FN(SCIF0_PTT_TXD),
GPIO_FN(SCIF0_PTT_RXD), GPIO_FN(SCIF0_PTT_RXD),
...@@ -1515,7 +1515,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1515,7 +1515,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(IDEA0), GPIO_FN(IDEA0),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
PTA7_FN, PTA7_OUT, 0, PTA7_IN, PTA7_FN, PTA7_OUT, 0, PTA7_IN,
PTA6_FN, PTA6_OUT, 0, PTA6_IN, PTA6_FN, PTA6_OUT, 0, PTA6_IN,
...@@ -1789,7 +1789,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -1789,7 +1789,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{} {}
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADR", 0xa4050120, 8) { { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
...@@ -1885,7 +1885,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -1885,7 +1885,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info sh7723_pinmux_info = { const struct sh_pfc_soc_info sh7723_pinmux_info = {
.name = "sh7723_pfc", .name = "sh7723_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
......
...@@ -572,7 +572,7 @@ enum { ...@@ -572,7 +572,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* PTA GPIO */ /* PTA GPIO */
PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU), PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU), PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
...@@ -1422,7 +1422,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -1422,7 +1422,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* BSC */ /* BSC */
GPIO_FN(D31), GPIO_FN(D31),
GPIO_FN(D30), GPIO_FN(D30),
...@@ -1787,7 +1787,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1787,7 +1787,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(INTC_IRQ0), GPIO_FN(INTC_IRQ0),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN, PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN, PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
...@@ -2111,7 +2111,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -2111,7 +2111,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{} {}
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADR", 0xa4050120, 8) { { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
...@@ -2207,7 +2207,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -2207,7 +2207,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info sh7724_pinmux_info = { const struct sh_pfc_soc_info sh7724_pinmux_info = {
.name = "sh7724_pfc", .name = "sh7724_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
......
...@@ -592,7 +592,7 @@ enum { ...@@ -592,7 +592,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
PINMUX_DATA(CLKOUT_MARK, FN_CLKOUT), PINMUX_DATA(CLKOUT_MARK, FN_CLKOUT),
...@@ -1373,7 +1373,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -1373,7 +1373,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(CLKOUT), GPIO_FN(BS), GPIO_FN(CS0), GPIO_FN(EX_CS0), GPIO_FN(CLKOUT), GPIO_FN(BS), GPIO_FN(CS0), GPIO_FN(EX_CS0),
GPIO_FN(RD), GPIO_FN(WE0), GPIO_FN(WE1), GPIO_FN(RD), GPIO_FN(WE0), GPIO_FN(WE1),
GPIO_FN(SCL0), GPIO_FN(PENC0), GPIO_FN(USB_OVC0), GPIO_FN(SCL0), GPIO_FN(PENC0), GPIO_FN(USB_OVC0),
...@@ -1652,7 +1652,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1652,7 +1652,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(SCL1), GPIO_FN(SCIF_CLK_C), GPIO_FN(SCL1), GPIO_FN(SCIF_CLK_C),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("GPSR0", 0xFFFC0004, 32, 1) { { PINMUX_CFG_REG("GPSR0", 0xFFFC0004, 32, 1) {
GP_0_31_FN, FN_IP2_2_0, GP_0_31_FN, FN_IP2_2_0,
GP_0_30_FN, FN_IP1_31_29, GP_0_30_FN, FN_IP1_31_29,
...@@ -2421,7 +2421,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -2421,7 +2421,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{ }, { },
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
/* GPIO 0 - 5*/ /* GPIO 0 - 5*/
{ PINMUX_DATA_REG("INDT0", 0xFFC4000C, 32) { GP_INDT(0) } }, { PINMUX_DATA_REG("INDT0", 0xFFC4000C, 32) { GP_INDT(0) } },
{ PINMUX_DATA_REG("INDT1", 0xFFC4100C, 32) { GP_INDT(1) } }, { PINMUX_DATA_REG("INDT1", 0xFFC4100C, 32) { GP_INDT(1) } },
...@@ -2438,7 +2438,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -2438,7 +2438,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info sh7734_pinmux_info = { const struct sh_pfc_soc_info sh7734_pinmux_info = {
.name = "sh7734_pfc", .name = "sh7734_pfc",
.unlock_reg = 0xFFFC0000, .unlock_reg = 0xFFFC0000,
......
...@@ -526,7 +526,7 @@ enum { ...@@ -526,7 +526,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* PTA GPIO */ /* PTA GPIO */
PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT), PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT), PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
...@@ -1374,7 +1374,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -1374,7 +1374,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* PTA (mobule: LBSC, RGMII) */ /* PTA (mobule: LBSC, RGMII) */
GPIO_FN(BS), GPIO_FN(BS),
GPIO_FN(RDWR), GPIO_FN(RDWR),
...@@ -1726,7 +1726,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1726,7 +1726,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(ON_DQ0), GPIO_FN(ON_DQ0),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) { { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) {
PTA7_FN, PTA7_OUT, PTA7_IN, PTA7_IN_PU, PTA7_FN, PTA7_OUT, PTA7_IN, PTA7_IN_PU,
PTA6_FN, PTA6_OUT, PTA6_IN, PTA6_IN_PU, PTA6_FN, PTA6_OUT, PTA6_IN, PTA6_IN_PU,
...@@ -2156,7 +2156,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -2156,7 +2156,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{} {}
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADR", 0xffec0034, 8) { { PINMUX_DATA_REG("PADR", 0xffec0034, 8) {
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
...@@ -2264,7 +2264,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -2264,7 +2264,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info sh7757_pinmux_info = { const struct sh_pfc_soc_info sh7757_pinmux_info = {
.name = "sh7757_pfc", .name = "sh7757_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
......
...@@ -355,7 +355,7 @@ enum { ...@@ -355,7 +355,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* PA GPIO */ /* PA GPIO */
PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU), PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
...@@ -849,7 +849,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -849,7 +849,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* FN */ /* FN */
GPIO_FN(D63_AD31), GPIO_FN(D63_AD31),
GPIO_FN(D62_AD30), GPIO_FN(D62_AD30),
...@@ -1018,7 +1018,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -1018,7 +1018,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(IRQOUT), GPIO_FN(IRQOUT),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2) { { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2) {
PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU, PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU, PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
...@@ -1218,7 +1218,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -1218,7 +1218,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{} {}
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADR", 0xffe70020, 8) { { PINMUX_DATA_REG("PADR", 0xffe70020, 8) {
PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA, PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA } PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
...@@ -1286,7 +1286,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -1286,7 +1286,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info sh7785_pinmux_info = { const struct sh_pfc_soc_info sh7785_pinmux_info = {
.name = "sh7785_pfc", .name = "sh7785_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
......
...@@ -191,7 +191,7 @@ enum { ...@@ -191,7 +191,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* PA GPIO */ /* PA GPIO */
PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU), PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
...@@ -509,7 +509,7 @@ static struct sh_pfc_pin pinmux_pins[] = { ...@@ -509,7 +509,7 @@ static struct sh_pfc_pin pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
static struct pinmux_func pinmux_func_gpios[] = { static const struct pinmux_func pinmux_func_gpios[] = {
/* FN */ /* FN */
GPIO_FN(CDE), GPIO_FN(CDE),
GPIO_FN(ETH_MAGIC), GPIO_FN(ETH_MAGIC),
...@@ -649,7 +649,7 @@ static struct pinmux_func pinmux_func_gpios[] = { ...@@ -649,7 +649,7 @@ static struct pinmux_func pinmux_func_gpios[] = {
GPIO_FN(FSE), GPIO_FN(FSE),
}; };
static struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2) { { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2) {
PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU, PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU, PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
...@@ -779,7 +779,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -779,7 +779,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
{} {}
}; };
static struct pinmux_data_reg pinmux_data_regs[] = { static const struct pinmux_data_reg pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PADR", 0xffcc0020, 8) { { PINMUX_DATA_REG("PADR", 0xffcc0020, 8) {
PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA, PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA } PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
...@@ -819,7 +819,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -819,7 +819,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info sh7786_pinmux_info = { const struct sh_pfc_soc_info sh7786_pinmux_info = {
.name = "sh7786_pfc", .name = "sh7786_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
......
...@@ -147,7 +147,7 @@ enum { ...@@ -147,7 +147,7 @@ enum {
PINMUX_MARK_END, PINMUX_MARK_END,
}; };
static pinmux_enum_t shx3_pinmux_data[] = { static const pinmux_enum_t shx3_pinmux_data[] = {
/* PA GPIO */ /* PA GPIO */
PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU), PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
...@@ -388,7 +388,7 @@ static struct sh_pfc_pin shx3_pinmux_pins[] = { ...@@ -388,7 +388,7 @@ static struct sh_pfc_pin shx3_pinmux_pins[] = {
#define PINMUX_FN_BASE ARRAY_SIZE(shx3_pinmux_pins) #define PINMUX_FN_BASE ARRAY_SIZE(shx3_pinmux_pins)
static struct pinmux_func shx3_pinmux_func_gpios[] = { static const struct pinmux_func shx3_pinmux_func_gpios[] = {
/* FN */ /* FN */
GPIO_FN(D31), GPIO_FN(D31),
GPIO_FN(D30), GPIO_FN(D30),
...@@ -454,7 +454,7 @@ static struct pinmux_func shx3_pinmux_func_gpios[] = { ...@@ -454,7 +454,7 @@ static struct pinmux_func shx3_pinmux_func_gpios[] = {
GPIO_FN(IRQOUT), GPIO_FN(IRQOUT),
}; };
static struct pinmux_cfg_reg shx3_pinmux_config_regs[] = { static const struct pinmux_cfg_reg shx3_pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2) { { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2) {
PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU, PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU, PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
...@@ -530,7 +530,7 @@ static struct pinmux_cfg_reg shx3_pinmux_config_regs[] = { ...@@ -530,7 +530,7 @@ static struct pinmux_cfg_reg shx3_pinmux_config_regs[] = {
{ }, { },
}; };
static struct pinmux_data_reg shx3_pinmux_data_regs[] = { static const struct pinmux_data_reg shx3_pinmux_data_regs[] = {
{ PINMUX_DATA_REG("PABDR", 0xffc70010, 32) { { PINMUX_DATA_REG("PABDR", 0xffc70010, 32) {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA, PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
...@@ -566,7 +566,7 @@ static struct pinmux_data_reg shx3_pinmux_data_regs[] = { ...@@ -566,7 +566,7 @@ static struct pinmux_data_reg shx3_pinmux_data_regs[] = {
{ }, { },
}; };
struct sh_pfc_soc_info shx3_pinmux_info = { const struct sh_pfc_soc_info shx3_pinmux_info = {
.name = "shx3_pfc", .name = "shx3_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN,
......
...@@ -141,7 +141,7 @@ static int sh_pfc_reconfig_pin(struct sh_pfc_pinctrl *pmx, unsigned offset, ...@@ -141,7 +141,7 @@ static int sh_pfc_reconfig_pin(struct sh_pfc_pinctrl *pmx, unsigned offset,
struct sh_pfc *pfc = pmx->pfc; struct sh_pfc *pfc = pmx->pfc;
int idx = sh_pfc_get_pin_index(pfc, offset); int idx = sh_pfc_get_pin_index(pfc, offset);
struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
struct sh_pfc_pin *pin = &pfc->info->pins[idx]; const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
unsigned int mark = pin->enum_id; unsigned int mark = pin->enum_id;
unsigned long flags; unsigned long flags;
int ret = -EINVAL; int ret = -EINVAL;
...@@ -324,7 +324,8 @@ static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx) ...@@ -324,7 +324,8 @@ static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
number++, nr_pins++) { number++, nr_pins++) {
struct sh_pfc_pin_config *cfg = &pmx->configs[nr_pins]; struct sh_pfc_pin_config *cfg = &pmx->configs[nr_pins];
struct pinctrl_pin_desc *pin = &pmx->pins[nr_pins]; struct pinctrl_pin_desc *pin = &pmx->pins[nr_pins];
struct sh_pfc_pin *info = &pfc->info->pins[nr_pins]; const struct sh_pfc_pin *info =
&pfc->info->pins[nr_pins];
pin->number = number; pin->number = number;
pin->name = info->name; pin->name = info->name;
......
...@@ -84,8 +84,8 @@ struct pinmux_func { ...@@ -84,8 +84,8 @@ struct pinmux_func {
struct pinmux_cfg_reg { struct pinmux_cfg_reg {
unsigned long reg, reg_width, field_width; unsigned long reg, reg_width, field_width;
pinmux_enum_t *enum_ids; const pinmux_enum_t *enum_ids;
unsigned long *var_field_width; const unsigned long *var_field_width;
}; };
#define PINMUX_CFG_REG(name, r, r_width, f_width) \ #define PINMUX_CFG_REG(name, r, r_width, f_width) \
...@@ -99,7 +99,7 @@ struct pinmux_cfg_reg { ...@@ -99,7 +99,7 @@ struct pinmux_cfg_reg {
struct pinmux_data_reg { struct pinmux_data_reg {
unsigned long reg, reg_width; unsigned long reg, reg_width;
pinmux_enum_t *enum_ids; const pinmux_enum_t *enum_ids;
}; };
#define PINMUX_DATA_REG(name, r, r_width) \ #define PINMUX_DATA_REG(name, r, r_width) \
...@@ -121,14 +121,14 @@ struct pinmux_range { ...@@ -121,14 +121,14 @@ struct pinmux_range {
}; };
struct sh_pfc_soc_info { struct sh_pfc_soc_info {
char *name; const char *name;
struct pinmux_range input; struct pinmux_range input;
struct pinmux_range input_pd; struct pinmux_range input_pd;
struct pinmux_range input_pu; struct pinmux_range input_pu;
struct pinmux_range output; struct pinmux_range output;
struct pinmux_range function; struct pinmux_range function;
struct sh_pfc_pin *pins; const struct sh_pfc_pin *pins;
unsigned int nr_pins; unsigned int nr_pins;
const struct pinmux_range *ranges; const struct pinmux_range *ranges;
unsigned int nr_ranges; unsigned int nr_ranges;
...@@ -137,16 +137,16 @@ struct sh_pfc_soc_info { ...@@ -137,16 +137,16 @@ struct sh_pfc_soc_info {
const struct sh_pfc_function *functions; const struct sh_pfc_function *functions;
unsigned int nr_functions; unsigned int nr_functions;
struct pinmux_func *func_gpios; const struct pinmux_func *func_gpios;
unsigned int nr_func_gpios; unsigned int nr_func_gpios;
struct pinmux_cfg_reg *cfg_regs; const struct pinmux_cfg_reg *cfg_regs;
struct pinmux_data_reg *data_regs; const struct pinmux_data_reg *data_regs;
pinmux_enum_t *gpio_data; const pinmux_enum_t *gpio_data;
unsigned int gpio_data_size; unsigned int gpio_data_size;
struct pinmux_irq *gpio_irq; const struct pinmux_irq *gpio_irq;
unsigned int gpio_irq_size; unsigned int gpio_irq_size;
unsigned long unlock_reg; unsigned long unlock_reg;
......
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