Commit cd48b97c authored by Bob Zhou's avatar Bob Zhou Committed by Alex Deucher

drm/amdgpu: add return result for amdgpu_i2c_{get/put}_byte

After amdgpu_i2c_get_byte fail, amdgpu_i2c_put_byte shouldn't be
conducted to put wrong value.
So return and check the i2c transfer result.
Signed-off-by: default avatarBob Zhou <bob.zhou@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8b2faf1a
...@@ -279,7 +279,7 @@ amdgpu_i2c_lookup(struct amdgpu_device *adev, ...@@ -279,7 +279,7 @@ amdgpu_i2c_lookup(struct amdgpu_device *adev,
return NULL; return NULL;
} }
static void amdgpu_i2c_get_byte(struct amdgpu_i2c_chan *i2c_bus, static int amdgpu_i2c_get_byte(struct amdgpu_i2c_chan *i2c_bus,
u8 slave_addr, u8 slave_addr,
u8 addr, u8 addr,
u8 *val) u8 *val)
...@@ -304,16 +304,18 @@ static void amdgpu_i2c_get_byte(struct amdgpu_i2c_chan *i2c_bus, ...@@ -304,16 +304,18 @@ static void amdgpu_i2c_get_byte(struct amdgpu_i2c_chan *i2c_bus,
out_buf[0] = addr; out_buf[0] = addr;
out_buf[1] = 0; out_buf[1] = 0;
if (i2c_transfer(&i2c_bus->adapter, msgs, 2) == 2) { if (i2c_transfer(&i2c_bus->adapter, msgs, 2) != 2) {
DRM_DEBUG("i2c 0x%02x read failed\n", addr);
return -EIO;
}
*val = in_buf[0]; *val = in_buf[0];
DRM_DEBUG("val = 0x%02x\n", *val); DRM_DEBUG("val = 0x%02x\n", *val);
} else {
DRM_DEBUG("i2c 0x%02x 0x%02x read failed\n", return 0;
addr, *val);
}
} }
static void amdgpu_i2c_put_byte(struct amdgpu_i2c_chan *i2c_bus, static int amdgpu_i2c_put_byte(struct amdgpu_i2c_chan *i2c_bus,
u8 slave_addr, u8 slave_addr,
u8 addr, u8 addr,
u8 val) u8 val)
...@@ -329,9 +331,12 @@ static void amdgpu_i2c_put_byte(struct amdgpu_i2c_chan *i2c_bus, ...@@ -329,9 +331,12 @@ static void amdgpu_i2c_put_byte(struct amdgpu_i2c_chan *i2c_bus,
out_buf[0] = addr; out_buf[0] = addr;
out_buf[1] = val; out_buf[1] = val;
if (i2c_transfer(&i2c_bus->adapter, &msg, 1) != 1) if (i2c_transfer(&i2c_bus->adapter, &msg, 1) != 1) {
DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n", DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n", addr, val);
addr, val); return -EIO;
}
return 0;
} }
/* ddc router switching */ /* ddc router switching */
...@@ -346,16 +351,18 @@ amdgpu_i2c_router_select_ddc_port(const struct amdgpu_connector *amdgpu_connecto ...@@ -346,16 +351,18 @@ amdgpu_i2c_router_select_ddc_port(const struct amdgpu_connector *amdgpu_connecto
if (!amdgpu_connector->router_bus) if (!amdgpu_connector->router_bus)
return; return;
amdgpu_i2c_get_byte(amdgpu_connector->router_bus, if (amdgpu_i2c_get_byte(amdgpu_connector->router_bus,
amdgpu_connector->router.i2c_addr, amdgpu_connector->router.i2c_addr,
0x3, &val); 0x3, &val))
return;
val &= ~amdgpu_connector->router.ddc_mux_control_pin; val &= ~amdgpu_connector->router.ddc_mux_control_pin;
amdgpu_i2c_put_byte(amdgpu_connector->router_bus, amdgpu_i2c_put_byte(amdgpu_connector->router_bus,
amdgpu_connector->router.i2c_addr, amdgpu_connector->router.i2c_addr,
0x3, val); 0x3, val);
amdgpu_i2c_get_byte(amdgpu_connector->router_bus, if (amdgpu_i2c_get_byte(amdgpu_connector->router_bus,
amdgpu_connector->router.i2c_addr, amdgpu_connector->router.i2c_addr,
0x1, &val); 0x1, &val))
return;
val &= ~amdgpu_connector->router.ddc_mux_control_pin; val &= ~amdgpu_connector->router.ddc_mux_control_pin;
val |= amdgpu_connector->router.ddc_mux_state; val |= amdgpu_connector->router.ddc_mux_state;
amdgpu_i2c_put_byte(amdgpu_connector->router_bus, amdgpu_i2c_put_byte(amdgpu_connector->router_bus,
...@@ -375,16 +382,18 @@ amdgpu_i2c_router_select_cd_port(const struct amdgpu_connector *amdgpu_connector ...@@ -375,16 +382,18 @@ amdgpu_i2c_router_select_cd_port(const struct amdgpu_connector *amdgpu_connector
if (!amdgpu_connector->router_bus) if (!amdgpu_connector->router_bus)
return; return;
amdgpu_i2c_get_byte(amdgpu_connector->router_bus, if (amdgpu_i2c_get_byte(amdgpu_connector->router_bus,
amdgpu_connector->router.i2c_addr, amdgpu_connector->router.i2c_addr,
0x3, &val); 0x3, &val))
return;
val &= ~amdgpu_connector->router.cd_mux_control_pin; val &= ~amdgpu_connector->router.cd_mux_control_pin;
amdgpu_i2c_put_byte(amdgpu_connector->router_bus, amdgpu_i2c_put_byte(amdgpu_connector->router_bus,
amdgpu_connector->router.i2c_addr, amdgpu_connector->router.i2c_addr,
0x3, val); 0x3, val);
amdgpu_i2c_get_byte(amdgpu_connector->router_bus, if (amdgpu_i2c_get_byte(amdgpu_connector->router_bus,
amdgpu_connector->router.i2c_addr, amdgpu_connector->router.i2c_addr,
0x1, &val); 0x1, &val))
return;
val &= ~amdgpu_connector->router.cd_mux_control_pin; val &= ~amdgpu_connector->router.cd_mux_control_pin;
val |= amdgpu_connector->router.cd_mux_state; val |= amdgpu_connector->router.cd_mux_state;
amdgpu_i2c_put_byte(amdgpu_connector->router_bus, amdgpu_i2c_put_byte(amdgpu_connector->router_bus,
......
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