Commit cee8113a authored by Dhaval Shah's avatar Dhaval Shah Committed by Michal Simek

soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver

Xilinx ZYNQMP logicoreIP Init driver is based on the new
LogiCoreIP design created. This driver provides the processing system
and programmable logic isolation. Set the frequency based on the clock
information get from the logicoreIP register set.
Signed-off-by: default avatarDhaval Shah <dshah@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent b7511552
# SPDX-License-Identifier: GPL-2.0
menu "Xilinx SoC drivers"
config XILINX_VCU
tristate "Xilinx VCU logicoreIP Init"
help
Provides the driver to enable and disable the isolation between the
processing system and programmable logic part by using the logicoreIP
register set. This driver also configures the frequency based on the
clock information from the logicoreIP register set.
If you say yes here you get support for the logicoreIP.
If unsure, say N.
To compile this driver as a module, choose M here: the
module will be called xlnx_vcu.
endmenu
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_XILINX_VCU) += xlnx_vcu.o
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