Commit cef72982 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM DT updates from Arnd Bergmann:
 "This is another huge branch with close to 450 changessets related to
  devicetree files, roughly half of this for 32-bit and 64-bit
  respectively. There are lots of cleanups and additional hardware
  support for platforms we already support based on SoCs from Renesas,
  ST-Microelectronics, Intel/Altera, Rockchips, Allwinner, Broadcom and
  other manufacturers.

  A total of 6 new SoCs and 37 new boards gets added this time, one more
  SoC will come in a follow-up branch. Most of the new boards are for
  64-bit ARM SoCs, the others are typically for the 32-bit Cortex-A7.

  Going more into details for SoC platforms with new hardware support:

   - The Snapdragon 855 (SM8150) is Qualcomm's current high-end phone
     platform, usually paired with an external 5G modem. So far we only
     support the Qualcomm SM8150 MTP reference platform, but no actual
     products.

   - For the slightly older Qualcomm platforms, support for several
     interesting products is getting added: Three laptops based on
     Snapdragon 835/MSM8998 (Asus NovaGo, HP Envy X2 and Lenovo Miix
     630), one laptop based on Snapdragon 850/sdm850 (Lenovo Yoga C630)
     and several phones based on the older Snapdragon 410/MSM8916
     (Samsung A3 and A5, Longcheer L8150 aka Android One 2nd gen "seed"
     aka Wileyfox Swift).

   - Mediatek MT7629 is a new wireless network router chip, similar to
     the older MT7623. It gets added together with the reference board
     implementation.

   - Allwinner V3 is a repackaged version of the existing low-end V3s
     chip, and is used in the tiny Lichee Pi Zero plus, also added here.
     There is also a new TV set-top box based on Allwinner H6, the Tanix
     TX6, and the eMMC variant of the Olimex A64-Olinuxino development
     board.

   - NXP i.MX8M Nano is a new member of the ever-expanding i.MX SoC
     family, similar to the i.MX8M Mini. As usual, there is a large
     number of new boards for i.MX SoCs: Einfochips i.MX8QXP AI_ML,
     SolidRun Hummingboard Pulse baseboard and System-on-Module,
     Boundary Devices i.MX8MQ Nitrogen8M, and TechNexion
     PICO-PI-IMX8M-DEV for the 64-bit i.MX8 line. For 32-bit, we get the
     Kontron i.MX6UL N6310 SoM with two baseboards, the PHYTEC
     phyBOARD-Segin SoM with three baseboards, and the Zodiac Inflight
     Innovations i.MX7 RMU2 board.

   - In a different NXP product line, the Layerscape LS1046A "Freeway"
     reference board gets added.

   - Amlogic SM1 (S905X3) and G12B (S922X, A311D) are updated chips from
     their set-top-box line and smart speaker with newer CPU and GPU
     cores compared to their predecessors. Both are now also supported
     by the Khadas VIM3 development board series, and the dts files for
     that get reorganized a bit to better deal with all variants.
     Another board based on SM1 that gets added is the SEI Robotics
     SEI610.

   - There are a handful of new x86 and Power9 server boards using
     Aspeed BMC chips that are gaining support for running Linux on the
     BMC through the OpenBMC project: Facebook
     Minipack/Wedge100/Wedge40, Lenovo Hr855xg2, and Mihawk. Notably
     these are still new machines using SoCs based on the ARM9 and ARM11
     CPU cores, as support for the new Cortex-A7 based AST2600 is still
     ramping up.

   - There are three new end-user products using 32-bit Rockchips SoCs:
     Mecer Xtreme Mini S6 is an Android "mini PC" box based on the
     low-end RK3229 chip, while the two AOpen products Chromebox Mini
     (Fievel) and Chromebase Mini (Tiger) run ChromeOS and are meant for
     commercial settings(digital signage, PoS, ...).

   - One more single-board computer based on the popular 64-bit RK3399
     is added: the Leez RK3399 P710"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (467 commits)
  arm64: dts: qcom: Add Lenovo Yoga C630
  ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit
  ARM; dts: aspeed: mihawk: File should not be executable
  ARM: dts: aspeed: swift: Change power supplies to version 2
  ARM: dts: aspeed: vesnin: Add secondary SPI flash chip
  ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option
  ARM: dts: aspeed-g4: Add all flash chips
  ARM: dts: exynos: Enable GPU/Mali T604 on Arndale board
  ARM: dts: exynos: Enable GPU/Mali T604 on Chromebook Snow
  ARM: dts: exynos: Add GPU/Mali T604 node to Exynos5250
  ARM: dts: exynos: Fix min/max buck4 for GPU on Arndale board
  ARM: dts: exynos: Mark LDO10 as always-on on Peach Pit/Pi Chromebooks
  ARM: dts: exynos: Remove not accurate secondary ADC compatible
  arm64: dts: rockchip: limit clock rate of MMC controllers for RK3328
  arm64: dts: meson-sm1-sei610: add stdout-path property back
  arm64: dts: meson-sm1-sei610: enable DVFS
  arm64: dts: khadas-vim3: add support for the SM1 based VIM3L
  dt-bindings: arm: amlogic: add Amlogic SM1 based Khadas VIM3L bindings
  arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi
  arm64: dts: meson: g12a: add reset to tdm formatters
  ...
parents d47ebd68 44acee20
......@@ -91,13 +91,11 @@ properties:
- description: Boards with the Amlogic Meson GXL S905X SoC
items:
- enum:
- amediatech,x96-max
- amlogic,p212
- hwacom,amazetv
- khadas,vim
- libretech,cc
- nexbox,a95x
- seirobotics,sei510
- const: amlogic,s905x
- const: amlogic,meson-gxl
......@@ -129,16 +127,33 @@ properties:
- const: amlogic,a113d
- const: amlogic,meson-axg
- description: Boards with the Amlogic Meson G12A S905D2 SoC
- description: Boards with the Amlogic Meson G12A S905D2/X2/Y2 SoC
items:
- enum:
- amediatech,x96-max
- amlogic,u200
- seirobotics,sei510
- const: amlogic,g12a
- description: Boards with the Amlogic Meson G12B A311D SoC
items:
- enum:
- khadas,vim3
- const: amlogic,a311d
- const: amlogic,g12b
- description: Boards with the Amlogic Meson G12B S922X SoC
items:
- enum:
- hardkernel,odroid-n2
- khadas,vim3
- const: amlogic,s922x
- const: amlogic,g12b
- description: Boards with the Amlogic Meson SM1 S905X3/D3/Y3 SoC
items:
- enum:
- seirobotics,sei610
- khadas,vim3l
- const: amlogic,sm1
...
......@@ -161,6 +161,20 @@ properties:
items:
- enum:
- fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board
- kontron,imx6ul-n6310-som # Kontron N6310 SOM
- const: fsl,imx6ul
- description: Kontron N6310 S Board
items:
- const: kontron,imx6ul-n6310-s
- const: kontron,imx6ul-n6310-som
- const: fsl,imx6ul
- description: Kontron N6310 S 43 Board
items:
- const: kontron,imx6ul-n6310-s-43
- const: kontron,imx6ul-n6310-s
- const: kontron,imx6ul-n6310-som
- const: fsl,imx6ul
- description: i.MX6ULL based Boards
......@@ -188,6 +202,7 @@ properties:
- fsl,imx7d-sdb # i.MX7 SabreSD Board
- novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board
- tq,imx7d-mba7 # i.MX7D TQ MBa7 with TQMa7D SoM
- zii,imx7d-rmu2 # ZII RMU2 Board
- zii,imx7d-rpu2 # ZII RPU2 Board
- const: fsl,imx7d
......@@ -214,16 +229,26 @@ properties:
- fsl,imx8mm-evk # i.MX8MM EVK Board
- const: fsl,imx8mm
- description: i.MX8MN based Boards
items:
- enum:
- fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board
- const: fsl,imx8mn
- description: i.MX8MQ based Boards
items:
- enum:
- boundary,imx8mq-nitrogen8m # i.MX8MQ NITROGEN Board
- fsl,imx8mq-evk # i.MX8MQ EVK Board
- purism,librem5-devkit # Purism Librem5 devkit
- solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse
- technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk
- const: fsl,imx8mq
- description: i.MX8QXP based Boards
items:
- enum:
- einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board
- fsl,imx8qxp-mek # i.MX8QXP MEK Board
- const: fsl,imx8qxp
......@@ -283,6 +308,7 @@ properties:
- description: LS1046A based Boards
items:
- enum:
- fsl,ls1046a-frwy
- fsl,ls1046a-qds
- fsl,ls1046a-rdb
- const: fsl,ls1046a
......
......@@ -46,6 +46,10 @@ properties:
- enum:
- mediatek,mt6765-evb
- const: mediatek,mt6765
- items:
- enum:
- mediatek,mt6779-evb
- const: mediatek,mt6779
- items:
- enum:
- mediatek,mt6795-evb
......
......@@ -45,6 +45,7 @@ description: |
mtp
sbc
hk01
qrd
The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
where the minor number may be omitted when it's zero, i.e. v1.0 is the same
......@@ -115,6 +116,13 @@ properties:
- const: qcom,msm8916-mtp
- const: qcom,msm8916
- items:
- enum:
- longcheer,l8150
- samsung,a3u-eur
- samsung,a5u-eur
- const: qcom,msm8916
- items:
- const: qcom,msm8996-mtp
......
......@@ -128,6 +128,21 @@ properties:
- const: google,veyron
- const: rockchip,rk3288
- description: Google Fievel (AOPEN Chromebox Mini)
items:
- const: google,veyron-fievel-rev8
- const: google,veyron-fievel-rev7
- const: google,veyron-fievel-rev6
- const: google,veyron-fievel-rev5
- const: google,veyron-fievel-rev4
- const: google,veyron-fievel-rev3
- const: google,veyron-fievel-rev2
- const: google,veyron-fievel-rev1
- const: google,veyron-fievel-rev0
- const: google,veyron-fievel
- const: google,veyron
- const: rockchip,rk3288
- description: Google Gru (dev-board)
items:
- const: google,gru-rev15
......@@ -311,6 +326,21 @@ properties:
- const: google,veyron
- const: rockchip,rk3288
- description: Google Tiger (AOpen Chromebase Mini)
items:
- const: google,veyron-tiger-rev8
- const: google,veyron-tiger-rev7
- const: google,veyron-tiger-rev6
- const: google,veyron-tiger-rev5
- const: google,veyron-tiger-rev4
- const: google,veyron-tiger-rev3
- const: google,veyron-tiger-rev2
- const: google,veyron-tiger-rev1
- const: google,veyron-tiger-rev0
- const: google,veyron-tiger
- const: google,veyron
- const: rockchip,rk3288
- description: Haoyu MarsBoard RK3066
items:
- const: haoyu,marsboard-rk3066
......@@ -329,6 +359,16 @@ properties:
- khadas,edge-v
- const: rockchip,rk3399
- description: Mecer Xtreme Mini S6
items:
- const: mecer,xms6
- const: rockchip,rk3229
- description: Leez RK3399 P710
items:
- const: leez,p710
- const: rockchip,rk3399
- description: mqmaker MiQi
items:
- const: mqmaker,miqi
......@@ -424,11 +464,6 @@ properties:
- rockchip,rk3288-evb-rk808
- const: rockchip,rk3288
- description: Rockchip RK3288 Fennec
items:
- const: rockchip,rk3288-fennec
- const: rockchip,rk3288
- description: Rockchip RK3328 Evaluation board
items:
- const: rockchip,rk3328-evb
......
......@@ -353,6 +353,12 @@ properties:
- const: licheepi,licheepi-zero
- const: allwinner,sun8i-v3s
- description: Lichee Zero Plus (with S3, without eMMC/SPI Flash)
items:
- const: sipeed,lichee-zero-plus
- const: sochip,s3
- const: allwinner,sun8i-v3
- description: Linksprite PCDuino
items:
- const: linksprite,a10-pcduino
......@@ -568,6 +574,11 @@ properties:
- const: olimex,a64-olinuxino
- const: allwinner,sun50i-a64
- description: Olimex A64-OlinuXino (with eMMC)
items:
- const: olimex,a64-olinuxino-emmc
- const: allwinner,sun50i-a64
- description: Olimex A64 Teres-I
items:
- const: olimex,a64-teres-i
......@@ -671,6 +682,11 @@ properties:
- const: sinlinx,sina33
- const: allwinner,sun8i-a33
- description: Tanix TX6
items:
- const: oranth,tanix-tx6
- const: allwinner,sun50i-h6
- description: TBS A711 Tablet
items:
- const: tbs-biometrics,a711
......
......@@ -44,6 +44,10 @@ Optional properties:
what bootloader sets up in IOMUXC_GPR1[11:0] will be
used.
- fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
devices, the presence of this property indicates that
the weim bus should operate in Burst Clock Mode.
Timing property for child nodes. It is mandatory, not optional.
- fsl,weim-cs-timing: The timing array, contains timing values for the
......
......@@ -22,6 +22,7 @@ Required Properties:
components.
- resets : phandle of the internal reset line
- #clock-cells : should be 1.
- #reset-cells : should be 1 on the g12a (and following) soc family
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume. All available clocks are defined as
......
......@@ -11,6 +11,7 @@ Required Properties:
"amlogic,axg-clkc" for AXG SoC.
"amlogic,g12a-clkc" for G12A SoC.
"amlogic,g12b-clkc" for G12B SoC.
"amlogic,sm1-clkc" for SM1 SoC.
- clocks : list of clock phandle, one for each entry clock-names.
- clock-names : should contain the following:
* "xtal": the platform xtal
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/bindings/clock/imx8mn-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP i.MX8M Nano Clock Control Module Binding
maintainers:
- Anson Huang <Anson.Huang@nxp.com>
description: |
NXP i.MX8M Nano clock control module is an integrated clock controller, which
generates and supplies to all modules.
properties:
compatible:
const: fsl,imx8mn-ccm
reg:
maxItems: 1
clocks:
items:
- description: 32k osc
- description: 24m osc
- description: ext1 clock input
- description: ext2 clock input
- description: ext3 clock input
- description: ext4 clock input
clock-names:
items:
- const: osc_32k
- const: osc_24m
- const: clk_ext1
- const: clk_ext2
- const: clk_ext3
- const: clk_ext4
'#clock-cells':
const: 1
description: |
The clock consumer should specify the desired clock by having the clock
ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mn-clock.h
for the full list of i.MX8M Nano clock IDs.
required:
- compatible
- reg
- clocks
- clock-names
- '#clock-cells'
examples:
# Clock Control Module node:
- |
clk: clock-controller@30380000 {
compatible = "fsl,imx8mn-ccm";
reg = <0x0 0x30380000 0x0 0x10000>;
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>,
<&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
clock-names = "osc_32k", "osc_24m", "clk_ext1",
"clk_ext2", "clk_ext3", "clk_ext4";
};
# Required external clocks for Clock Control Module node:
- |
osc_32k: clock-osc-32k {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "osc_32k";
};
osc_24m: clock-osc-24m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "osc_24m";
};
clk_ext1: clock-ext1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <133000000>;
clock-output-names = "clk_ext1";
};
clk_ext2: clock-ext2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <133000000>;
clock-output-names = "clk_ext2";
};
clk_ext3: clock-ext3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <133000000>;
clock-output-names = "clk_ext3";
};
clk_ext4: clock-ext4 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency= <133000000>;
clock-output-names = "clk_ext4";
};
...
......@@ -3,6 +3,7 @@ EEPROMs (SPI) compatible with Atmel at25.
Required properties:
- compatible : Should be "<vendor>,<type>", and generic value "atmel,at25".
Example "<vendor>,<type>" values:
"anvo,anv32e61w"
"microchip,25lc040"
"st,m95m02"
"st,m95256"
......
......@@ -26,6 +26,9 @@ properties:
- items:
- const: allwinner,sun50i-a64-i2c
- const: allwinner,sun6i-a31-i2c
- items:
- const: allwinner,sun50i-h6-i2c
- const: allwinner,sun6i-a31-i2c
- const: marvell,mv64xxx-i2c
- const: marvell,mv78230-i2c
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/allwinner,sun8i-a33-ths.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A33 Thermal Sensor Device Tree Bindings
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <maxime.ripard@bootlin.com>
properties:
"#io-channel-cells":
const: 0
"#thermal-sensor-cells":
const: 0
compatible:
const: allwinner,sun8i-a33-ths
reg:
maxItems: 1
required:
- "#io-channel-cells"
- "#thermal-sensor-cells"
- compatible
- reg
additionalProperties: false
examples:
- |
ths: ths@1c25000 {
compatible = "allwinner,sun8i-a33-ths";
reg = <0x01c25000 0x100>;
#thermal-sensor-cells = <0>;
#io-channel-cells = <0>;
};
...
......@@ -15,6 +15,7 @@ Required properties:
"mediatek,mt7629-sysirq", "mediatek,mt6577-sysirq": for MT7629
"mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795
"mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797
"mediatek,mt6779-sysirq", "mediatek,mt6577-sysirq": for MT6779
"mediatek,mt6765-sysirq", "mediatek,mt6577-sysirq": for MT6765
"mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755
"mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592
......
......@@ -26,6 +26,7 @@ Required properties:
- GXBB (S905) : "amlogic,gxbb-vdec"
- GXL (S905X, S905D) : "amlogic,gxl-vdec"
- GXM (S912) : "amlogic,gxm-vdec"
followed by the common "amlogic,gx-vdec"
- reg: base address and size of he following memory-mapped regions :
- dos
- esparser
......@@ -47,8 +48,8 @@ Required properties:
Example:
vdec: video-decoder@c8820000 {
compatible = "amlogic,gxbb-vdec";
vdec: video-codec@c8820000 {
compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec";
reg = <0x0 0xc8820000 0x0 0x10000>,
<0x0 0xc110a580 0x0 0xe4>;
reg-names = "dos", "esparser";
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/allwinner,sun4i-a10-ts.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Resistive Touchscreen Controller Device Tree Bindings
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <maxime.ripard@bootlin.com>
properties:
"#thermal-sensor-cells":
const: 0
compatible:
enum:
- allwinner,sun4i-a10-ts
- allwinner,sun5i-a13-ts
- allwinner,sun6i-a31-ts
reg:
maxItems: 1
interrupts:
maxItems: 1
allwinner,ts-attached:
$ref: /schemas/types.yaml#/definitions/flag
description: A touchscreen is attached to the controller
allwinner,tp-sensitive-adjust:
allOf:
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0
maximum: 15
default: 15
description: Sensitivity of pen down detection
allwinner,filter-type:
allOf:
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0
maximum: 3
default: 1
description: |
Select median and averaging filter. Sample used for median /
averaging filter:
0: 4/2
1: 5/3
2: 8/4
3: 16/8
required:
- "#thermal-sensor-cells"
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
rtp: rtp@1c25000 {
compatible = "allwinner,sun4i-a10-ts";
reg = <0x01c25000 0x100>;
interrupts = <29>;
allwinner,ts-attached;
#thermal-sensor-cells = <0>;
/* sensitive/noisy touch panel */
allwinner,tp-sensitive-adjust = <0>;
allwinner,filter-type = <3>;
};
...
Allwinner SoCs' GPADC Device Tree bindings
------------------------------------------
The Allwinner SoCs all have an ADC that can also act as a thermal sensor
and sometimes as a touchscreen controller.
Required properties:
- compatible: "allwinner,sun8i-a33-ths",
- reg: mmio address range of the chip,
- #thermal-sensor-cells: shall be 0,
- #io-channel-cells: shall be 0,
Example:
ths: ths@1c25000 {
compatible = "allwinner,sun8i-a33-ths";
reg = <0x01c25000 0x100>;
#thermal-sensor-cells = <0>;
#io-channel-cells = <0>;
};
sun4i, sun5i and sun6i SoCs are also supported via the older binding:
sun4i resistive touchscreen controller
--------------------------------------
Required properties:
- compatible: "allwinner,sun4i-a10-ts", "allwinner,sun5i-a13-ts" or
"allwinner,sun6i-a31-ts"
- reg: mmio address range of the chip
- interrupts: interrupt to which the chip is connected
- #thermal-sensor-cells: shall be 0
Optional properties:
- allwinner,ts-attached : boolean indicating that an actual touchscreen
is attached to the controller
- allwinner,tp-sensitive-adjust : integer (4 bits)
adjust sensitivity of pen down detection
between 0 (least sensitive) and 15
(defaults to 15)
- allwinner,filter-type : integer (2 bits)
select median and averaging filter
samples used for median / averaging filter
0: 4/2
1: 5/3
2: 8/4
3: 16/8
(defaults to 1)
Example:
rtp: rtp@1c25000 {
compatible = "allwinner,sun4i-a10-ts";
reg = <0x01c25000 0x100>;
interrupts = <29>;
allwinner,ts-attached;
#thermal-sensor-cells = <0>;
/* sensitive/noisy touch panel */
allwinner,tp-sensitive-adjust = <0>;
allwinner,filter-type = <3>;
};
......@@ -5,6 +5,7 @@ Required properties:
- compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
"renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC.
"renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
"renesas,can-r8a77470" if CAN controller is a part of R8A77470 SoC.
"renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
"renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC.
"renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
......@@ -17,6 +18,8 @@ Required properties:
"renesas,can-r8a7795" if CAN controller is a part of R8A7795 SoC.
"renesas,can-r8a7796" if CAN controller is a part of R8A7796 SoC.
"renesas,can-r8a77965" if CAN controller is a part of R8A77965 SoC.
"renesas,can-r8a77990" if CAN controller is a part of R8A77990 SoC.
"renesas,can-r8a77995" if CAN controller is a part of R8A77995 SoC.
"renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
"renesas,rcar-gen2-can" for a generic R-Car Gen2 or RZ/G1
compatible device.
......@@ -33,7 +36,8 @@ Required properties:
- pinctrl-0: pin control group to be used for this controller.
- pinctrl-names: must be "default".
Required properties for R8A7795, R8A7796 and R8A77965:
Required properties for R8A774A1, R8A774C0, R8A7795, R8A7796, R8A77965,
R8A77990, and R8A77995:
For the denoted SoCs, "clkp2" can be CANFD clock. This is a div6 clock and can
be used by both CAN and CAN FD controller at the same time. It needs to be
scaled to maximum frequency if any of these controllers use it. This is done
......
......@@ -4,6 +4,7 @@ Renesas R-Car CAN FD controller Device Tree Bindings
Required properties:
- compatible: Must contain one or more of the following:
- "renesas,rcar-gen3-canfd" for R-Car Gen3 and RZ/G2 compatible controllers.
- "renesas,r8a774a1-canfd" for R8A774A1 (RZ/G2M) compatible controller.
- "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller.
- "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller.
- "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller.
......@@ -11,6 +12,7 @@ Required properties:
- "renesas,r8a77970-canfd" for R8A77970 (R-Car V3M) compatible controller.
- "renesas,r8a77980-canfd" for R8A77980 (R-Car V3H) compatible controller.
- "renesas,r8a77990-canfd" for R8A77990 (R-Car E3) compatible controller.
- "renesas,r8a77995-canfd" for R8A77995 (R-Car D3) compatible controller.
When compatible with the generic version, nodes must list the
SoC-specific version corresponding to the platform first, followed by the
......@@ -29,13 +31,12 @@ The name of the child nodes are "channel0" and "channel1" respectively. Each
child node supports the "status" property only, which is used to
enable/disable the respective channel.
Required properties for "renesas,r8a774c0-canfd", "renesas,r8a7795-canfd",
"renesas,r8a7796-canfd", "renesas,r8a77965-canfd", and "renesas,r8a77990-canfd"
compatible:
In R8A774C0, R8A7795, R8A7796, R8A77965, and R8A77990 SoCs, canfd clock is a
div6 clock and can be used by both CAN and CAN FD controller at the same time.
It needs to be scaled to maximum frequency if any of these controllers use it.
This is done using the below properties:
Required properties for R8A774A1, R8A774C0, R8A7795, R8A7796, R8A77965,
R8A77990, and R8A77995:
In the denoted SoCs, canfd clock is a div6 clock and can be used by both CAN
and CAN FD controller at the same time. It needs to be scaled to maximum
frequency if any of these controllers use it. This is done using the below
properties:
- assigned-clocks: phandle of canfd clock.
- assigned-clock-rates: maximum frequency of this clock.
......
......@@ -13,7 +13,10 @@ Required properties:
- reg : Address and length of the register set for the device
- interrupts : Should contain uart interrupt
- clocks : phandle + clock specifier pairs, one for each entry in clock-names
- clock-names : should contain: "ipg" - the uart clock
- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud
clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access
lpuart controller registers, it also requires "baud" clock for module to
receive/transmit data.
Optional properties:
- dmas: A list of two dma specifiers, one for each entry in dma-names.
......
......@@ -9,6 +9,7 @@ Required properties:
* "mediatek,mt6589-uart" for MT6589 compatible UARTS
* "mediatek,mt6755-uart" for MT6755 compatible UARTS
* "mediatek,mt6765-uart" for MT6765 compatible UARTS
* "mediatek,mt6779-uart" for MT6779 compatible UARTS
* "mediatek,mt6795-uart" for MT6795 compatible UARTS
* "mediatek,mt6797-uart" for MT6797 compatible UARTS
* "mediatek,mt7622-uart" for MT7622 compatible UARTS
......
......@@ -6,6 +6,7 @@ Required properties:
or
"fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi"
"fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi"
"fsl,ls1088a-dspi" followed by "fsl,ls1021a-v1.0-dspi"
- reg : Offset and length of the register set for the device
- interrupts : Should contain SPI controller interrupt
- clocks: from common clock binding: handle to dspi clock.
......
......@@ -27,6 +27,8 @@ patternProperties:
description: Abilis Systems
"^abracon,.*":
description: Abracon Corporation
"^acme,.*":
description: Acme Systems srl
"^actions,.*":
description: Actions Semiconductor Co., Ltd.
"^active-semi,.*":
......@@ -81,6 +83,8 @@ patternProperties:
description: Analogix Semiconductor, Inc.
"^andestech,.*":
description: Andes Technology Corporation
"^anvo,.*":
description: Anvo-Systems Dresden GmbH
"^apm,.*":
description: Applied Micro Circuits Corporation (APM)
"^aptina,.*":
......@@ -269,6 +273,8 @@ patternProperties:
description: Emerging Display Technologies
"^eeti,.*":
description: eGalax_eMPIA Technology Inc
"^einfochips,.*":
description: Einfochips
"^elan,.*":
description: Elan Microelectronic Corp.
"^elgin,.*":
......@@ -503,6 +509,8 @@ patternProperties:
description: Lantiq Semiconductor
"^lattice,.*":
description: Lattice Semiconductor
"^leez,.*":
description: Leez
"^lego,.*":
description: LEGO Systems A/S
"^lemaker,.*":
......@@ -529,6 +537,8 @@ patternProperties:
description: Linear Technology Corporation
"^logicpd,.*":
description: Logic PD, Inc.
"^longcheer,.*":
description: Longcheer Technology (Shanghai) Co., Ltd.
"^lsi,.*":
description: LSI Corp. (LSI Logic)
"^lwn,.*":
......@@ -549,6 +559,8 @@ patternProperties:
description: mCube
"^meas,.*":
description: Measurement Specialties
"^mecer,.*":
description: Mustek Limited
"^mediatek,.*":
description: MediaTek Inc.
"^megachips,.*":
......
......@@ -10016,8 +10016,8 @@ L: linux-media@vger.kernel.org
L: linux-renesas-soc@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
S: Supported
F: Documentation/devicetree/bindings/media/renesas,rcar-csi2.txt
F: Documentation/devicetree/bindings/media/rcar_vin.txt
F: Documentation/devicetree/bindings/media/renesas,csi2.txt
F: Documentation/devicetree/bindings/media/renesas,vin.txt
F: drivers/media/platform/rcar-vin/
MEDIA DRIVERS FOR RENESAS - VSP1
......
......@@ -569,17 +569,22 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-geam.dtb \
imx6ul-isiot-emmc.dtb \
imx6ul-isiot-nand.dtb \
imx6ul-kontron-n6310-s.dtb \
imx6ul-kontron-n6310-s-43.dtb \
imx6ul-liteboard.dtb \
imx6ul-opos6uldev.dtb \
imx6ul-pico-hobbit.dtb \
imx6ul-pico-pi.dtb \
imx6ul-phytec-phyboard-segin-full.dtb \
imx6ul-phytec-segin-ff-rdk-nand.dtb \
imx6ul-tx6ul-0010.dtb \
imx6ul-tx6ul-0011.dtb \
imx6ul-tx6ul-mainboard.dtb \
imx6ull-14x14-evk.dtb \
imx6ull-colibri-eval-v3.dtb \
imx6ull-colibri-wifi-eval-v3.dtb \
imx6ull-phytec-segin-ff-rdk-nand.dtb \
imx6ull-phytec-segin-ff-rdk-emmc.dtb \
imx6ull-phytec-segin-lc-rdk-nand.dtb \
imx6ulz-14x14-evk.dtb
dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-cl-som-imx7.dtb \
......@@ -594,6 +599,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-sdb.dtb \
imx7d-sdb-reva.dtb \
imx7d-sdb-sht11.dtb \
imx7d-zii-rmu2.dtb \
imx7d-zii-rpu2.dtb \
imx7s-colibri-eval-v3.dtb \
imx7s-mba7.dtb \
......@@ -905,9 +911,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3188-radxarock.dtb \
rk3228-evb.dtb \
rk3229-evb.dtb \
rk3229-xms6.dtb \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb \
rk3288-fennec.dtb \
rk3288-firefly-beta.dtb \
rk3288-firefly.dtb \
rk3288-firefly-reload.dtb \
......@@ -919,6 +925,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
rk3288-veyron-brain.dtb \
rk3288-veyron-fievel.dtb \
rk3288-veyron-jaq.dtb \
rk3288-veyron-jerry.dtb \
rk3288-veyron-mickey.dtb \
......@@ -926,6 +933,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-veyron-minnie.dtb \
rk3288-veyron-pinky.dtb \
rk3288-veyron-speedy.dtb \
rk3288-veyron-tiger.dtb \
rk3288-vyasa.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += \
s3c2416-smdk2416.dtb
......@@ -1114,6 +1122,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-r16-nintendo-super-nes-classic.dtb \
sun8i-r16-parrot.dtb \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-s3-lichee-zero-plus.dtb \
sun8i-t3-cqa3t-bv3.dtb \
sun8i-v3s-licheepi-zero.dtb \
sun8i-v3s-licheepi-zero-dock.dtb \
......@@ -1262,6 +1271,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7623a-rfb-nand.dtb \
mt7623n-rfb-emmc.dtb \
mt7623n-bananapi-bpi-r2.dtb \
mt7629-rfb.dtb \
mt8127-moose.dtb \
mt8135-evbp1.dtb
dtb-$(CONFIG_ARCH_MILBEAUT) += milbeaut-m10v-evb.dtb
......@@ -1271,13 +1281,18 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-arm-centriq2400-rep.dtb \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-facebook-cmm.dtb \
aspeed-bmc-facebook-minipack.dtb \
aspeed-bmc-facebook-tiogapass.dtb \
aspeed-bmc-facebook-wedge40.dtb \
aspeed-bmc-facebook-wedge100.dtb \
aspeed-bmc-facebook-yamp.dtb \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-lenovo-hr855xg2.dtb \
aspeed-bmc-microsoft-olympus.dtb \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-mihawk.dtb \
aspeed-bmc-opp-palmetto.dtb \
aspeed-bmc-opp-romulus.dtb \
aspeed-bmc-opp-swift.dtb \
......
......@@ -5,23 +5,13 @@
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-osd335x-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "TI AM335x BeagleBone Blue";
compatible = "ti,am335x-bone-blue", "ti,am33xx";
cpus {
cpu@0 {
cpu0-supply = <&dcdc2_reg>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
chosen {
stdout-path = &uart0;
};
......@@ -142,13 +132,6 @@ AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* (T11) gpmc_ad10.g
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
......@@ -328,16 +311,6 @@ &cppi41dma {
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@24 {
reg = <0x24>;
};
baseboard_eeprom: baseboard_eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
......@@ -381,66 +354,13 @@ pressure@76 {
/include/ "tps65217.dtsi"
&tps {
interrupts = <7>; /* NMI */
interrupt-parent = <&intc>;
/delete-property/ ti,pmic-shutdown-controller;
charger {
interrupts = <0>, <1>;
interrupt-names = "USB", "AC";
status = "okay";
};
pwrbutton {
interrupts = <2>;
status = "okay";
};
regulators {
dcdc1_reg: regulator@0 {
regulator-name = "vdds_dpr";
regulator-always-on;
};
dcdc2_reg: regulator@1 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1351500>;
regulator-boot-on;
regulator-always-on;
};
dcdc3_reg: regulator@2 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: regulator@3 {
regulator-name = "vio,vrtc,vdds";
regulator-always-on;
};
ldo2_reg: regulator@4 {
regulator-name = "vdd_3v3aux";
regulator-always-on;
};
ldo3_reg: regulator@5 {
regulator-name = "vdd_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo4_reg: regulator@6 {
regulator-name = "vdd_3v3a";
regulator-always-on;
};
};
};
&mmc1 {
......@@ -502,14 +422,6 @@ bluetooth {
};
};
&aes {
status = "okay";
};
&sham {
status = "okay";
};
&rtc {
system-power-controller;
clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
......
......@@ -44,7 +44,6 @@ vwlan_fixed: fixedregulator2 {
regulator-name = "vwlan_fixed";
gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; /* gpio0_20 */
enable-active-high;
regulator-boot-off;
};
backlight {
......
......@@ -94,6 +94,17 @@ lm75@4d {
};
};
&sdmmc {
status = "okay";
};
&sdhci0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd1_default>;
};
/*
* Enable port A as device (via the virtual hub) and port B as
* host by default on the eval board. This can be easily changed
......
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
#include "aspeed-g5.dtsi"
/ {
model = "Facebook Minipack 100 BMC";
compatible = "facebook,minipack-bmc", "aspeed,ast2500";
aliases {
/*
* Override the default serial aliases to avoid breaking
* the legacy applications.
*/
serial0 = &uart5;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
/*
* i2c switch 2-0070, pca9548, 8 child channels assigned
* with bus number 16-23.
*/
i2c16 = &imux16;
i2c17 = &imux17;
i2c18 = &imux18;
i2c19 = &imux19;
i2c20 = &imux20;
i2c21 = &imux21;
i2c22 = &imux22;
i2c23 = &imux23;
/*
* i2c switch 8-0070, pca9548, 8 child channels assigned
* with bus number 24-31.
*/
i2c24 = &imux24;
i2c25 = &imux25;
i2c26 = &imux26;
i2c27 = &imux27;
i2c28 = &imux28;
i2c29 = &imux29;
i2c30 = &imux30;
i2c31 = &imux31;
/*
* i2c switch 9-0070, pca9548, 8 child channels assigned
* with bus number 32-39.
*/
i2c32 = &imux32;
i2c33 = &imux33;
i2c34 = &imux34;
i2c35 = &imux35;
i2c36 = &imux36;
i2c37 = &imux37;
i2c38 = &imux38;
i2c39 = &imux39;
/*
* i2c switch 11-0070, pca9548, 8 child channels assigned
* with bus number 40-47.
*/
i2c40 = &imux40;
i2c41 = &imux41;
i2c42 = &imux42;
i2c43 = &imux43;
i2c44 = &imux44;
i2c45 = &imux45;
i2c46 = &imux46;
i2c47 = &imux47;
};
chosen {
stdout-path = &uart1;
bootargs = "debug console=ttyS1,9600n8 root=/dev/ram rw";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
};
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
&wdt2 {
status = "okay";
aspeed,reset-type = "system";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "facebook-bmc-flash-layout.dtsi"
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_ncts1_default
&pinctrl_ndsr1_default
&pinctrl_ndtr1_default
&pinctrl_nrts1_default>;
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default
&pinctrl_rxd2_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd4_default
&pinctrl_rxd4_default>;
};
&uart5 {
status = "okay";
};
&mac1 {
status = "okay";
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c0 {
status = "okay";
bus-frequency = <400000>;
multi-master;
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
imux16: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux17: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux18: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux19: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux20: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux21: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux22: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux23: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
multi-master;
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
imux24: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux25: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux26: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux27: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux28: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux29: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux30: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux31: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c9 {
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
imux32: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux33: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux34: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux35: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux36: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux37: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux38: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux39: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
imux40: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux41: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux42: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux43: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux44: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux45: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux46: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux47: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&vhub {
status = "okay";
};
......@@ -12,6 +12,27 @@ / {
aliases {
serial0 = &uart1;
serial4 = &uart5;
/*
* Hardcode the bus number of i2c switches' channels to
* avoid breaking the legacy applications.
*/
i2c16 = &imux16;
i2c17 = &imux17;
i2c18 = &imux18;
i2c19 = &imux19;
i2c20 = &imux20;
i2c21 = &imux21;
i2c22 = &imux22;
i2c23 = &imux23;
i2c24 = &imux24;
i2c25 = &imux25;
i2c26 = &imux26;
i2c27 = &imux27;
i2c28 = &imux28;
i2c29 = &imux29;
i2c30 = &imux30;
i2c31 = &imux31;
};
chosen {
stdout-path = &uart5;
......@@ -25,13 +46,9 @@ memory@80000000 {
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>;
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 7>;
};
};
&fmc {
......@@ -124,6 +141,215 @@ &i2c0 {
&i2c1 {
status = "okay";
//X24 Riser
i2c-switch@71 {
compatible = "nxp,pca9544";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x71>;
imux16: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
ina230@45 {
compatible = "ti,ina230";
reg = <0x45>;
};
tmp75@48 {
compatible = "ti,tmp75";
reg = <0x48>;
};
tmp421@49 {
compatible = "ti,tmp75";
reg = <0x49>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
i2c-switch@73 {
compatible = "nxp,pca9546";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x73>;
imux20: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux21: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux22: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux23: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
imux17: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
ina230@45 {
compatible = "ti,ina230";
reg = <0x45>;
};
tmp421@48 {
compatible = "ti,tmp75";
reg = <0x48>;
};
tmp421@49 {
compatible = "ti,tmp75";
reg = <0x49>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
i2c-switch@73 {
compatible = "nxp,pca9546";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x73>;
imux24: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux25: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux26: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux27: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
imux18: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
ina230@45 {
compatible = "ti,ina230";
reg = <0x45>;
};
tmp421@48 {
compatible = "ti,tmp75";
reg = <0x48>;
};
tmp421@49 {
compatible = "ti,tmp75";
reg = <0x49>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
i2c-switch@73 {
compatible = "nxp,pca9546";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x73>;
imux28: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux29: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux30: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux31: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
imux19: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
i2c-switch@40 {
compatible = "ti,ina230";
reg = <0x40>;
};
i2c-switch@41 {
compatible = "ti,ina230";
reg = <0x41>;
};
i2c-switch@45 {
compatible = "ti,ina230";
reg = <0x45>;
};
};
};
};
&i2c2 {
......@@ -144,6 +370,42 @@ &i2c4 {
&i2c5 {
status = "okay";
// CPU Voltage regulators
regulator@48 {
compatible = "infineon,pxe1610";
reg = <0x48>;
};
regulator@4a {
compatible = "infineon,pxe1610";
reg = <0x4a>;
};
regulator@50 {
compatible = "infineon,pxe1610";
reg = <0x50>;
};
regulator@52 {
compatible = "infineon,pxe1610";
reg = <0x52>;
};
regulator@58 {
compatible = "infineon,pxe1610";
reg = <0x58>;
};
regulator@5a {
compatible = "infineon,pxe1610";
reg = <0x5a>;
};
regulator@68 {
compatible = "infineon,pxe1610";
reg = <0x68>;
};
regulator@70 {
compatible = "infineon,pxe1610";
reg = <0x70>;
};
regulator@72 {
compatible = "infineon,pxe1610";
reg = <0x72>;
};
};
&i2c6 {
......
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
#include "aspeed-g4.dtsi"
/ {
model = "Facebook Wedge 100 BMC";
compatible = "facebook,wedge100-bmc", "aspeed,ast2400";
aliases {
/*
* Override the default uart aliases to avoid breaking
* the legacy applications.
*/
serial0 = &uart5;
serial1 = &uart1;
serial2 = &uart3;
serial3 = &uart4;
};
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS2,9600n8 root=/dev/ram rw";
};
memory@40000000 {
reg = <0x40000000 0x20000000>;
};
};
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
&wdt2 {
status = "okay";
aspeed,reset-type = "system";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "fmc0";
#include "facebook-bmc-flash-layout.dtsi"
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd4_default
&pinctrl_rxd4_default>;
};
&uart5 {
status = "okay";
};
&mac1 {
status = "okay";
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
};
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&vhub {
status = "okay";
};
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
#include "aspeed-g4.dtsi"
/ {
model = "Facebook Wedge 40 BMC";
compatible = "facebook,wedge40-bmc", "aspeed,ast2400";
aliases {
/*
* Override the default uart aliases to avoid breaking
* the legacy applications.
*/
serial0 = &uart5;
serial1 = &uart1;
serial2 = &uart3;
serial3 = &uart4;
};
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS2,9600n8 root=/dev/ram rw";
};
memory@40000000 {
reg = <0x40000000 0x20000000>;
};
};
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
&wdt2 {
status = "disabled";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "fmc0";
#include "facebook-bmc-flash-layout.dtsi"
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd4_default
&pinctrl_rxd4_default>;
};
&uart5 {
status = "okay";
};
&mac1 {
status = "okay";
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&vhub {
status = "okay";
};
......@@ -725,9 +725,9 @@ power-supply@58 {
reg = <0x58>;
};
power-supply@5a {
power-supply@59 {
compatible = "pmbus";
reg = <0x5a>;
reg = <0x59>;
};
};
......
This diff is collapsed.
This diff is collapsed.
......@@ -207,8 +207,8 @@ fsi: gpio-fsi {
#size-cells = <0>;
no-gpio-delays;
clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
clock-gpios = <&gpio ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
data-gpios = <&gpio ASPEED_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
......@@ -494,7 +494,7 @@ gpio@15 {
};
power-supply@68 {
compatible = "ibm,cffps1";
compatible = "ibm,cffps2";
reg = <0x68>;
};
......@@ -504,7 +504,7 @@ eeprom@50 {
};
power-supply@69 {
compatible = "ibm,cffps1";
compatible = "ibm,cffps2";
reg = <0x69>;
};
......@@ -963,4 +963,15 @@ &adc {
status = "okay";
};
&sdmmc {
status = "okay";
};
&sdhci1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd2_default>;
};
#include "ibm-power9-dual.dtsi"
......@@ -81,6 +81,12 @@ flash@0 {
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
flash@1 {
status = "okay";
m25p,fast-read;
label = "alt";
};
};
&spi {
......@@ -222,3 +228,7 @@ &i2c13 {
&vuart {
status = "okay";
};
&wdt2 {
aspeed,alt-boot;
};
......@@ -67,6 +67,26 @@ flash@0 {
compatible = "jedec,spi-nor";
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
flash@3 {
reg = < 3 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
flash@4 {
reg = < 4 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
};
spi: spi@1e630000 {
......@@ -192,6 +212,34 @@ sram: sram@1e720000 {
reg = <0x1e720000 0x8000>; // 32K
};
sdmmc: sd-controller@1e740000 {
compatible = "aspeed,ast2400-sd-controller";
reg = <0x1e740000 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x1e740000 0x10000>;
clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
status = "disabled";
sdhci0: sdhci@100 {
compatible = "aspeed,ast2400-sdhci";
reg = <0x100 0x100>;
interrupts = <26>;
sdhci,auto-cmd12;
clocks = <&syscon ASPEED_CLK_SDIO>;
status = "disabled";
};
sdhci1: sdhci@200 {
compatible = "aspeed,ast2400-sdhci";
reg = <0x200 0x100>;
interrupts = <26>;
sdhci,auto-cmd12;
clocks = <&syscon ASPEED_CLK_SDIO>;
status = "disabled";
};
};
gpio: gpio@1e780000 {
#gpio-cells = <2>;
gpio-controller;
......
......@@ -267,13 +267,41 @@ sram: sram@1e720000 {
reg = <0x1e720000 0x9000>; // 36K
};
sdmmc: sd-controller@1e740000 {
compatible = "aspeed,ast2500-sd-controller";
reg = <0x1e740000 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x1e740000 0x10000>;
clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
status = "disabled";
sdhci0: sdhci@100 {
compatible = "aspeed,ast2500-sdhci";
reg = <0x100 0x100>;
interrupts = <26>;
sdhci,auto-cmd12;
clocks = <&syscon ASPEED_CLK_SDIO>;
status = "disabled";
};
sdhci1: sdhci@200 {
compatible = "aspeed,ast2500-sdhci";
reg = <0x200 0x100>;
interrupts = <26>;
sdhci,auto-cmd12;
clocks = <&syscon ASPEED_CLK_SDIO>;
status = "disabled";
};
};
gpio: gpio@1e780000 {
#gpio-cells = <2>;
gpio-controller;
compatible = "aspeed,ast2500-gpio";
reg = <0x1e780000 0x1000>;
interrupts = <20>;
gpio-ranges = <&pinctrl 0 0 220>;
gpio-ranges = <&pinctrl 0 0 232>;
clocks = <&syscon ASPEED_CLK_APB>;
interrupt-controller;
#interrupt-cells = <2>;
......@@ -1346,6 +1374,11 @@ pinctrl_sda2_default: sda2_default {
groups = "SDA2";
};
pinctrl_sgpm_default: sgpm_default {
function = "SGPM";
groups = "SGPM";
};
pinctrl_sgps1_default: sgps1_default {
function = "SGPS1";
groups = "SGPS1";
......
......@@ -14,11 +14,6 @@ / {
"atmel,at91sam9x5", "atmel,at91sam9";
aliases {
serial0 = &dbgu;
serial1 = &usart0;
serial2 = &usart1;
serial3 = &usart2;
serial4 = &usart3;
serial5 = &uart0;
serial6 = &uart1;
};
......@@ -42,132 +37,6 @@ main_xtal {
};
};
ahb {
apb {
mmc0: mmc@f0008000 {
/* N.B. Aria has no SD card detect (CD), assumed present */
pinctrl-0 = <
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
tcb0: timer@f8008000 {
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
i2c0: i2c@f8010000 {
status = "okay";
};
i2c1: i2c@f8014000 {
status = "okay";
};
/* TWD2+TCLK2 hidden behind ethernet, so no i2c2 */
usart0: serial@f801c000 {
pinctrl-0 = <&pinctrl_usart0
&pinctrl_usart0_rts
&pinctrl_usart0_cts>;
status = "okay";
};
usart1: serial@f8020000 {
pinctrl-0 = <&pinctrl_usart1
/* &pinctrl_usart1_rts */
/* &pinctrl_usart1_cts */
>;
status = "okay";
};
usart2: serial@f8024000 {
/* cannot activate RTS2+CTS2, clash with
* ethernet on PB0 and PB1 */
pinctrl-0 = <&pinctrl_usart2>;
status = "okay";
};
usart3: serial@f8028000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8028000 0x200>;
interrupts = <8 4 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3
/* &pinctrl_usart3_rts */
/* &pinctrl_usart3_cts */
>;
status = "okay";
};
macb0: ethernet@f802c000 {
phy-mode = "rmii";
/*
* following can be overwritten by bootloader:
* for example u-boot 'ftd set' command
*/
local-mac-address = [00 00 00 00 00 00];
status = "okay";
};
/*
* UART0/1 pins are marked as GPIO on
* Aria documentation.
* Change to "okay" if you need additional serial ports
*/
uart0: serial@f8040000 {
status = "disabled";
};
uart1: serial@f8044000 {
status = "disabled";
};
adc0: adc@f804c000 {
status = "okay";
atmel,adc-channels-used = <0xf>;
};
dbgu: serial@fffff200 {
status = "okay";
};
pinctrl@fffff400 {
w1_0 {
pinctrl_w1_0: w1_0-0 {
atmel,pins = <0 21 0x0 0x1>; /* PA21 PIO, pull-up */
};
};
};
rtc@fffffeb0 {
status = "okay";
};
};
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
};
usb1: ehci@700000 {
status = "okay";
};
};
leds {
compatible = "gpio-leds";
......@@ -187,3 +56,127 @@ onewire {
pinctrl-0 = <&pinctrl_w1_0>;
};
};
&adc0 {
status = "okay";
atmel,adc-channels-used = <0xf>;
};
&dbgu {
status = "okay";
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
/* TWD2+TCLK2 hidden behind ethernet, so no i2c2 */
&macb0 {
phy-mode = "rmii";
/*
* following can be overwritten by bootloader:
* for example u-boot 'ftd set' command
*/
local-mac-address = [00 00 00 00 00 00];
status = "okay";
};
&mmc0 {
/* N.B. Aria has no SD card detect (CD), assumed present */
pinctrl-0 = <
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
&pinctrl {
w1_0 {
pinctrl_w1_0: w1_0-0 {
atmel,pins = <0 21 0x0 0x1>; /* PA21 PIO, pull-up */
};
};
};
&rtc {
status = "okay";
};
&tcb0 {
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
/*
* UART0/1 pins are marked as GPIO on
* Aria documentation.
* Change to "okay" if you need additional serial ports
*/
&uart0 {
status = "disabled";
};
&uart1 {
status = "disabled";
};
&usart0 {
pinctrl-0 = <&pinctrl_usart0
&pinctrl_usart0_rts
&pinctrl_usart0_cts>;
status = "okay";
};
&usart1 {
pinctrl-0 = <&pinctrl_usart1
/* &pinctrl_usart1_rts */
/* &pinctrl_usart1_cts */
>;
status = "okay";
};
&usart2 {
/* cannot activate RTS2+CTS2, clash with
* ethernet on PB0 and PB1 */
pinctrl-0 = <&pinctrl_usart2>;
status = "okay";
};
&usart3 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8028000 0x200>;
interrupts = <8 4 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3
/* &pinctrl_usart3_rts */
/* &pinctrl_usart3_cts */
>;
status = "okay";
};
&usb0 {
status = "okay";
num-ports = <3>;
};
&usb1 {
status = "okay";
};
......@@ -6,14 +6,11 @@
*/
/dts-v1/;
#include "at91sam9g25.dtsi"
/ {
model = "Acme Systems Arietta G25";
compatible = "acme,ariettag25", "atmel,at91sam9x5", "atmel,at91sam9";
aliases {
serial0 = &dbgu;
};
chosen {
stdout-path = "serial0:115200n8";
};
......@@ -32,57 +29,9 @@ main_xtal {
};
};
ahb {
apb {
mmc0: mmc@f0008000 {
pinctrl-0 = <
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
tcb0: timer@f8008000 {
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
usb2: gadget@f803c000 {
status = "okay";
};
dbgu: serial@fffff200 {
status = "okay";
};
rtc@fffffeb0 {
status = "okay";
};
};
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
};
usb1: ehci@700000 {
status = "okay";
};
};
leds {
compatible = "gpio-leds";
arietta_led {
label = "arietta_led";
gpios = <&pioB 8 GPIO_ACTIVE_HIGH>; /* PB8 */
......@@ -90,3 +39,48 @@ arietta_led {
};
};
};
&dbgu {
status = "okay";
};
&mmc0 {
pinctrl-0 = <
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
&rtc {
status = "okay";
};
&tcb0 {
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
&usb0 {
num-ports = <3>;
status = "okay";
};
&usb1 {
status = "okay";
};
&usb2 {
status = "okay";
};
......@@ -33,122 +33,119 @@ main_xtal {
clock-frequency = <12000000>;
};
};
};
ahb {
apb {
tcb0: timer@f8008000 {
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
&adc0 {
atmel,adc-ts-wires = <4>;
atmel,adc-ts-pressure-threshold = <10000>;
status = "okay";
};
&dbgu {
status = "okay";
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
&ebi {
pinctrl-0 = <&pinctrl_ebi_addr_nand
&pinctrl_ebi_data_0_7>;
pinctrl-names = "default";
status = "okay";
nand-controller {
pinctrl-0 = <&pinctrl_nand_oe_we
&pinctrl_nand_cs
&pinctrl_nand_rb>;
pinctrl-names = "default";
status = "okay";
nand@3 {
reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
label = "atmel_nand";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x40000>;
};
};
mmc0: mmc@f0008000 {
pinctrl-0 = <
&pinctrl_board_mmc0
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
uboot@40000 {
label = "u-boot";
reg = <0x40000 0x80000>;
};
};
dbgu: serial@fffff200 {
status = "okay";
};
ubootenv@c0000 {
label = "U-Boot Env";
reg = <0xc0000 0x140000>;
};
usart0: serial@f801c000 {
status = "okay";
};
kernel@200000 {
label = "kernel";
reg = <0x200000 0x600000>;
};
i2c0: i2c@f8010000 {
status = "okay";
rootfs@800000 {
label = "rootfs";
reg = <0x800000 0x0f800000>;
};
};
};
};
};
adc0: adc@f804c000 {
atmel,adc-ts-wires = <4>;
atmel,adc-ts-pressure-threshold = <10000>;
status = "okay";
};
&i2c0 {
status = "okay";
};
pinctrl@fffff400 {
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
};
};
};
&mmc0 {
pinctrl-0 = <
&pinctrl_board_mmc0
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
};
};
watchdog@fffffe40 {
status = "okay";
};
&pinctrl {
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
};
};
};
ebi: ebi@10000000 {
pinctrl-0 = <&pinctrl_ebi_addr_nand
&pinctrl_ebi_data_0_7>;
pinctrl-names = "default";
status = "okay";
nand_controller: nand-controller {
status = "okay";
pinctrl-0 = <&pinctrl_nand_oe_we
&pinctrl_nand_cs
&pinctrl_nand_rb>;
pinctrl-names = "default";
nand@3 {
reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
label = "atmel_nand";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x40000>;
};
uboot@40000 {
label = "u-boot";
reg = <0x40000 0x80000>;
};
ubootenv@c0000 {
label = "U-Boot Env";
reg = <0xc0000 0x140000>;
};
kernel@200000 {
label = "kernel";
reg = <0x200000 0x600000>;
};
rootfs@800000 {
label = "rootfs";
reg = <0x800000 0x0f800000>;
};
};
};
};
};
&tcb0 {
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
&usart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
......@@ -17,61 +17,58 @@
/ {
model = "HCE Cosino Mega 2560";
compatible = "hce,cosino_mega2560", "atmel,at91sam9x5", "atmel,at91sam9";
};
&adc0 {
atmel,adc-ts-wires = <4>;
atmel,adc-ts-pressure-threshold = <10000>;
status = "okay";
};
ahb {
apb {
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
&macb0 {
phy-mode = "rmii";
status = "okay";
};
adc0: adc@f804c000 {
atmel,adc-ts-wires = <4>;
atmel,adc-ts-pressure-threshold = <10000>;
status = "okay";
};
&mmc1 {
pinctrl-0 = <
&pinctrl_mmc1_slot0_clk_cmd_dat0
&pinctrl_mmc1_slot0_dat1_3>;
status = "okay";
rtc@fffffeb0 {
status = "okay";
};
slot@0 {
reg = <0>;
bus-width = <4>;
non-removable;
};
};
usart1: serial@f8020000 {
status = "okay";
};
&rtc {
status = "okay";
};
usart2: serial@f8024000 {
status = "okay";
};
&usart1 {
status = "okay";
};
usb2: gadget@f803c000 {
atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&usart2 {
status = "okay";
};
mmc1: mmc@f000c000 {
pinctrl-0 = <
&pinctrl_mmc1_slot0_clk_cmd_dat0
&pinctrl_mmc1_slot0_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
non-removable;
};
};
};
&usb0 {
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW */
&pioD 19 GPIO_ACTIVE_LOW
&pioD 20 GPIO_ACTIVE_LOW
>;
status = "okay";
};
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW */
&pioD 19 GPIO_ACTIVE_LOW
&pioD 20 GPIO_ACTIVE_LOW
>;
};
&usb1 {
status = "okay";
};
usb1: ehci@700000 {
status = "okay";
};
};
&usb2 {
atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
status = "okay";
};
......@@ -32,96 +32,6 @@ main_xtal {
};
ahb {
apb {
tcb0: timer@f8008000 {
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
usart0: serial@f801c000 {
status = "okay";
};
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
pwm0: pwm@f8034000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_pwm0_1
&pinctrl_pwm0_pwm1_1>;
status = "okay";
};
dbgu: serial@fffff200 {
status = "okay";
};
watchdog@fffffe40 {
status = "okay";
};
};
usb0: ohci@600000 {
num-ports = <1>;
status = "okay";
};
usb1: ehci@700000 {
status = "okay";
};
ebi: ebi@10000000 {
pinctrl-0 = <&pinctrl_ebi_addr_nand
&pinctrl_ebi_data_0_7>;
pinctrl-names = "default";
status = "okay";
nand_controller: nand-controller {
status = "okay";
pinctrl-0 = <&pinctrl_nand_oe_we
&pinctrl_nand_cs
&pinctrl_nand_rb>;
pinctrl-names = "default";
nand@3 {
reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
label = "atmel_nand";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
bootstrap@0 {
label = "bootstrap";
reg = <0x0 0x20000>;
};
ubi@20000 {
label = "ubi";
reg = <0x20000 0x7fe0000>;
};
};
};
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "hw";
......@@ -130,7 +40,6 @@ nand0: nand@40000000 {
atmel,pmecc-sector-size = <512>;
nand-on-flash-bbt;
status = "okay";
};
};
......@@ -172,3 +81,91 @@ red {
};
};
};
&dbgu {
status = "okay";
};
&ebi {
pinctrl-0 = <&pinctrl_ebi_addr_nand
&pinctrl_ebi_data_0_7>;
pinctrl-names = "default";
status = "okay";
nand-controller {
pinctrl-0 = <&pinctrl_nand_oe_we
&pinctrl_nand_cs
&pinctrl_nand_rb>;
pinctrl-names = "default";
status = "okay";
nand@3 {
reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
label = "atmel_nand";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
bootstrap@0 {
label = "bootstrap";
reg = <0x0 0x20000>;
};
ubi@20000 {
label = "ubi";
reg = <0x20000 0x7fe0000>;
};
};
};
};
};
&macb0 {
phy-mode = "rmii";
status = "okay";
};
&pwm0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_pwm0_1
&pinctrl_pwm0_pwm1_1>;
status = "okay";
};
&tcb0 {
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
&usart0 {
status = "okay";
};
&usb0 {
num-ports = <1>;
status = "okay";
};
&usb1 {
status = "okay";
};
&watchdog {
status = "okay";
};
......@@ -40,7 +40,7 @@ fb0: fb@600000 {
atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
status = "okay";
display0: display {
display0: panel {
bits-per-pixel = <16>;
atmel,lcdcon-backlight;
atmel,dmacon = <0x1>;
......
......@@ -110,7 +110,7 @@ fb0: fb@700000 {
display = <&display0>;
status = "okay";
display0: display {
display0: panel {
bits-per-pixel = <16>;
atmel,lcdcon-backlight;
atmel,dmacon = <0x1>;
......
......@@ -11,22 +11,18 @@
/ {
model = "Atmel AT91SAM9G15 SoC";
compatible = "atmel,at91sam9g15", "atmel,at91sam9x5";
};
ahb {
apb {
pinctrl@fffff400 {
atmel,mux-mask = <
/* A B C */
0xffffffff 0xffe0399f 0x00000000 /* pioA */
0x00040000 0x00047e3f 0x00000000 /* pioB */
0xfdffffff 0x00000000 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
&pinctrl {
atmel,mux-mask = <
/* A B C */
0xffffffff 0xffe0399f 0x00000000 /* pioA */
0x00040000 0x00047e3f 0x00000000 /* pioB */
0xfdffffff 0x00000000 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9g15-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
};
&pmc {
compatible = "atmel,at91sam9g15-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
......@@ -14,14 +14,6 @@ / {
model = "Atmel AT91SAM9G15-EK";
compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
ahb {
apb {
hlcdc: hlcdc@f8038000 {
status = "okay";
};
};
};
backlight: backlight {
status = "okay";
};
......@@ -38,3 +30,7 @@ panel_reg: panel_regulator {
status = "okay";
};
};
&hlcdc {
status = "okay";
};
......@@ -12,57 +12,54 @@
/ {
model = "Atmel AT91SAM9G25-EK";
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
};
ahb {
apb {
spi0: spi@f0000000 {
status = "disabled";
};
mmc1: mmc@f000c000 {
status = "disabled";
};
i2c0: i2c@f8010000 {
ov2640: camera@30 {
compatible = "ovti,ov2640";
reg = <0x30>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>;
clocks = <&pmc PMC_TYPE_SYSTEM 8>;
clock-names = "xvclk";
assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>;
assigned-clock-rates = <25000000>;
status = "okay";
&i2c0 {
camera@30 {
compatible = "ovti,ov2640";
reg = <0x30>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>;
clocks = <&pmc PMC_TYPE_SYSTEM 8>;
clock-names = "xvclk";
assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>;
assigned-clock-rates = <25000000>;
status = "okay";
port {
ov2640_0: endpoint {
remote-endpoint = <&isi_0>;
bus-width = <8>;
};
};
};
port {
ov2640_0: endpoint {
remote-endpoint = <&isi_0>;
bus-width = <8>;
};
};
};
};
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
&isi {
status = "okay";
isi: isi@f8048000 {
status = "okay";
port {
isi_0: endpoint@0 {
reg = <0>;
remote-endpoint = <&ov2640_0>;
bus-width = <8>;
vsync-active = <1>;
hsync-active = <1>;
};
};
};
port {
isi_0: endpoint@0 {
reg = <0>;
remote-endpoint = <&ov2640_0>;
bus-width = <8>;
vsync-active = <1>;
hsync-active = <1>;
};
};
};
&macb0 {
phy-mode = "rmii";
status = "okay";
};
&mmc1 {
status = "disabled";
};
&spi0 {
status = "disabled";
};
......@@ -14,19 +14,6 @@ / {
model = "Atmel AT91SAM9G35-EK";
compatible = "atmel,at91sam9g35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
ahb {
apb {
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
hlcdc: hlcdc@f8038000 {
status = "okay";
};
};
};
backlight: backlight {
status = "okay";
};
......@@ -43,3 +30,12 @@ panel_reg: panel_regulator {
status = "okay";
};
};
&hlcdc {
status = "okay";
};
&macb0 {
phy-mode = "rmii";
status = "okay";
};
......@@ -235,7 +235,7 @@ fb0: fb@500000 {
display = <&display0>;
status = "okay";
display0: display {
display0: panel {
bits-per-pixel = <32>;
atmel,lcdcon-backlight;
atmel,dmacon = <0x1>;
......
......@@ -36,7 +36,7 @@ fb0: fb@500000 {
display = <&display0>;
status = "okay";
display0: display {
display0: panel {
bits-per-pixel = <16>;
atmel,lcdcon-backlight;
atmel,dmacon = <0x1>;
......
......@@ -12,28 +12,24 @@
/ {
model = "Atmel AT91SAM9X25-EK";
compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
};
ahb {
apb {
can1: can@f8004000 {
status = "okay";
};
&can1 {
status = "okay";
};
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
&macb0 {
phy-mode = "rmii";
status = "okay";
};
macb1: ethernet@f8030000 {
phy-mode = "rmii";
status = "okay";
};
&macb1 {
phy-mode = "rmii";
status = "okay";
};
pwm0: pwm@f8034000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_pwm0_1>;
status = "okay";
};
};
};
&pwm0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_pwm0_1>;
status = "okay";
};
......@@ -13,32 +13,29 @@
/ {
model = "Atmel AT91SAM9X35-EK";
compatible = "atmel,at91sam9x35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
};
ahb {
apb {
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
hlcdc: hlcdc@f8038000 {
status = "okay";
};
};
};
&backlight {
status = "okay";
};
backlight: backlight {
status = "okay";
};
&bl_reg {
status = "okay";
};
bl_reg: backlight_regulator {
status = "okay";
};
&hlcdc {
status = "okay";
};
panel: panel {
status = "okay";
};
&macb0 {
phy-mode = "rmii";
status = "okay";
};
&panel {
status = "okay";
};
panel_reg: panel_regulator {
status = "okay";
};
&panel_reg {
status = "okay";
};
......@@ -941,7 +941,7 @@ watchdog: watchdog@fffffe40 {
status = "disabled";
};
rtc@fffffeb0 {
rtc: rtc@fffffeb0 {
compatible = "atmel,at91sam9x5-rtc";
reg = <0xfffffeb0 0x40>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
......
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