Commit cf0bb91b authored by Catalin Marinas's avatar Catalin Marinas Committed by Russell King

ARM: 6192/1: VExpress: Align the machine_desc.phys_io to 1MB section

When not aligned, random bits could be written in the initial page table
by the __create_page_tables() function.
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent ad642d9f
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
#include <linux/amba/clcd.h> #include <linux/amba/clcd.h>
#include <asm/clkdev.h> #include <asm/clkdev.h>
#include <asm/pgtable.h>
#include <asm/hardware/arm_timer.h> #include <asm/hardware/arm_timer.h>
#include <asm/hardware/cache-l2x0.h> #include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h> #include <asm/hardware/gic.h>
...@@ -236,7 +237,7 @@ static void ct_ca9x4_init(void) ...@@ -236,7 +237,7 @@ static void ct_ca9x4_init(void)
} }
MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4") MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4")
.phys_io = V2M_UART0, .phys_io = V2M_UART0 & SECTION_MASK,
.io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc, .io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100, .boot_params = PHYS_OFFSET + 0x00000100,
.map_io = ct_ca9x4_map_io, .map_io = ct_ca9x4_map_io,
......
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