Commit cffcc92e authored by Baruch Siach's avatar Baruch Siach Committed by Linus Walleij

gpio: xtensa: fix build when XCHAL_HAVE_CP is 0

In xtensa coprocessors may exist without coprocessor context, i.e. they cannot
be disabled/enabled. In this case the RSR_CPENABLE/WSR_CPENABLE are undefined,
thus breaking the build. Fix the build by adding dummy versions of
enable_cp/disable_cp in this case.
Reported-by: default avatarFengguang Wu <fengguang.wu@intel.com>
Signed-off-by: default avatarBaruch Siach <baruch@tkos.co.il>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 38dbfb59
......@@ -40,6 +40,8 @@
#error GPIO32 option is not enabled for your xtensa core variant
#endif
#if XCHAL_HAVE_CP
static inline unsigned long enable_cp(unsigned long *cpenable)
{
unsigned long flags;
......@@ -57,6 +59,20 @@ static inline void disable_cp(unsigned long flags, unsigned long cpenable)
local_irq_restore(flags);
}
#else
static inline unsigned long enable_cp(unsigned long *cpenable)
{
*cpenable = 0; /* avoid uninitialized value warning */
return 0;
}
static inline void disable_cp(unsigned long flags, unsigned long cpenable)
{
}
#endif /* XCHAL_HAVE_CP */
static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset)
{
return 1; /* input only */
......
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