Commit d09ae92d authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amdgpu: Move out power up/down sdma out of smu

smu only expose interface to other ip blocks.
in order to reduce dependence between smu and other ip blocks
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 40bea02f
...@@ -1364,6 +1364,9 @@ static int sdma_v4_0_hw_init(void *handle) ...@@ -1364,6 +1364,9 @@ static int sdma_v4_0_hw_init(void *handle)
int r; int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false);
sdma_v4_0_init_golden_registers(adev); sdma_v4_0_init_golden_registers(adev);
r = sdma_v4_0_start(adev); r = sdma_v4_0_start(adev);
...@@ -1381,6 +1384,9 @@ static int sdma_v4_0_hw_fini(void *handle) ...@@ -1381,6 +1384,9 @@ static int sdma_v4_0_hw_fini(void *handle)
sdma_v4_0_ctx_switch_enable(adev, false); sdma_v4_0_ctx_switch_enable(adev, false);
sdma_v4_0_enable(adev, false); sdma_v4_0_enable(adev, false);
if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true);
return 0; return 0;
} }
......
...@@ -1216,6 +1216,7 @@ static const struct pp_hwmgr_func smu10_hwmgr_funcs = { ...@@ -1216,6 +1216,7 @@ static const struct pp_hwmgr_func smu10_hwmgr_funcs = {
.smus_notify_pwe = smu10_smus_notify_pwe, .smus_notify_pwe = smu10_smus_notify_pwe,
.display_clock_voltage_request = smu10_display_clock_voltage_request, .display_clock_voltage_request = smu10_display_clock_voltage_request,
.powergate_gfx = smu10_gfx_off_control, .powergate_gfx = smu10_gfx_off_control,
.powergate_sdma = smu10_powergate_sdma,
}; };
int smu10_init_function_pointers(struct pp_hwmgr *hwmgr) int smu10_init_function_pointers(struct pp_hwmgr *hwmgr)
......
...@@ -186,19 +186,6 @@ static int smu10_verify_smc_interface(struct pp_hwmgr *hwmgr) ...@@ -186,19 +186,6 @@ static int smu10_verify_smc_interface(struct pp_hwmgr *hwmgr)
return 0; return 0;
} }
/* sdma is disabled by default in vbios, need to re-enable in driver */
static void smu10_smc_enable_sdma(struct pp_hwmgr *hwmgr)
{
smu10_send_msg_to_smc(hwmgr,
PPSMC_MSG_PowerUpSdma);
}
static void smu10_smc_disable_sdma(struct pp_hwmgr *hwmgr)
{
smu10_send_msg_to_smc(hwmgr,
PPSMC_MSG_PowerDownSdma);
}
/* vcn is disabled by default in vbios, need to re-enable in driver */ /* vcn is disabled by default in vbios, need to re-enable in driver */
static void smu10_smc_enable_vcn(struct pp_hwmgr *hwmgr) static void smu10_smc_enable_vcn(struct pp_hwmgr *hwmgr)
{ {
...@@ -218,7 +205,6 @@ static int smu10_smu_fini(struct pp_hwmgr *hwmgr) ...@@ -218,7 +205,6 @@ static int smu10_smu_fini(struct pp_hwmgr *hwmgr)
(struct smu10_smumgr *)(hwmgr->smu_backend); (struct smu10_smumgr *)(hwmgr->smu_backend);
if (priv) { if (priv) {
smu10_smc_disable_sdma(hwmgr);
smu10_smc_disable_vcn(hwmgr); smu10_smc_disable_vcn(hwmgr);
amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_WMTABLE].handle, amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_WMTABLE].handle,
&priv->smu_tables.entry[SMU10_WMTABLE].mc_addr, &priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,
...@@ -243,7 +229,6 @@ static int smu10_start_smu(struct pp_hwmgr *hwmgr) ...@@ -243,7 +229,6 @@ static int smu10_start_smu(struct pp_hwmgr *hwmgr)
if (smu10_verify_smc_interface(hwmgr)) if (smu10_verify_smc_interface(hwmgr))
return -EINVAL; return -EINVAL;
smu10_smc_enable_sdma(hwmgr);
smu10_smc_enable_vcn(hwmgr); smu10_smc_enable_vcn(hwmgr);
return 0; return 0;
} }
......
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