Commit d199356a authored by Jagan Teki's avatar Jagan Teki Committed by Shawn Guo

ARM: dts: imx6ul-[geam|isiot]: Add sai2 node

Add Synchronous Audio Interface(SAI) node for Engicam GEAM6UL
and Is.IoT MX6UL variant module boards.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: default avatarJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 35d38f30
...@@ -172,6 +172,12 @@ &tsc { ...@@ -172,6 +172,12 @@ &tsc {
xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
}; };
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
status = "okay";
};
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
...@@ -328,6 +334,16 @@ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 ...@@ -328,6 +334,16 @@ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
>; >;
}; };
pinctrl_sai2: sai2grp {
fsl,pins = <
MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0
MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x4001b031
MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0
>;
};
pinctrl_uart1: uart1grp { pinctrl_uart1: uart1grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
......
...@@ -91,6 +91,12 @@ &pwm8 { ...@@ -91,6 +91,12 @@ &pwm8 {
status = "okay"; status = "okay";
}; };
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
status = "okay";
};
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
...@@ -129,6 +135,16 @@ MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0 ...@@ -129,6 +135,16 @@ MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0
>; >;
}; };
pinctrl_sai2: sai2grp {
fsl,pins = <
MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0
MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x4001b031
MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0
>;
};
pinctrl_uart1: uart1grp { pinctrl_uart1: uart1grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
......
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