Commit d275545e authored by Maxime Ripard's avatar Maxime Ripard Committed by Wolfram Sang

ARM: sunxi: dt: Convert to the new i2c compatibles

Switch the device tree to the new compatibles introduced in the i2c drivers
to have a common pattern accross all Allwinner SoCs.
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent a0682a31
...@@ -641,7 +641,7 @@ uart7: serial@01c29c00 { ...@@ -641,7 +641,7 @@ uart7: serial@01c29c00 {
}; };
i2c0: i2c@01c2ac00 { i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>; reg = <0x01c2ac00 0x400>;
interrupts = <7>; interrupts = <7>;
clocks = <&apb1_gates 0>; clocks = <&apb1_gates 0>;
...@@ -650,7 +650,7 @@ i2c0: i2c@01c2ac00 { ...@@ -650,7 +650,7 @@ i2c0: i2c@01c2ac00 {
}; };
i2c1: i2c@01c2b000 { i2c1: i2c@01c2b000 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>; reg = <0x01c2b000 0x400>;
interrupts = <8>; interrupts = <8>;
clocks = <&apb1_gates 1>; clocks = <&apb1_gates 1>;
...@@ -659,7 +659,7 @@ i2c1: i2c@01c2b000 { ...@@ -659,7 +659,7 @@ i2c1: i2c@01c2b000 {
}; };
i2c2: i2c@01c2b400 { i2c2: i2c@01c2b400 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>; reg = <0x01c2b400 0x400>;
interrupts = <9>; interrupts = <9>;
clocks = <&apb1_gates 2>; clocks = <&apb1_gates 2>;
......
...@@ -519,7 +519,7 @@ uart3: serial@01c28c00 { ...@@ -519,7 +519,7 @@ uart3: serial@01c28c00 {
i2c0: i2c@01c2ac00 { i2c0: i2c@01c2ac00 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>; reg = <0x01c2ac00 0x400>;
interrupts = <7>; interrupts = <7>;
clocks = <&apb1_gates 0>; clocks = <&apb1_gates 0>;
...@@ -530,7 +530,7 @@ i2c0: i2c@01c2ac00 { ...@@ -530,7 +530,7 @@ i2c0: i2c@01c2ac00 {
i2c1: i2c@01c2b000 { i2c1: i2c@01c2b000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>; reg = <0x01c2b000 0x400>;
interrupts = <8>; interrupts = <8>;
clocks = <&apb1_gates 1>; clocks = <&apb1_gates 1>;
...@@ -541,7 +541,7 @@ i2c1: i2c@01c2b000 { ...@@ -541,7 +541,7 @@ i2c1: i2c@01c2b000 {
i2c2: i2c@01c2b400 { i2c2: i2c@01c2b400 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>; reg = <0x01c2b400 0x400>;
interrupts = <9>; interrupts = <9>;
clocks = <&apb1_gates 2>; clocks = <&apb1_gates 2>;
......
...@@ -461,7 +461,7 @@ uart3: serial@01c28c00 { ...@@ -461,7 +461,7 @@ uart3: serial@01c28c00 {
}; };
i2c0: i2c@01c2ac00 { i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>; reg = <0x01c2ac00 0x400>;
interrupts = <7>; interrupts = <7>;
clocks = <&apb1_gates 0>; clocks = <&apb1_gates 0>;
...@@ -470,7 +470,7 @@ i2c0: i2c@01c2ac00 { ...@@ -470,7 +470,7 @@ i2c0: i2c@01c2ac00 {
}; };
i2c1: i2c@01c2b000 { i2c1: i2c@01c2b000 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>; reg = <0x01c2b000 0x400>;
interrupts = <8>; interrupts = <8>;
clocks = <&apb1_gates 1>; clocks = <&apb1_gates 1>;
...@@ -479,7 +479,7 @@ i2c1: i2c@01c2b000 { ...@@ -479,7 +479,7 @@ i2c1: i2c@01c2b000 {
}; };
i2c2: i2c@01c2b400 { i2c2: i2c@01c2b400 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>; reg = <0x01c2b400 0x400>;
interrupts = <9>; interrupts = <9>;
clocks = <&apb1_gates 2>; clocks = <&apb1_gates 2>;
......
...@@ -778,7 +778,7 @@ uart7: serial@01c29c00 { ...@@ -778,7 +778,7 @@ uart7: serial@01c29c00 {
}; };
i2c0: i2c@01c2ac00 { i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>; reg = <0x01c2ac00 0x400>;
interrupts = <0 7 4>; interrupts = <0 7 4>;
clocks = <&apb1_gates 0>; clocks = <&apb1_gates 0>;
...@@ -787,7 +787,7 @@ i2c0: i2c@01c2ac00 { ...@@ -787,7 +787,7 @@ i2c0: i2c@01c2ac00 {
}; };
i2c1: i2c@01c2b000 { i2c1: i2c@01c2b000 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>; reg = <0x01c2b000 0x400>;
interrupts = <0 8 4>; interrupts = <0 8 4>;
clocks = <&apb1_gates 1>; clocks = <&apb1_gates 1>;
...@@ -796,7 +796,7 @@ i2c1: i2c@01c2b000 { ...@@ -796,7 +796,7 @@ i2c1: i2c@01c2b000 {
}; };
i2c2: i2c@01c2b400 { i2c2: i2c@01c2b400 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>; reg = <0x01c2b400 0x400>;
interrupts = <0 9 4>; interrupts = <0 9 4>;
clocks = <&apb1_gates 2>; clocks = <&apb1_gates 2>;
...@@ -805,7 +805,7 @@ i2c2: i2c@01c2b400 { ...@@ -805,7 +805,7 @@ i2c2: i2c@01c2b400 {
}; };
i2c3: i2c@01c2b800 { i2c3: i2c@01c2b800 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2b800 0x400>; reg = <0x01c2b800 0x400>;
interrupts = <0 88 4>; interrupts = <0 88 4>;
clocks = <&apb1_gates 3>; clocks = <&apb1_gates 3>;
...@@ -814,7 +814,7 @@ i2c3: i2c@01c2b800 { ...@@ -814,7 +814,7 @@ i2c3: i2c@01c2b800 {
}; };
i2c4: i2c@01c2c000 { i2c4: i2c@01c2c000 {
compatible = "allwinner,sun4i-i2c"; compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
reg = <0x01c2c000 0x400>; reg = <0x01c2c000 0x400>;
interrupts = <0 89 4>; interrupts = <0 89 4>;
clocks = <&apb1_gates 15>; clocks = <&apb1_gates 15>;
......
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