Commit d2a31dbd authored by Nick Hoath's avatar Nick Hoath Committed by Daniel Vetter

drm/i915/bxt: Enable WaDisableDgMirrorFixInHalfSliceChicken5 for Broxton

Signed-off-by: default avatarNick Hoath <nicholas.hoath@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent a119a6e6
...@@ -927,9 +927,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) ...@@ -927,9 +927,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3, WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC); GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC);
if (INTEL_REVID(dev) == SKL_REVID_A0 || if ((IS_SKYLAKE(dev) && (INTEL_REVID(dev) == SKL_REVID_A0 ||
INTEL_REVID(dev) == SKL_REVID_B0) { INTEL_REVID(dev) == SKL_REVID_B0)) ||
/* WaDisableDgMirrorFixInHalfSliceChicken5:skl */ (IS_BROXTON(dev) && INTEL_REVID(dev) < BXT_REVID_B0)) {
/* WaDisableDgMirrorFixInHalfSliceChicken5:skl,bxt */
WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5, WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,
GEN9_DG_MIRROR_FIX_ENABLE); GEN9_DG_MIRROR_FIX_ENABLE);
} }
......
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