Commit d342b95d authored by Rafał Miłecki's avatar Rafał Miłecki Committed by John W. Linville

b43: don't duplicate common PHY read/write ops

Most of the PHYs use the same way of accessing registers, so move that
code to the shared place. An exception is G-PHY which sometimes access
A-PHY regs and requires special handling.
Signed-off-by: default avatarRafał Miłecki <zajec5@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 6247d2aa
...@@ -274,7 +274,12 @@ u16 b43_phy_read(struct b43_wldev *dev, u16 reg) ...@@ -274,7 +274,12 @@ u16 b43_phy_read(struct b43_wldev *dev, u16 reg)
{ {
assert_mac_suspended(dev); assert_mac_suspended(dev);
dev->phy.writes_counter = 0; dev->phy.writes_counter = 0;
return dev->phy.ops->phy_read(dev, reg);
if (dev->phy.ops->phy_read)
return dev->phy.ops->phy_read(dev, reg);
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
return b43_read16(dev, B43_MMIO_PHY_DATA);
} }
void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value) void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value)
...@@ -285,7 +290,12 @@ void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value) ...@@ -285,7 +290,12 @@ void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value)
b43_read16(dev, B43_MMIO_PHY_VER); b43_read16(dev, B43_MMIO_PHY_VER);
dev->phy.writes_counter = 1; dev->phy.writes_counter = 1;
} }
dev->phy.ops->phy_write(dev, reg, value);
if (dev->phy.ops->phy_write)
return dev->phy.ops->phy_write(dev, reg, value);
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
b43_write16(dev, B43_MMIO_PHY_DATA, value);
} }
void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg) void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg)
......
...@@ -1071,18 +1071,6 @@ static unsigned int b43_phy_ht_op_get_default_chan(struct b43_wldev *dev) ...@@ -1071,18 +1071,6 @@ static unsigned int b43_phy_ht_op_get_default_chan(struct b43_wldev *dev)
* R/W ops. * R/W ops.
**************************************************/ **************************************************/
static u16 b43_phy_ht_op_read(struct b43_wldev *dev, u16 reg)
{
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
return b43_read16(dev, B43_MMIO_PHY_DATA);
}
static void b43_phy_ht_op_write(struct b43_wldev *dev, u16 reg, u16 value)
{
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
b43_write16(dev, B43_MMIO_PHY_DATA, value);
}
static void b43_phy_ht_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask, static void b43_phy_ht_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
u16 set) u16 set)
{ {
...@@ -1126,8 +1114,6 @@ const struct b43_phy_operations b43_phyops_ht = { ...@@ -1126,8 +1114,6 @@ const struct b43_phy_operations b43_phyops_ht = {
.free = b43_phy_ht_op_free, .free = b43_phy_ht_op_free,
.prepare_structs = b43_phy_ht_op_prepare_structs, .prepare_structs = b43_phy_ht_op_prepare_structs,
.init = b43_phy_ht_op_init, .init = b43_phy_ht_op_init,
.phy_read = b43_phy_ht_op_read,
.phy_write = b43_phy_ht_op_write,
.phy_maskset = b43_phy_ht_op_maskset, .phy_maskset = b43_phy_ht_op_maskset,
.radio_read = b43_phy_ht_op_radio_read, .radio_read = b43_phy_ht_op_radio_read,
.radio_write = b43_phy_ht_op_radio_write, .radio_write = b43_phy_ht_op_radio_write,
......
...@@ -810,18 +810,6 @@ static void b43_phy_lcn_op_adjust_txpower(struct b43_wldev *dev) ...@@ -810,18 +810,6 @@ static void b43_phy_lcn_op_adjust_txpower(struct b43_wldev *dev)
* R/W ops. * R/W ops.
**************************************************/ **************************************************/
static u16 b43_phy_lcn_op_read(struct b43_wldev *dev, u16 reg)
{
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
return b43_read16(dev, B43_MMIO_PHY_DATA);
}
static void b43_phy_lcn_op_write(struct b43_wldev *dev, u16 reg, u16 value)
{
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
b43_write16(dev, B43_MMIO_PHY_DATA, value);
}
static void b43_phy_lcn_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask, static void b43_phy_lcn_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
u16 set) u16 set)
{ {
...@@ -855,8 +843,6 @@ const struct b43_phy_operations b43_phyops_lcn = { ...@@ -855,8 +843,6 @@ const struct b43_phy_operations b43_phyops_lcn = {
.free = b43_phy_lcn_op_free, .free = b43_phy_lcn_op_free,
.prepare_structs = b43_phy_lcn_op_prepare_structs, .prepare_structs = b43_phy_lcn_op_prepare_structs,
.init = b43_phy_lcn_op_init, .init = b43_phy_lcn_op_init,
.phy_read = b43_phy_lcn_op_read,
.phy_write = b43_phy_lcn_op_write,
.phy_maskset = b43_phy_lcn_op_maskset, .phy_maskset = b43_phy_lcn_op_maskset,
.radio_read = b43_phy_lcn_op_radio_read, .radio_read = b43_phy_lcn_op_radio_read,
.radio_write = b43_phy_lcn_op_radio_write, .radio_write = b43_phy_lcn_op_radio_write,
......
...@@ -1985,18 +1985,6 @@ static void lpphy_calibration(struct b43_wldev *dev) ...@@ -1985,18 +1985,6 @@ static void lpphy_calibration(struct b43_wldev *dev)
b43_mac_enable(dev); b43_mac_enable(dev);
} }
static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
{
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
return b43_read16(dev, B43_MMIO_PHY_DATA);
}
static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
{
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
b43_write16(dev, B43_MMIO_PHY_DATA, value);
}
static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask, static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
u16 set) u16 set)
{ {
...@@ -2713,8 +2701,6 @@ const struct b43_phy_operations b43_phyops_lp = { ...@@ -2713,8 +2701,6 @@ const struct b43_phy_operations b43_phyops_lp = {
.free = b43_lpphy_op_free, .free = b43_lpphy_op_free,
.prepare_structs = b43_lpphy_op_prepare_structs, .prepare_structs = b43_lpphy_op_prepare_structs,
.init = b43_lpphy_op_init, .init = b43_lpphy_op_init,
.phy_read = b43_lpphy_op_read,
.phy_write = b43_lpphy_op_write,
.phy_maskset = b43_lpphy_op_maskset, .phy_maskset = b43_lpphy_op_maskset,
.radio_read = b43_lpphy_op_radio_read, .radio_read = b43_lpphy_op_radio_read,
.radio_write = b43_lpphy_op_radio_write, .radio_write = b43_lpphy_op_radio_write,
......
...@@ -6497,20 +6497,6 @@ static inline void check_phyreg(struct b43_wldev *dev, u16 offset) ...@@ -6497,20 +6497,6 @@ static inline void check_phyreg(struct b43_wldev *dev, u16 offset)
#endif /* B43_DEBUG */ #endif /* B43_DEBUG */
} }
static u16 b43_nphy_op_read(struct b43_wldev *dev, u16 reg)
{
check_phyreg(dev, reg);
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
return b43_read16(dev, B43_MMIO_PHY_DATA);
}
static void b43_nphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
{
check_phyreg(dev, reg);
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
b43_write16(dev, B43_MMIO_PHY_DATA, value);
}
static void b43_nphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask, static void b43_nphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
u16 set) u16 set)
{ {
...@@ -6653,8 +6639,6 @@ const struct b43_phy_operations b43_phyops_n = { ...@@ -6653,8 +6639,6 @@ const struct b43_phy_operations b43_phyops_n = {
.free = b43_nphy_op_free, .free = b43_nphy_op_free,
.prepare_structs = b43_nphy_op_prepare_structs, .prepare_structs = b43_nphy_op_prepare_structs,
.init = b43_nphy_op_init, .init = b43_nphy_op_init,
.phy_read = b43_nphy_op_read,
.phy_write = b43_nphy_op_write,
.phy_maskset = b43_nphy_op_maskset, .phy_maskset = b43_nphy_op_maskset,
.radio_read = b43_nphy_op_radio_read, .radio_read = b43_nphy_op_radio_read,
.radio_write = b43_nphy_op_radio_write, .radio_write = b43_nphy_op_radio_write,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment