Commit d3572532 authored by Bjorn Helgaas's avatar Bjorn Helgaas

agp/intel: Use CPU physical address, not bus address, for ioremap()

In i810_setup(), i830_setup(), and i9xx_setup(), we use the result of
pci_bus_address() as an argument to ioremap() and to compute gtt_phys_addr.
These should use pci_resource_start() instead because we want the CPU
physical address, not the bus address.

If there were an AGP device behind a host bridge that translated addresses,
e.g., a PNP0A08 device with _TRA != 0, this would fix a bug.  I'm not aware
of any of those, but they are possible.
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b5e350f9
...@@ -172,7 +172,7 @@ static void i8xx_destroy_pages(struct page *page) ...@@ -172,7 +172,7 @@ static void i8xx_destroy_pages(struct page *page)
#define I810_GTT_ORDER 4 #define I810_GTT_ORDER 4
static int i810_setup(void) static int i810_setup(void)
{ {
u32 reg_addr; phys_addr_t reg_addr;
char *gtt_table; char *gtt_table;
/* i81x does not preallocate the gtt. It's always 64kb in size. */ /* i81x does not preallocate the gtt. It's always 64kb in size. */
...@@ -181,7 +181,7 @@ static int i810_setup(void) ...@@ -181,7 +181,7 @@ static int i810_setup(void)
return -ENOMEM; return -ENOMEM;
intel_private.i81x_gtt_table = gtt_table; intel_private.i81x_gtt_table = gtt_table;
reg_addr = pci_bus_address(intel_private.pcidev, I810_MMADR_BAR); reg_addr = pci_resource_start(intel_private.pcidev, I810_MMADR_BAR);
intel_private.registers = ioremap(reg_addr, KB(64)); intel_private.registers = ioremap(reg_addr, KB(64));
if (!intel_private.registers) if (!intel_private.registers)
...@@ -782,9 +782,9 @@ EXPORT_SYMBOL(intel_enable_gtt); ...@@ -782,9 +782,9 @@ EXPORT_SYMBOL(intel_enable_gtt);
static int i830_setup(void) static int i830_setup(void)
{ {
u32 reg_addr; phys_addr_t reg_addr;
reg_addr = pci_bus_address(intel_private.pcidev, I810_MMADR_BAR); reg_addr = pci_resource_start(intel_private.pcidev, I810_MMADR_BAR);
intel_private.registers = ioremap(reg_addr, KB(64)); intel_private.registers = ioremap(reg_addr, KB(64));
if (!intel_private.registers) if (!intel_private.registers)
...@@ -1102,10 +1102,10 @@ static void i965_write_entry(dma_addr_t addr, ...@@ -1102,10 +1102,10 @@ static void i965_write_entry(dma_addr_t addr,
static int i9xx_setup(void) static int i9xx_setup(void)
{ {
u32 reg_addr; phys_addr_t reg_addr;
int size = KB(512); int size = KB(512);
reg_addr = pci_bus_address(intel_private.pcidev, I915_MMADR_BAR); reg_addr = pci_resource_start(intel_private.pcidev, I915_MMADR_BAR);
intel_private.registers = ioremap(reg_addr, size); intel_private.registers = ioremap(reg_addr, size);
if (!intel_private.registers) if (!intel_private.registers)
...@@ -1114,7 +1114,7 @@ static int i9xx_setup(void) ...@@ -1114,7 +1114,7 @@ static int i9xx_setup(void)
switch (INTEL_GTT_GEN) { switch (INTEL_GTT_GEN) {
case 3: case 3:
intel_private.gtt_phys_addr = intel_private.gtt_phys_addr =
pci_bus_address(intel_private.pcidev, I915_PTE_BAR); pci_resource_start(intel_private.pcidev, I915_PTE_BAR);
break; break;
case 5: case 5:
intel_private.gtt_phys_addr = reg_addr + MB(2); intel_private.gtt_phys_addr = reg_addr + MB(2);
......
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