Commit d5be89a8 authored by Palmer Dabbelt's avatar Palmer Dabbelt

RISC-V: Resurrect the MMIO timer implementation for M-mode systems

The K210 doesn't implement rdtime in M-mode, and since that's where Linux runs
in the NOMMU systems that means we can't use rdtime.  The K210 is the only
system that anyone is currently running NOMMU or M-mode on, so here we're just
inlining the timer read directly.

This also adds the CLINT driver as an !MMU dependency, as it's currently the
only timer driver availiable for these systems and without it we get a build
failure for some configurations.
Tested-by: default avatarDamien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
parent f025d9d9
...@@ -32,6 +32,7 @@ config RISCV ...@@ -32,6 +32,7 @@ config RISCV
select ARCH_WANT_FRAME_POINTERS select ARCH_WANT_FRAME_POINTERS
select ARCH_WANT_HUGE_PMD_SHARE if 64BIT select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
select CLONE_BACKWARDS select CLONE_BACKWARDS
select CLINT_TIMER if !MMU
select COMMON_CLK select COMMON_CLK
select EDAC_SUPPORT select EDAC_SUPPORT
select GENERIC_ARCH_TOPOLOGY if SMP select GENERIC_ARCH_TOPOLOGY if SMP
......
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2020 Google, Inc
*/
#ifndef _ASM_RISCV_CLINT_H
#define _ASM_RISCV_CLINT_H
#include <linux/types.h>
#include <asm/mmio.h>
#ifdef CONFIG_RISCV_M_MODE
/*
* This lives in the CLINT driver, but is accessed directly by timex.h to avoid
* any overhead when accessing the MMIO timer.
*
* The ISA defines mtime as a 64-bit memory-mapped register that increments at
* a constant frequency, but it doesn't define some other constraints we depend
* on (most notably ordering constraints, but also some simpler stuff like the
* memory layout). Thus, this is called "clint_time_val" instead of something
* like "riscv_mtime", to signify that these non-ISA assumptions must hold.
*/
extern u64 __iomem *clint_time_val;
#endif
#endif
...@@ -10,6 +10,31 @@ ...@@ -10,6 +10,31 @@
typedef unsigned long cycles_t; typedef unsigned long cycles_t;
#ifdef CONFIG_RISCV_M_MODE
#include <asm/clint.h>
#ifdef CONFIG_64BIT
static inline cycles_t get_cycles(void)
{
return readq_relaxed(clint_time_val);
}
#else /* !CONFIG_64BIT */
static inline u32 get_cycles(void)
{
return readl_relaxed(((u32 *)clint_time_val));
}
#define get_cycles get_cycles
static inline u32 get_cycles_hi(void)
{
return readl_relaxed(((u32 *)clint_time_val) + 1);
}
#define get_cycles_hi get_cycles_hi
#endif /* CONFIG_64BIT */
#else /* CONFIG_RISCV_M_MODE */
static inline cycles_t get_cycles(void) static inline cycles_t get_cycles(void)
{ {
return csr_read(CSR_TIME); return csr_read(CSR_TIME);
...@@ -41,6 +66,8 @@ static inline u64 get_cycles64(void) ...@@ -41,6 +66,8 @@ static inline u64 get_cycles64(void)
} }
#endif /* CONFIG_64BIT */ #endif /* CONFIG_64BIT */
#endif /* !CONFIG_RISCV_M_MODE */
#define ARCH_HAS_READ_CURRENT_TIMER #define ARCH_HAS_READ_CURRENT_TIMER
static inline int read_current_timer(unsigned long *timer_val) static inline int read_current_timer(unsigned long *timer_val)
{ {
......
...@@ -19,6 +19,11 @@ ...@@ -19,6 +19,11 @@
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include <linux/smp.h> #include <linux/smp.h>
#include <linux/timex.h>
#ifndef CONFIG_RISCV_M_MODE
#include <asm/clint.h>
#endif
#define CLINT_IPI_OFF 0 #define CLINT_IPI_OFF 0
#define CLINT_TIMER_CMP_OFF 0x4000 #define CLINT_TIMER_CMP_OFF 0x4000
...@@ -31,6 +36,10 @@ static u64 __iomem *clint_timer_val; ...@@ -31,6 +36,10 @@ static u64 __iomem *clint_timer_val;
static unsigned long clint_timer_freq; static unsigned long clint_timer_freq;
static unsigned int clint_timer_irq; static unsigned int clint_timer_irq;
#ifdef CONFIG_RISCV_M_MODE
u64 __iomem *clint_time_val;
#endif
static void clint_send_ipi(const struct cpumask *target) static void clint_send_ipi(const struct cpumask *target)
{ {
unsigned int cpu; unsigned int cpu;
...@@ -184,6 +193,14 @@ static int __init clint_timer_init_dt(struct device_node *np) ...@@ -184,6 +193,14 @@ static int __init clint_timer_init_dt(struct device_node *np)
clint_timer_val = base + CLINT_TIMER_VAL_OFF; clint_timer_val = base + CLINT_TIMER_VAL_OFF;
clint_timer_freq = riscv_timebase; clint_timer_freq = riscv_timebase;
#ifdef CONFIG_RISCV_M_MODE
/*
* Yes, that's an odd naming scheme. time_val is public, but hopefully
* will die in favor of something cleaner.
*/
clint_time_val = clint_timer_val;
#endif
pr_info("%pOFP: timer running at %ld Hz\n", np, clint_timer_freq); pr_info("%pOFP: timer running at %ld Hz\n", np, clint_timer_freq);
rc = clocksource_register_hz(&clint_clocksource, clint_timer_freq); rc = clocksource_register_hz(&clint_clocksource, clint_timer_freq);
......
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