Commit d78a3080 authored by Alex Deucher's avatar Alex Deucher Committed by Greg Kroah-Hartman

drm/radeon: fix active cu count for SI and CIK

commit 6101b3ae upstream.

This fixes the CU count reported to userspace for
OpenCL.

bug:
https://bugzilla.kernel.org/show_bug.cgi?id=82581Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 05396d20
...@@ -3259,7 +3259,7 @@ static void cik_gpu_init(struct radeon_device *rdev) ...@@ -3259,7 +3259,7 @@ static void cik_gpu_init(struct radeon_device *rdev)
u32 mc_shared_chmap, mc_arb_ramcfg; u32 mc_shared_chmap, mc_arb_ramcfg;
u32 hdp_host_path_cntl; u32 hdp_host_path_cntl;
u32 tmp; u32 tmp;
int i, j, k; int i, j;
switch (rdev->family) { switch (rdev->family) {
case CHIP_BONAIRE: case CHIP_BONAIRE:
...@@ -3451,12 +3451,10 @@ static void cik_gpu_init(struct radeon_device *rdev) ...@@ -3451,12 +3451,10 @@ static void cik_gpu_init(struct radeon_device *rdev)
for (i = 0; i < rdev->config.cik.max_shader_engines; i++) { for (i = 0; i < rdev->config.cik.max_shader_engines; i++) {
for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) {
for (k = 0; k < rdev->config.cik.max_cu_per_sh; k++) {
rdev->config.cik.active_cus += rdev->config.cik.active_cus +=
hweight32(cik_get_cu_active_bitmap(rdev, i, j)); hweight32(cik_get_cu_active_bitmap(rdev, i, j));
} }
} }
}
/* set HW defaults for 3D engine */ /* set HW defaults for 3D engine */
WREG32(CP_MEQ_THRESHOLDS, MEQ1_START(0x30) | MEQ2_START(0x60)); WREG32(CP_MEQ_THRESHOLDS, MEQ1_START(0x30) | MEQ2_START(0x60));
......
...@@ -2901,7 +2901,7 @@ static void si_gpu_init(struct radeon_device *rdev) ...@@ -2901,7 +2901,7 @@ static void si_gpu_init(struct radeon_device *rdev)
u32 sx_debug_1; u32 sx_debug_1;
u32 hdp_host_path_cntl; u32 hdp_host_path_cntl;
u32 tmp; u32 tmp;
int i, j, k; int i, j;
switch (rdev->family) { switch (rdev->family) {
case CHIP_TAHITI: case CHIP_TAHITI:
...@@ -3101,12 +3101,10 @@ static void si_gpu_init(struct radeon_device *rdev) ...@@ -3101,12 +3101,10 @@ static void si_gpu_init(struct radeon_device *rdev)
for (i = 0; i < rdev->config.si.max_shader_engines; i++) { for (i = 0; i < rdev->config.si.max_shader_engines; i++) {
for (j = 0; j < rdev->config.si.max_sh_per_se; j++) { for (j = 0; j < rdev->config.si.max_sh_per_se; j++) {
for (k = 0; k < rdev->config.si.max_cu_per_sh; k++) {
rdev->config.si.active_cus += rdev->config.si.active_cus +=
hweight32(si_get_cu_active_bitmap(rdev, i, j)); hweight32(si_get_cu_active_bitmap(rdev, i, j));
} }
} }
}
/* set HW defaults for 3D engine */ /* set HW defaults for 3D engine */
WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) | WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) |
......
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