Commit d8bffff2 authored by Robert Richter's avatar Robert Richter Committed by Dan Williams

cxl/port: Remove Component Register base address from struct cxl_dport

The Component Register base address @component_reg_phys is no longer
used after the rework of the Component Register setup which now uses
struct member @comp_map instead. Remove the base address.
Signed-off-by: default avatarRobert Richter <rrichter@amd.com>
Signed-off-by: default avatarTerry Bowman <terry.bowman@amd.com>
Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230622205523.85375-11-terry.bowman@amd.comSigned-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent d02034b4
...@@ -960,7 +960,6 @@ __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev, ...@@ -960,7 +960,6 @@ __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev,
dport->dport_dev = dport_dev; dport->dport_dev = dport_dev;
dport->port_id = port_id; dport->port_id = port_id;
dport->component_reg_phys = component_reg_phys;
dport->port = port; dport->port = port;
cond_cxl_root_lock(port); cond_cxl_root_lock(port);
......
...@@ -594,7 +594,6 @@ struct cxl_rcrb_info { ...@@ -594,7 +594,6 @@ struct cxl_rcrb_info {
* struct cxl_dport - CXL downstream port * struct cxl_dport - CXL downstream port
* @dport_dev: PCI bridge or firmware device representing the downstream link * @dport_dev: PCI bridge or firmware device representing the downstream link
* @port_id: unique hardware identifier for dport in decoder target list * @port_id: unique hardware identifier for dport in decoder target list
* @component_reg_phys: downstream port component registers
* @rcrb: Data about the Root Complex Register Block layout * @rcrb: Data about the Root Complex Register Block layout
* @rch: Indicate whether this dport was enumerated in RCH or VH mode * @rch: Indicate whether this dport was enumerated in RCH or VH mode
* @port: reference to cxl_port that contains this downstream port * @port: reference to cxl_port that contains this downstream port
...@@ -602,7 +601,6 @@ struct cxl_rcrb_info { ...@@ -602,7 +601,6 @@ struct cxl_rcrb_info {
struct cxl_dport { struct cxl_dport {
struct device *dport_dev; struct device *dport_dev;
int port_id; int port_id;
resource_size_t component_reg_phys;
struct cxl_rcrb_info rcrb; struct cxl_rcrb_info rcrb;
bool rch; bool rch;
struct cxl_port *port; struct cxl_port *port;
......
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