Commit d8e48cd0 authored by Paul Mackerras's avatar Paul Mackerras

Fix preempt on PPC32 - have to set PREEMPT_ACTIVE when preempting kernel stuff.

parent af75709a
...@@ -531,12 +531,27 @@ restore_user: ...@@ -531,12 +531,27 @@ restore_user:
resume_kernel: resume_kernel:
/* check current_thread_info->preempt_count */ /* check current_thread_info->preempt_count */
rlwinm r9,r1,0,0,18 rlwinm r9,r1,0,0,18
lwz r3,TI_PREEMPT(r9) lwz r0,TI_PREEMPT(r9)
cmpwi 0,r3,0 /* if non-zero, just restore regs and return */ cmpwi 0,r0,0 /* if non-zero, just restore regs and return */
bne restore bne restore
lwz r9,TI_FLAGS(r9) lwz r0,TI_FLAGS(r9)
andi. r0,r9,_TIF_NEED_RESCHED andi. r0,r0,_TIF_NEED_RESCHED
bne do_resched beq+ restore
andi. r0,r3,MSR_EE /* interrupts off? */
beq restore /* don't schedule if so */
1: lis r0,PREEMPT_ACTIVE@h
stw r0,TI_PREEMPT(r9)
ori r10,r10,MSR_EE
SYNC
MTMSRD(r10) /* hard-enable interrupts */
bl schedule
LOAD_MSR_KERNEL(r10,MSR_KERNEL)
SYNC
MTMSRD(r10) /* disable interrupts */
rlwinm r9,r1,0,0,18
lwz r0,TI_FLAGS(r9)
andi. r0,r0,_TIF_NEED_RESCHED
bne- 1b
#else #else
resume_kernel: resume_kernel:
#endif /* CONFIG_PREEMPT */ #endif /* CONFIG_PREEMPT */
...@@ -740,13 +755,6 @@ recheck: ...@@ -740,13 +755,6 @@ recheck:
lwz r9,TI_FLAGS(r9) lwz r9,TI_FLAGS(r9)
andi. r0,r9,_TIF_NEED_RESCHED andi. r0,r9,_TIF_NEED_RESCHED
bne- do_resched bne- do_resched
#ifdef CONFIG_PREEMPT
lwz r0,_MSR(r1)
andi. r0,r0,MSR_PR
beq restore
#endif
andi. r0,r9,_TIF_SIGPENDING andi. r0,r9,_TIF_SIGPENDING
beq restore_user beq restore_user
do_user_signal: /* r10 contains MSR_KERNEL here */ do_user_signal: /* r10 contains MSR_KERNEL here */
......
...@@ -272,10 +272,6 @@ BEGIN_FTR_SECTION ...@@ -272,10 +272,6 @@ BEGIN_FTR_SECTION
blr blr
END_FTR_SECTION_IFCLR(CPU_FTR_L3CR) END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)
/* Stop DST streams */
DSSALL
sync
/* Turn off interrupts and data relocation. */ /* Turn off interrupts and data relocation. */
mfmsr r7 /* Save MSR in r7 */ mfmsr r7 /* Save MSR in r7 */
rlwinm r4,r7,0,17,15 rlwinm r4,r7,0,17,15
...@@ -284,6 +280,10 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR) ...@@ -284,6 +280,10 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)
mtmsr r4 mtmsr r4
isync isync
/* Stop DST streams */
DSSALL
sync
/* Get the current enable bit of the L3CR into r4 */ /* Get the current enable bit of the L3CR into r4 */
mfspr r4,SPRN_L3CR mfspr r4,SPRN_L3CR
......
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