Commit d905f752 authored by Russell King's avatar Russell King

[ARM] Thumb fixes

This cset fixes a set of problems discovered while developing KLIBC
with Thumb support.  We now allow pure Thumb executables, and prevent
such executables from being run on non-Thumb code aware CPUs.
We also fix a bug in the fixup of Thumb late aborts which rather
messed things up.
parent 2a72d2e5
......@@ -21,9 +21,9 @@ ENTRY(v4t_late_abort)
tst r3, #PSR_T_BIT @ check for thumb mode
mrc p15, 0, r1, c5, c0, 0 @ get FSR
mrc p15, 0, r0, c6, c0, 0 @ get FAR
bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR
ldreq r8, [r2] @ read arm instruction
bne .data_thumb_abort
ldr r8, [r2] @ read arm instruction
bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR
tst r8, #1 << 20 @ L = 1 -> write?
orreq r1, r1, #1 << 11 @ yes.
and r7, r8, #15 << 24
......@@ -203,7 +203,7 @@ ENTRY(v4t_late_abort)
ldr r7, [sp, #13 << 2]
tst r8, #1 << 11
addne r7, r7, r6, lsl #2 @ increment SP if PUSH
subeq r7, r7, r6, lsr #2 @ decrement SP if POP
subeq r7, r7, r6, lsl #2 @ decrement SP if POP
str r7, [sp, #13 << 2]
mov pc, lr
......
......@@ -53,7 +53,6 @@ typedef struct { void *null; } elf_fpregset_t;
/* This yields a mask that user programs can use to figure out what
instruction set this cpu supports. */
extern unsigned int elf_hwcap;
#define ELF_HWCAP (elf_hwcap)
/* This yields a string that ld.so will use to load implementation
......
......@@ -6,10 +6,14 @@
#ifdef __KERNEL__
/* 32-bit code is always OK. Some cpus can do 26-bit, some can't. */
/*
* 32-bit code is always OK. Some cpus can do 26-bit, some can't.
*/
#define ELF_PROC_OK(x) \
((! ((x)->e_flags & EF_ARM_APCS26)) \
|| (elf_hwcap & HWCAP_26BIT))
(( (elf_hwcap & HWCAP_THUMB) && ((x)->e_entry & 1) == 1) || \
(!(elf_hwcap & HWCAP_THUMB) && ((x)->e_entry & 3) == 0) || \
( (elf_hwcap & HWCAP_26BIT) && (x)->e_flags & EF_ARM_APCS26) || \
((x)->e_flags & EF_ARM_APCS26) == 0)
/* Old NetWinder binaries were compiled in such a way that the iBCS
heuristic always trips on them. Until these binaries become uncommon
......
......@@ -36,7 +36,9 @@
regs->ARM_cpsr = USR_MODE; \
else \
regs->ARM_cpsr = USR26_MODE; \
regs->ARM_pc = pc; /* pc */ \
if (elf_hwcap & HWCAP_THUMB && pc & 1) \
regs->ARM_cpsr |= PSR_T_BIT; \
regs->ARM_pc = pc & ~1; /* pc */ \
regs->ARM_sp = sp; /* sp */ \
regs->ARM_r2 = stack[2]; /* r2 (envp) */ \
regs->ARM_r1 = stack[1]; /* r1 (argv) */ \
......
......@@ -25,6 +25,7 @@
#include <asm/atomic.h>
#include <asm/ptrace.h>
#include <asm/procinfo.h>
#include <asm/arch/memory.h>
#include <asm/proc/processor.h>
......
......@@ -46,6 +46,8 @@ struct proc_info_list {
struct cpu_user_fns *user;
};
extern unsigned int elf_hwcap;
#endif /* __ASSEMBLY__ */
#define PROC_INFO_SZ 44
......
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