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Commit d9fca73c authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman
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staging: comedi: hwdrv_apci1564: use addi_tcw.h defines 

Use the ADDI_TCW_CTRL_REG bit defines in addi_tcw.h to remove the "magic"
numbers.

Add some missing bit defines and mask defines to addi_tcw.h to help
cleanup the code.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 836b8f23
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Inline Side-by-side
Showing with 45 additions and 35 deletions
drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c
View file @ d9fca73c
...@@ -8,15 +8,16 @@ static int apci1564_timer_insn_config(struct comedi_device *dev, ...@@ -8,15 +8,16 @@ static int apci1564_timer_insn_config(struct comedi_device *dev,
devpriv->tsk_current = current; devpriv->tsk_current = current;
/* First Stop The Timer */ /* Stop the timer */
ctrl = inl(devpriv->timer + ADDI_TCW_CTRL_REG); ctrl = inl(devpriv->timer + ADDI_TCW_CTRL_REG);
ctrl &= 0xfffff9fe; ctrl &= ~(ADDI_TCW_CTRL_GATE | ADDI_TCW_CTRL_TRIG |
/* Stop The Timer */ ADDI_TCW_CTRL_ENA);
outl(ctrl, devpriv->timer + ADDI_TCW_CTRL_REG); outl(ctrl, devpriv->timer + ADDI_TCW_CTRL_REG);
if (data[1] == 1) { if (data[1] == 1) {
/* Enable timer int & disable all the other int sources */ /* Enable timer int & disable all the other int sources */
outl(0x02, devpriv->timer + ADDI_TCW_CTRL_REG); outl(ADDI_TCW_CTRL_IRQ_ENA,
devpriv->timer + ADDI_TCW_CTRL_REG);
outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG); outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG);
outl(0x0, dev->iobase + APCI1564_DO_IRQ_REG); outl(0x0, dev->iobase + APCI1564_DO_IRQ_REG);
outl(0x0, dev->iobase + APCI1564_WDOG_IRQ_REG); outl(0x0, dev->iobase + APCI1564_WDOG_IRQ_REG);
...@@ -40,9 +41,11 @@ static int apci1564_timer_insn_config(struct comedi_device *dev, ...@@ -40,9 +41,11 @@ static int apci1564_timer_insn_config(struct comedi_device *dev,
outl(data[3], devpriv->timer + ADDI_TCW_RELOAD_REG); outl(data[3], devpriv->timer + ADDI_TCW_RELOAD_REG);
ctrl = inl(devpriv->timer + ADDI_TCW_CTRL_REG); ctrl = inl(devpriv->timer + ADDI_TCW_CTRL_REG);
ctrl &= 0xfff719e2; ctrl &= ~(ADDI_TCW_CTRL_CNTR_ENA | ADDI_TCW_CTRL_MODE_MASK |
ctrl |= (2 << 13) | 0x10; ADDI_TCW_CTRL_GATE | ADDI_TCW_CTRL_TRIG |
/* mode 2 */ ADDI_TCW_CTRL_TIMER_ENA | ADDI_TCW_CTRL_RESET_ENA |
ADDI_TCW_CTRL_WARN_ENA | ADDI_TCW_CTRL_ENA);
ctrl |= ADDI_TCW_CTRL_MODE(2) | ADDI_TCW_CTRL_TIMER_ENA;
outl(ctrl, devpriv->timer + ADDI_TCW_CTRL_REG); outl(ctrl, devpriv->timer + ADDI_TCW_CTRL_REG);
return insn->n; return insn->n;
...@@ -59,11 +62,12 @@ static int apci1564_timer_insn_write(struct comedi_device *dev, ...@@ -59,11 +62,12 @@ static int apci1564_timer_insn_write(struct comedi_device *dev,
ctrl = inl(devpriv->timer + ADDI_TCW_CTRL_REG); ctrl = inl(devpriv->timer + ADDI_TCW_CTRL_REG);
switch (data[1]) { switch (data[1]) {
case 0: /* Stop The Timer */ case 0: /* Stop The Timer */
ctrl &= 0xfffff9fe; ctrl &= ~(ADDI_TCW_CTRL_GATE | ADDI_TCW_CTRL_TRIG |
ADDI_TCW_CTRL_ENA);
break; break;
case 1: /* Enable the Timer */ case 1: /* Enable the Timer */
ctrl &= 0xfffff9ff; ctrl &= ~(ADDI_TCW_CTRL_GATE | ADDI_TCW_CTRL_TRIG);
ctrl |= 0x1; ctrl |= ADDI_TCW_CTRL_ENA;
break; break;
} }
outl(ctrl, devpriv->timer + ADDI_TCW_CTRL_REG); outl(ctrl, devpriv->timer + ADDI_TCW_CTRL_REG);
...@@ -99,35 +103,35 @@ static int apci1564_counter_insn_config(struct comedi_device *dev, ...@@ -99,35 +103,35 @@ static int apci1564_counter_insn_config(struct comedi_device *dev,
devpriv->tsk_current = current; devpriv->tsk_current = current;
/* First Stop The Counter */
ctrl = inl(iobase + ADDI_TCW_CTRL_REG);
ctrl &= 0xfffff9fe;
/* Stop The Timer */ /* Stop The Timer */
ctrl = inl(iobase + ADDI_TCW_CTRL_REG);
ctrl &= ~(ADDI_TCW_CTRL_GATE | ADDI_TCW_CTRL_TRIG |
ADDI_TCW_CTRL_ENA);
outl(ctrl, iobase + ADDI_TCW_CTRL_REG); outl(ctrl, iobase + ADDI_TCW_CTRL_REG);
/* Set the reload value */ /* Set the reload value */
outl(data[3], iobase + ADDI_TCW_RELOAD_REG); outl(data[3], iobase + ADDI_TCW_RELOAD_REG);
/* Set the mode : */ /* Set the mode */
/* - Disable the hardware */ ctrl &= ~(ADDI_TCW_CTRL_EXT_CLK_MASK | ADDI_TCW_CTRL_MODE_MASK |
/* - Disable the counter mode */ ADDI_TCW_CTRL_GATE | ADDI_TCW_CTRL_TRIG |
/* - Disable the warning */ ADDI_TCW_CTRL_TIMER_ENA | ADDI_TCW_CTRL_RESET_ENA |
/* - Disable the reset */ ADDI_TCW_CTRL_WARN_ENA | ADDI_TCW_CTRL_ENA);
/* - Disable the timer mode */ ctrl |= ADDI_TCW_CTRL_CNTR_ENA | ADDI_TCW_CTRL_EXT_CLK(data[4]);
/* - Enable the counter mode */
ctrl &= 0xfffc19e2;
ctrl |= 0x80000 | (data[4] << 16);
outl(ctrl, iobase + ADDI_TCW_CTRL_REG); outl(ctrl, iobase + ADDI_TCW_CTRL_REG);
/* Enable or Disable Interrupt */ /* Enable or Disable Interrupt */
ctrl &= 0xfffff9fd; ctrl &= ~(ADDI_TCW_CTRL_GATE | ADDI_TCW_CTRL_TRIG |
ctrl |= (data[1] << 1); ADDI_TCW_CTRL_IRQ_ENA);
if (data[1])
ctrl |= ADDI_TCW_CTRL_IRQ_ENA;
outl(ctrl, iobase + ADDI_TCW_CTRL_REG); outl(ctrl, iobase + ADDI_TCW_CTRL_REG);
/* Set the Up/Down selection */ /* Set the Up/Down selection */
ctrl &= 0xfffbf9ff; ctrl &= ~(ADDI_TCW_CTRL_CNT_UP | ADDI_TCW_CTRL_GATE |
ctrl |= (data[6] << 18); ADDI_TCW_CTRL_TRIG);
if (data[6])
ctrl |= ADDI_TCW_CTRL_CNT_UP;
outl(ctrl, iobase + ADDI_TCW_CTRL_REG); outl(ctrl, iobase + ADDI_TCW_CTRL_REG);
return insn->n; return insn->n;
...@@ -149,12 +153,12 @@ static int apci1564_counter_insn_write(struct comedi_device *dev, ...@@ -149,12 +153,12 @@ static int apci1564_counter_insn_write(struct comedi_device *dev,
ctrl = 0; ctrl = 0;
break; break;
case 1: /* Start the Counter subdevice */ case 1: /* Start the Counter subdevice */
ctrl &= 0xfffff9ff; ctrl &= ~(ADDI_TCW_CTRL_GATE | ADDI_TCW_CTRL_TRIG);
ctrl |= 0x1; ctrl |= ADDI_TCW_CTRL_ENA;
break; break;
case 2: /* Clears the Counter subdevice */ case 2: /* Clears the Counter subdevice */
ctrl &= 0xfffff9ff; ctrl &= ~(ADDI_TCW_CTRL_GATE | ADDI_TCW_CTRL_TRIG);
ctrl |= 0x400; ctrl |= ADDI_TCW_CTRL_GATE;
break; break;
} }
outl(ctrl, iobase + ADDI_TCW_CTRL_REG); outl(ctrl, iobase + ADDI_TCW_CTRL_REG);
......
drivers/staging/comedi/drivers/addi_tcw.h
View file @ d9fca73c
...@@ -29,12 +29,18 @@ ...@@ -29,12 +29,18 @@
#define ADDI_TCW_CTRL_CASCADE BIT(20) #define ADDI_TCW_CTRL_CASCADE BIT(20)
#define ADDI_TCW_CTRL_CNTR_ENA BIT(19) #define ADDI_TCW_CTRL_CNTR_ENA BIT(19)
#define ADDI_TCW_CTRL_CNT_UP BIT(18) #define ADDI_TCW_CTRL_CNT_UP BIT(18)
#define ADDI_TCW_CTRL_EXT_CLK(x) ((x) << 16) #define ADDI_TCW_CTRL_EXT_CLK(x) (((x) & 3) << 16)
#define ADDI_TCW_CTRL_OUT(x) ((x) << 11) #define ADDI_TCW_CTRL_EXT_CLK_MASK ADDI_TCW_CTRL_EXT_CLK(3)
#define ADDI_TCW_CTRL_MODE(x) (((x) & 7) << 13)
#define ADDI_TCW_CTRL_MODE_MASK ADDI_TCW_CTRL_MODE(7)
#define ADDI_TCW_CTRL_OUT(x) (((x) & 3) << 11)
#define ADDI_TCW_CTRL_OUT_MASK ADDI_TCW_CTRL_OUT(3)
#define ADDI_TCW_CTRL_GATE BIT(10) #define ADDI_TCW_CTRL_GATE BIT(10)
#define ADDI_TCW_CTRL_TRIG BIT(9) #define ADDI_TCW_CTRL_TRIG BIT(9)
#define ADDI_TCW_CTRL_EXT_GATE(x) ((x) << 7) #define ADDI_TCW_CTRL_EXT_GATE(x) (((x) & 3) << 7)
#define ADDI_TCW_CTRL_EXT_TRIG(x) ((x) << 5) #define ADDI_TCW_CTRL_EXT_GATE_MASK ADDI_TCW_CTRL_EXT_GATE(3)
#define ADDI_TCW_CTRL_EXT_TRIG(x) (((x) & 3) << 5)
#define ADDI_TCW_CTRL_EXT_TRIG_MASK ADDI_TCW_CTRL_EXT_TRIG(3)
#define ADDI_TCW_CTRL_TIMER_ENA BIT(4) #define ADDI_TCW_CTRL_TIMER_ENA BIT(4)
#define ADDI_TCW_CTRL_RESET_ENA BIT(3) #define ADDI_TCW_CTRL_RESET_ENA BIT(3)
#define ADDI_TCW_CTRL_WARN_ENA BIT(2) #define ADDI_TCW_CTRL_WARN_ENA BIT(2)
......
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