Commit da8d07af authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "Bindings:

   - Add spi-peripheral-props.yaml references to various SPI device
     bindings

   - Convert qcom,pm8916-wdt, ds1307, Qualcomm BAM DMA, is31fl319x,
     skyworks,aat1290, Rockchip EMAC, gpio-ir-receiver, ahci-ceva, Arm
     CCN PMU, rda,8810pl-intc, sil,sii9022, ps2-gpio, and
     arm-firmware-suite bindings to DT schema format

   - New bindings for Arm virtual platforms display, Qualcomm IMEM
     memory region, Samsung S5PV210 ChipID, EM Microelectronic EM3027
     RTC, and arm,cortex-a78ae

   - Add vendor prefixes for asrock, bytedance, hxt, ingrasys, inventec,
     quanta, and densitron

   - Add missing MSI and IOMMU properties to host-generic-pci

   - Remove bindings for removed EFM32 platform

   - Remove old chosen.txt binding (replaced by schema)

   - Treewide add missing type information for properties

   - Treewide fixing of typos and its vs. it's in bindings. Its all good
     now.

   - Drop unnecessary quoting in power related schemas

   - Several LED binding updates which didn't get picked up

   - Move various bindings to proper directories

  DT core code:

   - Convert unittest GPIO related tests to use fwnode

   - Check ima-kexec-buffer against memory bounds

   - Print reserved-memory allocation/reservation failures as errors

   - Cleanup early_init_dt_reserve_memory_arch()

   - Simplify of_overlay_fdt_apply() tail"

* tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (65 commits)
  dt-bindings: mtd: microchip,mchp48l640: use spi-peripheral-props.yaml
  dt-bindings: power: supply: drop quotes when not needed
  dt-bindings: power: reset: drop quotes when not needed
  dt-bindings: power: drop quotes when not needed
  dt-bindings: PCI: host-generic-pci: Allow IOMMU and MSI properties
  of/fdt: declared return type does not match actual return type
  devicetree/bindings: correct possessive "its" typos
  dt-bindings: net: convert emac_rockchip.txt to YAML
  dt-bindings: eeprom: microchip,93lc46b: move to eeprom directory
  dt-bindings: eeprom: at25: use spi-peripheral-props.yaml
  dt-bindings: display: use spi-peripheral-props.yaml
  dt-bindings: watchdog: qcom,pm8916-wdt: convert to dtschema
  dt-bindings: power: reset: qcom,pon: use absolute path to other schema
  dt-bindings: iio/dac: adi,ad5766: Add missing type to 'output-range-microvolts'
  dt-bindings: power: supply: charger-manager: Add missing type for 'cm-battery-stat'
  dt-bindings: panel: raydium,rm67191: Add missing type to 'video-mode'
  of/fdt: Clean up early_init_dt_reserve_memory_arch()
  dt-bindings: PCI: fsl,imx6q-pcie: Add missing type for 'reset-gpio-active-high'
  dt-bindings: rtc: Add EM Microelectronic EM3027 bindings
  dt-bindings: rtc: ds1307: Convert to json-schema
  ...
parents 8d9420ca 7e7a24c3
......@@ -138,6 +138,7 @@ properties:
- arm,cortex-a76
- arm,cortex-a77
- arm,cortex-a78
- arm,cortex-a78ae
- arm,cortex-a510
- arm,cortex-a710
- arm,cortex-m0
......
......@@ -10,7 +10,7 @@ system, notifying them when a low power state is entered or exited.
Multiple revisions of the SAW hardware are supported using these Device Nodes.
SAW2 revisions differ in the register offset and configuration data. Also, the
same revision of the SAW in different SoCs may have different configuration
data due the the differences in hardware capabilities. Hence the SoC name, the
data due the differences in hardware capabilities. Hence the SoC name, the
version of the SAW hardware in that SoC and the distinction between cpu (big
or Little) or cache, may be needed to uniquely identify the SAW register
configuration and initialization data. The compatible string is used to
......
......@@ -208,7 +208,7 @@ properties:
"^[a-z0-9]+$":
type: object
patternProperties:
properties:
clocks:
minItems: 1
maxItems: 8
......
......@@ -29,6 +29,13 @@ properties:
ranges: true
gpio-controller:
deprecated: true
"#gpio-cells":
deprecated: true
const: 2
additionalProperties: false
patternProperties:
......@@ -67,8 +74,7 @@ patternProperties:
required:
- compatible
- "#address-cells"
- "#size-cells"
- reg
examples:
- |
......
Binding for CEVA AHCI SATA Controller
Required properties:
- reg: Physical base address and size of the controller's register area.
- compatible: Compatibility string. Must be 'ceva,ahci-1v84'.
- clocks: Input clock specifier. Refer to common clock bindings.
- interrupts: Interrupt specifier. Refer to interrupt binding.
- ceva,p0-cominit-params: OOB timing value for COMINIT parameter for port 0.
- ceva,p1-cominit-params: OOB timing value for COMINIT parameter for port 1.
The fields for the above parameter must be as shown below:
ceva,pN-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
CINMP : COMINIT Negate Minimum Period.
CIBGN : COMINIT Burst Gap Nominal.
CIBGMX: COMINIT Burst Gap Maximum.
CIBGMN: COMINIT Burst Gap Minimum.
- ceva,p0-comwake-params: OOB timing value for COMWAKE parameter for port 0.
- ceva,p1-comwake-params: OOB timing value for COMWAKE parameter for port 1.
The fields for the above parameter must be as shown below:
ceva,pN-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
CWBGMN: COMWAKE Burst Gap Minimum.
CWBGMX: COMWAKE Burst Gap Maximum.
CWBGN: COMWAKE Burst Gap Nominal.
CWNMP: COMWAKE Negate Minimum Period.
- ceva,p0-burst-params: Burst timing value for COM parameter for port 0.
- ceva,p1-burst-params: Burst timing value for COM parameter for port 1.
The fields for the above parameter must be as shown below:
ceva,pN-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
BMX: COM Burst Maximum.
BNM: COM Burst Nominal.
SFD: Signal Failure Detection value.
PTST: Partial to Slumber timer value.
- ceva,p0-retry-params: Retry interval timing value for port 0.
- ceva,p1-retry-params: Retry interval timing value for port 1.
The fields for the above parameter must be as shown below:
ceva,pN-retry-params = /bits/ 16 <RIT RCT>;
RIT: Retry Interval Timer.
RCT: Rate Change Timer.
Optional properties:
- ceva,broken-gen2: limit to gen1 speed instead of gen2.
- phys: phandle for the PHY device
- resets: phandle to the reset controller for the SATA IP
Examples:
ahci@fd0c0000 {
compatible = "ceva,ahci-1v84";
reg = <0xfd0c0000 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 133 4>;
clocks = <&clkc SATA_CLK_ID>;
ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
ceva,broken-gen2;
phys = <&psgtr 1 PHY_TYPE_SATA 1 1>;
resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ata/ceva,ahci-1v84.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ceva AHCI SATA Controller
maintainers:
- Piyush Mehta <piyush.mehta@xilinx.com>
description: |
The Ceva SATA controller mostly conforms to the AHCI interface with some
special extensions to add functionality, is a high-performance dual-port
SATA host controller with an AHCI compliant command layer which supports
advanced features such as native command queuing and frame information
structure (FIS) based switching for systems employing port multipliers.
properties:
compatible:
const: ceva,ahci-1v84
reg:
maxItems: 1
clocks:
maxItems: 1
dma-coherent: true
interrupts:
maxItems: 1
iommus:
maxItems: 1
power-domains:
maxItems: 1
ceva,p0-cominit-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
OOB timing value for COMINIT parameter for port 0.
The fields for the above parameter must be as shown below:-
ceva,p0-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
items:
- description: CINMP - COMINIT Negate Minimum Period.
- description: CIBGN - COMINIT Burst Gap Nominal.
- description: CIBGMX - COMINIT Burst Gap Maximum.
- description: CIBGMN - COMINIT Burst Gap Minimum.
ceva,p0-comwake-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
OOB timing value for COMWAKE parameter for port 0.
The fields for the above parameter must be as shown below:-
ceva,p0-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
items:
- description: CWBGMN - COMWAKE Burst Gap Minimum.
- description: CWBGMX - COMWAKE Burst Gap Maximum.
- description: CWBGN - COMWAKE Burst Gap Nominal.
- description: CWNMP - COMWAKE Negate Minimum Period.
ceva,p0-burst-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
Burst timing value for COM parameter for port 0.
The fields for the above parameter must be as shown below:-
ceva,p0-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
items:
- description: BMX - COM Burst Maximum.
- description: BNM - COM Burst Nominal.
- description: SFD - Signal Failure Detection value.
- description: PTST - Partial to Slumber timer value.
ceva,p0-retry-params:
$ref: /schemas/types.yaml#/definitions/uint16-array
description: |
Retry interval timing value for port 0.
The fields for the above parameter must be as shown below:-
ceva,p0-retry-params = /bits/ 16 <RIT RCT>;
items:
- description: RIT - Retry Interval Timer.
- description: RCT - Rate Change Timer.
ceva,p1-cominit-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
OOB timing value for COMINIT parameter for port 1.
The fields for the above parameter must be as shown below:-
ceva,p1-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
items:
- description: CINMP - COMINIT Negate Minimum Period.
- description: CIBGN - COMINIT Burst Gap Nominal.
- description: CIBGMX - COMINIT Burst Gap Maximum.
- description: CIBGMN - COMINIT Burst Gap Minimum.
ceva,p1-comwake-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
OOB timing value for COMWAKE parameter for port 1.
The fields for the above parameter must be as shown below:-
ceva,p1-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
items:
- description: CWBGMN - COMWAKE Burst Gap Minimum.
- description: CWBGMX - COMWAKE Burst Gap Maximum.
- description: CWBGN - COMWAKE Burst Gap Nominal.
- description: CWNMP - COMWAKE Negate Minimum Period.
ceva,p1-burst-params:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: |
Burst timing value for COM parameter for port 1.
The fields for the above parameter must be as shown below:-
ceva,p1-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
items:
- description: BMX - COM Burst Maximum.
- description: BNM - COM Burst Nominal.
- description: SFD - Signal Failure Detection value.
- description: PTST - Partial to Slumber timer value.
ceva,p1-retry-params:
$ref: /schemas/types.yaml#/definitions/uint16-array
description: |
Retry interval timing value for port 1.
The fields for the above parameter must be as shown below:-
ceva,pN-retry-params = /bits/ 16 <RIT RCT>;
items:
- description: RIT - Retry Interval Timer.
- description: RCT - Rate Change Timer.
ceva,broken-gen2:
$ref: /schemas/types.yaml#/definitions/flag
description: |
limit to gen1 speed instead of gen2.
phys:
maxItems: 1
phy-names:
items:
- const: sata-phy
resets:
maxItems: 1
required:
- compatible
- reg
- clocks
- interrupts
- ceva,p0-cominit-params
- ceva,p0-comwake-params
- ceva,p0-burst-params
- ceva,p0-retry-params
- ceva,p1-cominit-params
- ceva,p1-comwake-params
- ceva,p1-burst-params
- ceva,p1-retry-params
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/xlnx-zynqmp-clk.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/xlnx-zynqmp-power.h>
#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
#include <dt-bindings/clock/xlnx-zynqmp-clk.h>
#include <dt-bindings/phy/phy.h>
sata: ahci@fd0c0000 {
compatible = "ceva,ahci-1v84";
reg = <0xfd0c0000 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk SATA_REF>;
ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
ceva,broken-gen2;
phys = <&psgtr 1 PHY_TYPE_SATA 1 1>;
resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
};
......@@ -28,11 +28,9 @@ properties:
- const: qcom,ssc-block-bus
reg:
description: |
Shall contain the addresses of the SSCAON_CONFIG0 and SSCAON_CONFIG1
registers
minItems: 2
maxItems: 2
items:
- description: SSCAON_CONFIG0 registers
- description: SSCAON_CONFIG1 registers
reg-names:
items:
......@@ -48,7 +46,6 @@ properties:
ranges: true
clocks:
minItems: 6
maxItems: 6
clock-names:
......@@ -61,9 +58,9 @@ properties:
- const: ssc_ahbs
power-domains:
description: Power domain phandles for the ssc_cx and ssc_mx power domains
minItems: 2
maxItems: 2
items:
- description: CX power domain
- description: MX power domain
power-domain-names:
items:
......@@ -71,11 +68,11 @@ properties:
- const: ssc_mx
resets:
description: |
Reset phandles for the ssc_reset and ssc_bcr resets (note: ssc_bcr is the
branch control register associated with the ssc_xo and ssc_ahbs clocks)
minItems: 2
maxItems: 2
items:
- description: Main reset
- description:
SSC Branch Control Register reset (associated with the ssc_xo and
ssc_ahbs clocks)
reset-names:
items:
......
The chosen node
---------------
The chosen node does not represent a real device, but serves as a place
for passing data between firmware and the operating system, like boot
arguments. Data in the chosen node does not represent the hardware.
The following properties are recognized:
kaslr-seed
-----------
This property is used when booting with CONFIG_RANDOMIZE_BASE as the
entropy used to randomize the kernel image base address location. Since
it is used directly, this value is intended only for KASLR, and should
not be used for other purposes (as it may leak information about KASLR
offsets). It is parsed as a u64 value, e.g.
/ {
chosen {
kaslr-seed = <0xfeedbeef 0xc0def00d>;
};
};
Note that if this property is set from UEFI (or a bootloader in EFI
mode) when EFI_RNG_PROTOCOL is supported, it will be overwritten by
the Linux EFI stub (which will populate the property itself, using
EFI_RNG_PROTOCOL).
stdout-path
-----------
Device trees may specify the device to be used for boot console output
with a stdout-path property under /chosen, as described in the Devicetree
Specification, e.g.
/ {
chosen {
stdout-path = "/serial@f00:115200";
};
serial@f00 {
compatible = "vendor,some-uart";
reg = <0xf00 0x10>;
};
};
If the character ":" is present in the value, this terminates the path.
The meaning of any characters following the ":" is device-specific, and
must be specified in the relevant binding documentation.
For UART devices, the preferred binding is a string in the form:
<baud>{<parity>{<bits>{<flow>}}}
where
baud - baud rate in decimal
parity - 'n' (none), 'o', (odd) or 'e' (even)
bits - number of data bits
flow - 'r' (rts)
For example: 115200n8r
Implementation note: Linux will look for the property "linux,stdout-path" or
on PowerPC "stdout" if "stdout-path" is not found. However, the
"linux,stdout-path" and "stdout" properties are deprecated. New platforms
should only use the "stdout-path" property.
linux,booted-from-kexec
-----------------------
This property is set (currently only on PowerPC, and only needed on
book3e) by some versions of kexec-tools to tell the new kernel that it
is being booted by kexec, as the booting environment may differ (e.g.
a different secondary CPU release mechanism)
linux,usable-memory-range
-------------------------
This property holds a base address and size, describing a limited region in
which memory may be considered available for use by the kernel. Memory outside
of this range is not available for use.
This property describes a limitation: memory within this range is only
valid when also described through another mechanism that the kernel
would otherwise use to determine available memory (e.g. memory nodes
or the EFI memory map). Valid memory may be sparse within the range.
e.g.
/ {
chosen {
linux,usable-memory-range = <0x9 0xf0000000 0x0 0x10000000>;
};
};
The main usage is for crash dump kernel to identify its own usable
memory and exclude, at its boot time, any other memory areas that are
part of the panicked kernel's memory.
While this property does not represent a real hardware, the address
and the size are expressed in #address-cells and #size-cells,
respectively, of the root node.
linux,elfcorehdr
----------------
This property holds the memory range, the address and the size, of the elf
core header which mainly describes the panicked kernel's memory layout as
PT_LOAD segments of elf format.
e.g.
/ {
chosen {
linux,elfcorehdr = <0x9 0xfffff000 0x0 0x800>;
};
};
While this property does not represent a real hardware, the address
and the size are expressed in #address-cells and #size-cells,
respectively, of the root node.
linux,initrd-start and linux,initrd-end
---------------------------------------
These properties hold the physical start and end address of an initrd that's
loaded by the bootloader. Note that linux,initrd-start is inclusive, but
linux,initrd-end is exclusive.
e.g.
/ {
chosen {
linux,initrd-start = <0x82000000>;
linux,initrd-end = <0x82800000>;
};
};
* Clock bindings for Energy Micro efm32 Giant Gecko's Clock Management Unit
Required properties:
- compatible: Should be "efm32gg,cmu"
- reg: Base address and length of the register set
- interrupts: Interrupt used by the CMU
- #clock-cells: Should be <1>
The clock consumer should specify the desired clock by having the clock ID in
its "clocks" phandle cell. The header efm32-clk.h contains a list of available
IDs.
......@@ -78,7 +78,7 @@ Required properties:
- #clock-cells : from common clock binding; shall be set to 1 (multiple clock
outputs).
- clocks : must be set to the parent's phandle. it's could be output clocks of
- clocks : must be set to the parent's phandle. it could be output clocks of
a quadsfs or/and a pll or/and clk_sysin (up to 7 clocks)
- clock-output-names : List of strings used to name the clock outputs.
......
......@@ -15,7 +15,7 @@ Required properties:
- for "ti,da850-pll1", shall be "clksrc"
Optional properties:
- ti,clkmode-square-wave: Indicates that the the board is supplying a square
- ti,clkmode-square-wave: Indicates that the board is supplying a square
wave input on the OSCIN pin instead of using a crystal oscillator.
This property is only valid when compatible = "ti,da850-pll0".
......
......@@ -6,7 +6,7 @@ functional clock but can be configured to provide different clocks.
ATL can maintain a clock averages to some desired frequency based on the bws/aws
signals - can compensate the drift between the two ws signal.
In order to provide the support for ATL and it's output clocks (which can be used
In order to provide the support for ATL and its output clocks (which can be used
internally within the SoC or external components) two sets of bindings is needed:
Clock tree binding:
......
......@@ -159,25 +159,12 @@ examples:
};
panel {
compatible = "arm,rtsm-display", "panel-dpi";
power-supply = <&vcc_supply>;
compatible = "arm,rtsm-display";
port {
clcd_panel: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
panel-timing {
clock-frequency = <25175000>;
hactive = <640>;
hback-porch = <40>;
hfront-porch = <24>;
hsync-len = <96>;
vactive = <480>;
vback-porch = <32>;
vfront-porch = <11>;
vsync-len = <2>;
};
};
...
sii902x HDMI bridge bindings
Required properties:
- compatible: "sil,sii9022"
- reg: i2c address of the bridge
Optional properties:
- interrupts: describe the interrupt line used to inform the host
about hotplug events.
- reset-gpios: OF device-tree gpio specification for RST_N pin.
- iovcc-supply: I/O Supply Voltage (1.8V or 3.3V)
- cvcc12-supply: Digital Core Supply Voltage (1.2V)
HDMI audio properties:
- #sound-dai-cells: <0> or <1>. <0> if only i2s or spdif pin
is wired, <1> if the both are wired. HDMI audio is
configured only if this property is found.
- sil,i2s-data-lanes: Array of up to 4 integers with values of 0-3
Each integer indicates which i2s pin is connected to which
audio fifo. The first integer selects i2s audio pin for the
first audio fifo#0 (HDMI channels 1&2), second for fifo#1
(HDMI channels 3&4), and so on. There is 4 fifos and 4 i2s
pins (SD0 - SD3). Any i2s pin can be connected to any fifo,
but there can be no gaps. E.g. an i2s pin must be mapped to
fifo#0 and fifo#1 before mapping a channel to fifo#2. Default
value is <0>, describing SD0 pin beiging routed to hdmi audio
fifo #0.
- clocks: phandle and clock specifier for each clock listed in
the clock-names property
- clock-names: "mclk"
Describes SII902x MCLK input. MCLK can be used to produce
HDMI audio CTS values. This property follows
Documentation/devicetree/bindings/clock/clock-bindings.txt
consumer binding.
If HDMI audio is configured the sii902x device becomes an I2S
and/or spdif audio codec component (e.g a digital audio sink),
that can be used in configuring a full audio devices with
simple-card or audio-graph-card binding. See their binding
documents on how to describe the way the sii902x device is
connected to the rest of the audio system:
Documentation/devicetree/bindings/sound/simple-card.yaml
Documentation/devicetree/bindings/sound/audio-graph-card.yaml
Note: In case of the audio-graph-card binding the used port
index should be 3.
Optional subnodes:
- video input: this subnode can contain a video input port node
to connect the bridge to a display controller output (See this
documentation [1]).
[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
Example:
hdmi-bridge@39 {
compatible = "sil,sii9022";
reg = <0x39>;
reset-gpios = <&pioA 1 0>;
iovcc-supply = <&v3v3_hdmi>;
cvcc12-supply = <&v1v2_hdmi>;
#sound-dai-cells = <0>;
sil,i2s-data-lanes = < 0 1 2 >;
clocks = <&mclk>;
clock-names = "mclk";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
bridge_in: endpoint {
remote-endpoint = <&dc_out>;
};
};
};
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/sil,sii9022.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Silicon Image sii902x HDMI bridge
maintainers:
- Boris Brezillon <bbrezillon@kernel.org>
properties:
compatible:
oneOf:
- items:
- enum:
- sil,sii9022-cpi # CEC Programming Interface
- sil,sii9022-tpi # Transmitter Programming Interface
- const: sil,sii9022
- const: sil,sii9022
reg:
maxItems: 1
interrupts:
maxItems: 1
description: Interrupt line used to inform the host about hotplug events.
reset-gpios:
maxItems: 1
iovcc-supply:
description: I/O Supply Voltage (1.8V or 3.3V)
cvcc12-supply:
description: Digital Core Supply Voltage (1.2V)
'#sound-dai-cells':
enum: [ 0, 1 ]
description: |
<0> if only I2S or S/PDIF pin is wired,
<1> if both are wired.
HDMI audio is configured only if this property is found.
If HDMI audio is configured, the sii902x device becomes an I2S and/or
S/PDIF audio codec component (e.g. a digital audio sink), that can be
used in configuring full audio devices with simple-card or
audio-graph-card bindings. See their binding documents on how to describe
the way the
sii902x device is connected to the rest of the audio system:
Documentation/devicetree/bindings/sound/simple-card.yaml
Documentation/devicetree/bindings/sound/audio-graph-card.yaml
Note: In case of the audio-graph-card binding the used port index should
be 3.
sil,i2s-data-lanes:
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 1
maxItems: 4
uniqueItems: true
items:
enum: [ 0, 1, 2, 3 ]
description:
Each integer indicates which I2S pin is connected to which audio FIFO.
The first integer selects the I2S audio pin for the first audio FIFO#0
(HDMI channels 1&2), the second for FIFO#1 (HDMI channels 3&4), and so
on. There are 4 FIFOs and 4 I2S pins (SD0 - SD3). Any I2S pin can be
connected to any FIFO, but there can be no gaps. E.g. an I2S pin must be
mapped to FIFO#0 and FIFO#1 before mapping a channel to FIFO#2. The
default value is <0>, describing SD0 pin being routed to HDMI audio
FIFO#0.
clocks:
maxItems: 1
description: MCLK input. MCLK can be used to produce HDMI audio CTS values.
clock-names:
const: mclk
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: Parallel RGB input port
port@1:
$ref: /schemas/graph.yaml#/properties/port
description: HDMI output port
port@3:
$ref: /schemas/graph.yaml#/properties/port
description: Sound input port
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
hdmi-bridge@39 {
compatible = "sil,sii9022";
reg = <0x39>;
reset-gpios = <&pioA 1 0>;
iovcc-supply = <&v3v3_hdmi>;
cvcc12-supply = <&v1v2_hdmi>;
#sound-dai-cells = <0>;
sil,i2s-data-lanes = < 0 1 2 >;
clocks = <&mclk>;
clock-names = "mclk";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
bridge_in: endpoint {
remote-endpoint = <&dc_out>;
};
};
};
};
};
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/arm,rtsm-display.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Arm RTSM Virtual Platforms Display
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: arm,rtsm-display
port: true
required:
- compatible
- port
additionalProperties: false
...
......@@ -15,13 +15,13 @@ maintainers:
allOf:
- $ref: panel-common.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
const: lg,lg4573
reg: true
spi-max-frequency: true
required:
- compatible
......
......@@ -38,6 +38,7 @@ properties:
0 - burst-mode
1 - non-burst with sync event
2 - non-burst with sync pulse
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2]
required:
......
......@@ -15,6 +15,7 @@ description:
allOf:
- $ref: panel/panel-common.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
......
......@@ -49,9 +49,6 @@ properties:
vbat-supply:
description: The supply for VBAT
# Only required for SPI
spi-max-frequency: true
solomon,height:
$ref: /schemas/types.yaml#/definitions/uint32
default: 16
......@@ -153,6 +150,8 @@ required:
- reg
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- if:
properties:
compatible:
......@@ -223,7 +222,7 @@ allOf:
solomon,dclk-frq:
default: 10
additionalProperties: false
unevaluatedProperties: false
examples:
- |
......
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies Inc BAM DMA controller
maintainers:
- Andy Gross <agross@kernel.org>
- Bjorn Andersson <bjorn.andersson@linaro.org>
allOf:
- $ref: "dma-controller.yaml#"
properties:
compatible:
enum:
# APQ8064, IPQ8064 and MSM8960
- qcom,bam-v1.3.0
# MSM8974, APQ8074 and APQ8084
- qcom,bam-v1.4.0
# MSM8916
- qcom,bam-v1.7.0
clocks:
maxItems: 1
clock-names:
items:
- const: bam_clk
"#dma-cells":
const: 1
interrupts:
maxItems: 1
iommus:
minItems: 1
maxItems: 4
num-channels:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Indicates supported number of DMA channels in a remotely controlled bam.
qcom,controlled-remotely:
type: boolean
description:
Indicates that the bam is controlled by remote proccessor i.e. execution
environment.
qcom,ee:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 7
description:
Indicates the active Execution Environment identifier (0-7) used in the
secure world.
qcom,num-ees:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Indicates supported number of Execution Environments in a remotely
controlled bam.
qcom,powered-remotely:
type: boolean
description:
Indicates that the bam is powered up by a remote processor but must be
initialized by the local processor.
reg:
maxItems: 1
required:
- compatible
- "#dma-cells"
- interrupts
- qcom,ee
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8974.h>
dma-controller@f9944000 {
compatible = "qcom,bam-v1.4.0";
reg = <0xf9944000 0x15000>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
};
...
QCOM BAM DMA controller
Required properties:
- compatible: must be one of the following:
* "qcom,bam-v1.4.0" for MSM8974, APQ8074 and APQ8084
* "qcom,bam-v1.3.0" for APQ8064, IPQ8064 and MSM8960
* "qcom,bam-v1.7.0" for MSM8916
- reg: Address range for DMA registers
- interrupts: Should contain the one interrupt shared by all channels
- #dma-cells: must be <1>, the cell in the dmas property of the client device
represents the channel number
- clocks: required clock
- clock-names: must contain "bam_clk" entry
- qcom,ee : indicates the active Execution Environment identifier (0-7) used in
the secure world.
- qcom,controlled-remotely : optional, indicates that the bam is controlled by
remote proccessor i.e. execution environment.
- qcom,powered-remotely : optional, indicates that the bam is powered up by
a remote processor but must be initialized by the local processor.
- num-channels : optional, indicates supported number of DMA channels in a
remotely controlled bam.
- qcom,num-ees : optional, indicates supported number of Execution Environments
in a remotely controlled bam.
Example:
uart-bam: dma@f9984000 = {
compatible = "qcom,bam-v1.4.0";
reg = <0xf9984000 0x15000>;
interrupts = <0 94 0>;
clocks = <&gcc GCC_BAM_DMA_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
};
DMA clients must use the format described in the dma.txt file, using a two cell
specifier for each channel.
Example:
serial@f991e000 {
compatible = "qcom,msm-uart";
reg = <0xf991e000 0x1000>
<0xf9944000 0x19000>;
interrupts = <0 108 0>;
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&uart-bam 0>, <&uart-bam 1>;
dma-names = "rx", "tx";
};
......@@ -44,8 +44,6 @@ properties:
reg:
maxItems: 1
spi-max-frequency: true
pagesize:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536, 131072]
......@@ -105,6 +103,7 @@ required:
- spi-max-frequency
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- if:
properties:
compatible:
......@@ -117,7 +116,7 @@ allOf:
- size
- address-width
additionalProperties: false
unevaluatedProperties: false
examples:
- |
......
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/misc/eeprom-93xx46.yaml#
$id: http://devicetree.org/schemas/eeprom/microchip,93lc46b.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip 93xx46 SPI compatible EEPROM family dt bindings
......@@ -28,9 +28,6 @@ properties:
description: chip select of EEPROM
maxItems: 1
spi-max-frequency: true
spi-cs-high: true
read-only:
description:
parameter-less property which disables writes to the EEPROM
......@@ -42,14 +39,16 @@ properties:
of EEPROM (e.g. for SPI bus multiplexing)
maxItems: 1
required:
- compatible
- reg
- data-size
- spi-max-frequency
additionalProperties: false
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
......
......@@ -330,7 +330,7 @@ succeeded.
The Device Tree Overlay will contain:
* "target-path" or "target"
The insertion point where the the contents of the overlay will go into the
The insertion point where the contents of the overlay will go into the
live tree. target-path is a full path, while target is a phandle.
* "ranges"
The address space mapping from processor to FPGA bus(ses).
......
......@@ -14,7 +14,7 @@ Optional properties:
- ngpios : Number of used GPIO lines (0..n-1), default is 8.
- load-gpios : GPIO pin specifier attached to load enable, this
pin is pulsed before reading from the device to
load input pin values into the the device.
load input pin values into the device.
For other required and optional properties of SPI slave
nodes please refer to ../spi/spi-bus.txt.
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/samsung/exynos-chipid.yaml#
$id: http://devicetree.org/schemas/hwinfo/samsung,exynos-chipid.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung Exynos SoC series Chipid driver
......
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/hwinfo/samsung,s5pv210-chipid.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung S5PV210 SoC ChipID
maintainers:
- Krzysztof Kozlowski <krzk@kernel.org>
properties:
compatible:
const: samsung,s5pv210-chipid
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
chipid@e0000000 {
compatible = "samsung,s5pv210-chipid";
reg = <0xe0000000 0x1000>;
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/ti/k3-socinfo.yaml#
$id: http://devicetree.org/schemas/hwinfo/ti,k3-socinfo.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments K3 Multicore SoC platforms chipid module
......
......@@ -57,7 +57,7 @@ patternProperties:
Configures bypassing the individual voltage input attenuator. If
set to 1 the attenuator is bypassed if set to 0 the attenuator is
not bypassed. If the property is absent then the attenuator
retains it's configuration from the bios/bootloader.
retains its configuration from the bios/bootloader.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
......
* Energymicro efm32 i2c controller
Required properties :
- reg : Offset and length of the register set for the device
- compatible : should be "energymicro,efm32-i2c"
- interrupts : the interrupt number
- clocks : reference to the module clock
Recommended properties :
- clock-frequency : maximal I2C bus clock frequency in Hz.
- energymicro,location : Decides the location of the USART I/O pins.
Allowed range : [0 .. 6]
Example:
i2c0: i2c@4000a000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "energymicro,efm32-i2c";
reg = <0x4000a000 0x400>;
interrupts = <9>;
clocks = <&cmu clk_HFPERCLKI2C0>;
clock-frequency = <100000>;
energymicro,location = <3>;
eeprom@50 {
compatible = "microchip,24c02";
reg = <0x50>;
pagesize = <16>;
};
};
......@@ -22,6 +22,8 @@ properties:
- adi,ad5767
output-range-microvolts:
$ref: /schemas/types.yaml#/definitions/int32-array
maxItems: 2
description: Select converter output range.
reg:
......
......@@ -6,7 +6,7 @@ Required properties:
- interrupts : interrupt specification for the ektf2127 interrupt
- power-gpios : GPIO specification for the pin connected to the
ektf2127's wake input. This needs to be driven high
to take ektf2127 out of it's low power state
to take ektf2127 out of its low power state
For additional optional properties see: touchscreen.txt
......
RDA Micro RDA8810PL Interrupt Controller
The interrupt controller in RDA8810PL SoC is a custom interrupt controller
which supports up to 32 interrupts.
Required properties:
- compatible: Should be "rda,8810pl-intc".
- reg: Specifies base physical address of the registers set.
- interrupt-controller: Identifies the node as an interrupt controller.
- #interrupt-cells: Specifies the number of cells needed to encode an
interrupt source. The value shall be 2.
The interrupt sources are as follows:
ID Name
------------
0: PULSE_DUMMY
1: I2C
2: NAND_NFSC
3: SDMMC1
4: SDMMC2
5: SDMMC3
6: SPI1
7: SPI2
8: SPI3
9: UART1
10: UART2
11: UART3
12: GPIO1
13: GPIO2
14: GPIO3
15: KEYPAD
16: TIMER
17: TIMEROS
18: COMREG0
19: COMREG1
20: USB
21: DMC
22: DMA
23: CAMERA
24: GOUDA
25: GPU
26: VPU_JPG
27: VPU_HOST
28: VOC
29: AUIFC0
30: AUIFC1
31: L2CC
Example:
apb@20800000 {
compatible = "simple-bus";
...
intc: interrupt-controller@0 {
compatible = "rda,8810pl-intc";
reg = <0x0 0x1000>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/rda,8810pl-intc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: RDA Micro RDA8810PL interrupt controller
maintainers:
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
allOf:
- $ref: /schemas/interrupt-controller.yaml#
properties:
compatible:
const: rda,8810pl-intc
reg:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':
const: 2
required:
- compatible
- reg
- interrupt-controller
- '#interrupt-cells'
additionalProperties: false
examples:
- |
intc: interrupt-controller@0 {
compatible = "rda,8810pl-intc";
reg = <0x0 0x1000>;
interrupt-controller;
#interrupt-cells = <2>;
};
...
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/leds/issi,is31fl319x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ISSI LED controllers bindings for IS31FL319{0,1,3,6,9}
maintainers:
- Vincent Knecht <vincent.knecht@mailoo.org>
description: |
The IS31FL319X are LED controllers with I2C interface.
Previously known as Si-En SN319{0,1,3,6,9}.
For more product information please see the links below:
https://lumissil.com/assets/pdf/core/IS31FL3190_DS.pdf
https://lumissil.com/assets/pdf/core/IS31FL3191_DS.pdf
https://lumissil.com/assets/pdf/core/IS31FL3193_DS.pdf
https://lumissil.com/assets/pdf/core/IS31FL3196_DS.pdf
https://lumissil.com/assets/pdf/core/IS31FL3199_DS.pdf
properties:
compatible:
enum:
- issi,is31fl3190
- issi,is31fl3191
- issi,is31fl3193
- issi,is31fl3196
- issi,is31fl3199
- si-en,sn3190
- si-en,sn3191
- si-en,sn3193
- si-en,sn3196
- si-en,sn3199
reg:
maxItems: 1
shutdown-gpios:
maxItems: 1
description: GPIO attached to the SDB pin.
audio-gain-db:
$ref: /schemas/types.yaml#/definitions/uint32
default: 0
description: Audio gain selection for external analog modulation input.
enum: [0, 3, 6, 9, 12, 15, 18, 21]
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^led@[1-9]$":
type: object
$ref: common.yaml#
properties:
reg:
description: Index of the LED.
minimum: 1
maximum: 9
led-max-microamp:
description:
Note that a driver will take the lowest of all LED limits
since the chip has a single global setting. The lowest value
will be chosen due to the PWM specificity, where lower
brightness is achieved by reducing the duty-cycle of pulses
and not the current, which will always have its peak value
equal to led-max-microamp.
allOf:
- if:
properties:
compatible:
contains:
enum:
- issi,is31fl3190
- issi,is31fl3191
- issi,is31fl3193
- si-en,sn3190
- si-en,sn3191
- si-en,sn3193
then:
properties:
reg:
enum: [0x68, 0x69, 0x6a, 0x6b]
audio-gain-db: false
patternProperties:
"^led@[1-9]$":
properties:
led-max-microamp:
default: 42000
enum: [5000, 10000, 17500, 30000, 42000]
else:
properties:
reg:
enum: [0x64, 0x65, 0x66, 0x67]
patternProperties:
"^led@[1-9]$":
properties:
led-max-microamp:
default: 20000
enum: [5000, 10000, 15000, 20000, 25000, 30000, 35000, 40000]
- if:
properties:
compatible:
contains:
enum:
- issi,is31fl3190
- issi,is31fl3191
- si-en,sn3190
- si-en,sn3191
then:
patternProperties:
"^led@[1-9]$":
properties:
reg:
maximum: 1
- if:
properties:
compatible:
contains:
enum:
- issi,is31fl3193
- si-en,sn3193
then:
patternProperties:
"^led@[1-9]$":
properties:
reg:
maximum: 3
- if:
properties:
compatible:
contains:
enum:
- issi,is31fl3196
- si-en,sn3196
then:
patternProperties:
"^led@[1-9]$":
properties:
reg:
maximum: 6
required:
- compatible
- reg
- "#address-cells"
- "#size-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
i2c0 {
#address-cells = <1>;
#size-cells = <0>;
led-controller@65 {
compatible = "issi,is31fl3196";
reg = <0x65>;
#address-cells = <1>;
#size-cells = <0>;
shutdown-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
led@1 {
reg = <1>;
label = "red:aux";
led-max-microamp = <10000>;
};
led@5 {
reg = <5>;
label = "green:power";
linux,default-trigger = "default-on";
};
};
};
...
* Skyworks Solutions, Inc. AAT1290 Current Regulator for Flash LEDs
The device is controlled through two pins: FL_EN and EN_SET. The pins when,
asserted high, enable flash strobe and movie mode (max 1/2 of flash current)
respectively. In order to add a capability of selecting the strobe signal source
(e.g. CPU or camera sensor) there is an additional switch required, independent
of the flash chip. The switch is controlled with pin control.
Required properties:
- compatible : Must be "skyworks,aat1290".
- flen-gpios : Must be device tree identifier of the flash device FL_EN pin.
- enset-gpios : Must be device tree identifier of the flash device EN_SET pin.
Optional properties:
- pinctrl-names : Must contain entries: "default", "host", "isp". Entries
"default" and "host" must refer to the same pin configuration
node, which sets the host as a strobe signal provider. Entry
"isp" must refer to the pin configuration node, which sets the
ISP as a strobe signal provider.
A discrete LED element connected to the device must be represented by a child
node - see Documentation/devicetree/bindings/leds/common.txt.
Required properties of the LED child node:
- led-max-microamp : see Documentation/devicetree/bindings/leds/common.txt
- flash-max-microamp : see Documentation/devicetree/bindings/leds/common.txt
Maximum flash LED supply current can be calculated using
following formula: I = 1A * 162kohm / Rset.
- flash-max-timeout-us : see Documentation/devicetree/bindings/leds/common.txt
Maximum flash timeout can be calculated using following
formula: T = 8.82 * 10^9 * Ct.
Optional properties of the LED child node:
- function : see Documentation/devicetree/bindings/leds/common.txt
- color : see Documentation/devicetree/bindings/leds/common.txt
- label : see Documentation/devicetree/bindings/leds/common.txt (deprecated)
Example (by Ct = 220nF, Rset = 160kohm and exynos4412-trats2 board with
a switch that allows for routing strobe signal either from the host or from
the camera sensor):
#include "exynos4412.dtsi"
#include <dt-bindings/leds/common.h>
led-controller {
compatible = "skyworks,aat1290";
flen-gpios = <&gpj1 1 GPIO_ACTIVE_HIGH>;
enset-gpios = <&gpj1 2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default", "host", "isp";
pinctrl-0 = <&camera_flash_host>;
pinctrl-1 = <&camera_flash_host>;
pinctrl-2 = <&camera_flash_isp>;
camera_flash: led {
function = LED_FUNCTION_FLASH;
color = <LED_COLOR_ID_WHITE>;
led-max-microamp = <520833>;
flash-max-microamp = <1012500>;
flash-max-timeout-us = <1940000>;
};
};
&pinctrl_0 {
camera_flash_host: camera-flash-host {
samsung,pins = "gpj1-0";
samsung,pin-function = <1>;
samsung,pin-val = <0>;
};
camera_flash_isp: camera-flash-isp {
samsung,pins = "gpj1-0";
samsung,pin-function = <1>;
samsung,pin-val = <1>;
};
};
LEDs connected to is31fl319x LED controller chip
Required properties:
- compatible : Should be any of
"issi,is31fl3190"
"issi,is31fl3191"
"issi,is31fl3193"
"issi,is31fl3196"
"issi,is31fl3199"
"si-en,sn3199".
- #address-cells: Must be 1.
- #size-cells: Must be 0.
- reg: 0x64, 0x65, 0x66, or 0x67.
Optional properties:
- audio-gain-db : audio gain selection for external analog modulation input.
Valid values: 0 - 21, step by 3 (rounded down)
Default: 0
- shutdown-gpios : Specifier of the GPIO connected to SDB pin of the chip.
Each led is represented as a sub-node of the issi,is31fl319x device.
There can be less leds subnodes than the chip can support but not more.
Required led sub-node properties:
- reg : number of LED line
Valid values: 1 - number of leds supported by the chip variant.
Optional led sub-node properties:
- label : see Documentation/devicetree/bindings/leds/common.txt.
- linux,default-trigger :
see Documentation/devicetree/bindings/leds/common.txt.
- led-max-microamp : (optional)
Valid values: 5000 - 40000, step by 5000 (rounded down)
Default: 20000 (20 mA)
Note: a driver will take the lowest of all led limits since the
chip has a single global setting. The lowest value will be chosen
due to the PWM specificity, where lower brightness is achieved
by reducing the dury-cycle of pulses and not the current, which
will always have its peak value equal to led-max-microamp.
Examples:
fancy_leds: leds@65 {
compatible = "issi,is31fl3196";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x65>;
shutdown-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
red_aux: led@1 {
label = "red:aux";
reg = <1>;
led-max-microamp = <10000>;
};
green_power: led@5 {
label = "green:power";
reg = <5>;
linux,default-trigger = "default-on";
};
};
......@@ -99,35 +99,41 @@ examples:
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_CHARGING;
led-0 {
led@0 {
reg = <0x0>;
color = <LED_COLOR_ID_RED>;
};
led-1 {
led@1 {
reg = <0x1>;
color = <LED_COLOR_ID_GREEN>;
};
led-2 {
led@2 {
reg = <0x2>;
color = <LED_COLOR_ID_BLUE>;
};
};
multi-led@2 {
multi-led@3 {
#address-cells = <1>;
#size-cells = <2>;
reg = <0x2 0x3 0x5>;
#size-cells = <0>;
reg = <0x3>, <0x4>, <0x5>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_STANDBY;
led-6 {
led@3 {
reg = <0x3>;
color = <LED_COLOR_ID_RED>;
};
led-7 {
led@4 {
reg = <0x4>;
color = <LED_COLOR_ID_GREEN>;
};
led-8 {
led@5 {
reg = <0x5>;
color = <LED_COLOR_ID_BLUE>;
};
};
......
......@@ -17,6 +17,7 @@ description: >
properties:
compatible:
enum:
- qcom,pm660l-lpg
- qcom,pm8150b-lpg
- qcom,pm8150l-lpg
- qcom,pm8350c-pwm
......
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/leds/skyworks,aat1290.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Skyworks Solutions, Inc. AAT1290 Current Regulator for Flash LEDs
maintainers:
- Jacek Anaszewski <jacek.anaszewski@gmail.com>
- Krzysztof Kozlowski <krzk@kernel.org>
description: |
The device is controlled through two pins:: FL_EN and EN_SET. The pins when,
asserted high, enable flash strobe and movie mode (max 1/2 of flash current)
respectively. In order to add a capability of selecting the strobe signal
source (e.g. CPU or camera sensor) there is an additional switch required,
independent of the flash chip. The switch is controlled with pin control.
properties:
compatible:
const: skyworks,aat1290
enset-gpios:
maxItems: 1
description: EN_SET pin
flen-gpios:
maxItems: 1
description: FL_EN pin
led:
$ref: common.yaml#
unevaluatedProperties: false
properties:
led-max-microamp: true
flash-max-microamp:
description: |
Maximum flash LED supply current can be calculated using following
formula:: I = 1A * 162 kOhm / Rset.
flash-max-timeout-us:
description: |
Maximum flash timeout can be calculated using following formula::
T = 8.82 * 10^9 * Ct.
required:
- flash-max-microamp
- flash-max-timeout-us
- led-max-microamp
pinctrl-names:
items:
- const: default
- const: host
- const: isp
pinctrl-0: true
pinctrl-1: true
pinctrl-2: true
required:
- compatible
- enset-gpios
- flen-gpios
- led
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
// Ct = 220 nF, Rset = 160 kOhm
led-controller {
compatible = "skyworks,aat1290";
flen-gpios = <&gpj1 1 GPIO_ACTIVE_HIGH>;
enset-gpios = <&gpj1 2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default", "host", "isp";
pinctrl-0 = <&camera_flash_host>;
pinctrl-1 = <&camera_flash_host>;
pinctrl-2 = <&camera_flash_isp>;
led {
function = LED_FUNCTION_FLASH;
color = <LED_COLOR_ID_WHITE>;
led-max-microamp = <520833>;
flash-max-microamp = <1012500>;
flash-max-timeout-us = <1940000>;
};
};
Device-Tree bindings for GPIO IR receiver
Required properties:
- compatible: should be "gpio-ir-receiver".
- gpios: specifies GPIO used for IR signal reception.
Optional properties:
- linux,rc-map-name: see rc.txt file in the same
directory.
- linux,autosuspend-period: autosuspend delay time,
the unit is milisecond.
Example node:
ir: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio0 19 1>;
linux,rc-map-name = "rc-rc6-mce";
linux,autosuspend-period = <125>;
};
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/gpio-ir-receiver.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: GPIO Based IR receiver
maintainers:
- Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
allOf:
- $ref: rc.yaml#
properties:
compatible:
const: gpio-ir-receiver
gpios:
maxItems: 1
linux,autosuspend-period:
description: autosuspend delay time in milliseconds
$ref: /schemas/types.yaml#/definitions/uint32
required:
- compatible
- gpios
unevaluatedProperties: false
examples:
- |
ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio0 19 1>;
linux,rc-map-name = "rc-rc6-mce";
linux,autosuspend-period = <125>;
};
...
......@@ -12,7 +12,7 @@ maintainers:
properties:
$nodename:
pattern: "^ir(@[a-f0-9]+)?$"
pattern: "^ir(-receiver)?(@[a-f0-9]+)?$"
linux,rc-map-name:
description:
......
......@@ -74,7 +74,7 @@ properties:
rohm,enable-hidden-gpo:
description: |
The BD71815 has undocumented GPO at pin E5. Pin is marked as GND at the
data-sheet as it's location in the middle of GND pins makes it hard to
data-sheet as its location in the middle of GND pins makes it hard to
use on PCB. If your board has managed to use this pin you can enable the
second GPO by defining this property. Dont enable this if you are unsure
about how the E5 pin is connected on your board.
......
......@@ -2,7 +2,7 @@ Lantiq XWAY SoC RCU binding
===========================
This binding describes the RCU (reset controller unit) multifunction device,
where each sub-device has it's own set of registers.
where each sub-device has its own set of registers.
The RCU register range is used for multiple purposes. Mostly one device
uses one or multiple register exclusively, but for some registers some
......
......@@ -22,13 +22,14 @@ properties:
reg:
maxItems: 1
spi-max-frequency: true
required:
- compatible
- reg
additionalProperties: false
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
......
ARM AFS - ARM Firmware Suite Partitions
=======================================
The ARM Firmware Suite is a flash partitioning system found on the
ARM reference designs: Integrator AP, Integrator CP, Versatile AB,
Versatile PB, the RealView family, Versatile Express and Juno.
Required properties:
- compatible : (required) must be "arm,arm-firmware-suite"
Example:
flash@0 {
partitions {
compatible = "arm,arm-firmware-suite";
};
};
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/partitions/arm,arm-firmware-suite.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Firmware Suite (AFS) Partitions
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description: |
The ARM Firmware Suite is a flash partitioning system found on the
ARM reference designs: Integrator AP, Integrator CP, Versatile AB,
Versatile PB, the RealView family, Versatile Express and Juno.
properties:
compatible:
const: arm,arm-firmware-suite
additionalProperties: false
examples:
- |
partitions {
compatible = "arm,arm-firmware-suite";
};
...
......@@ -15,7 +15,7 @@ Required properties:
"rx_desc": MSGDMA Rx dispatcher descriptor space region
"rx_resp": MSGDMA Rx dispatcher response space region
"s1": SGDMA descriptor memory
- interrupts: Should contain the TSE interrupts and it's mode.
- interrupts: Should contain the TSE interrupts and its mode.
- interrupt-names: Should contain the interrupt names
"rx_irq": xDMA Rx dispatcher interrupt
"tx_irq": xDMA Tx dispatcher interrupt
......
......@@ -20,7 +20,7 @@ Required properties:
- active_slave : Specifies the slave to use for time stamping,
ethtool and SIOCGMIIPHY
- cpsw-phy-sel : Specifies the phandle to the CPSW phy mode selection
device. See also cpsw-phy-sel.txt for it's binding.
device. See also cpsw-phy-sel.txt for its binding.
Note that in legacy cases cpsw-phy-sel may be
a child device instead of a phandle
(DEPRECATED, use phys property instead).
......
* ARC EMAC 10/100 Ethernet platform driver for Rockchip RK3036/RK3066/RK3188 SoCs
Required properties:
- compatible: should be "rockchip,<name>-emac"
"rockchip,rk3036-emac": found on RK3036 SoCs
"rockchip,rk3066-emac": found on RK3066 SoCs
"rockchip,rk3188-emac": found on RK3188 SoCs
- reg: Address and length of the register set for the device
- interrupts: Should contain the EMAC interrupts
- rockchip,grf: phandle to the syscon grf used to control speed and mode
for emac.
- phy: see ethernet.txt file in the same directory.
- phy-mode: see ethernet.txt file in the same directory.
Optional properties:
- phy-supply: phandle to a regulator if the PHY needs one
Clock handling:
- clocks: Must contain an entry for each entry in clock-names.
- clock-names: Shall be "hclk" for the host clock needed to calculate and set
polling period of EMAC and "macref" for the reference clock needed to transfer
data to and from the phy.
Child nodes of the driver are the individual PHY devices connected to the
MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.
Examples:
ethernet@10204000 {
compatible = "rockchip,rk3188-emac";
reg = <0xc0fc2000 0x3c>;
interrupts = <6>;
mac-address = [ 00 11 22 33 44 55 ];
clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
clock-names = "hclk", "macref";
pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
rockchip,grf = <&grf>;
phy = <&phy0>;
phy-mode = "rmii";
phy-supply = <&vcc_rmii>;
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <1>;
};
};
......@@ -7,7 +7,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP Semiconductors NCI NFC controller
maintainers:
- Charles Gorand <charles.gorand@effinnov.com>
- Krzysztof Kozlowski <krzk@kernel.org>
properties:
......
......@@ -14,7 +14,7 @@ MAC node:
- mac-address : The 6-byte MAC address. If present, it is the default
MAC address.
- internal-phy : phandle to the internal PHY node
- phy-handle : phandle the the external PHY node
- phy-handle : phandle the external PHY node
Internal PHY node:
- compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/rockchip,emac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip RK3036/RK3066/RK3188 Ethernet Media Access Controller (EMAC)
maintainers:
- Heiko Stuebner <heiko@sntech.de>
properties:
compatible:
enum:
- rockchip,rk3036-emac
- rockchip,rk3066-emac
- rockchip,rk3188-emac
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
minItems: 2
items:
- description: host clock
- description: reference clock
- description: mac TX/RX clock
clock-names:
minItems: 2
items:
- const: hclk
- const: macref
- const: macclk
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to the syscon GRF used to control speed and mode for the EMAC.
phy-supply:
description:
Phandle to a regulator if the PHY needs one.
mdio:
$ref: mdio.yaml#
unevaluatedProperties: false
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- rockchip,grf
- phy
- phy-mode
- mdio
allOf:
- $ref: "ethernet-controller.yaml#"
- if:
properties:
compatible:
contains:
const: rockchip,rk3036-emac
then:
properties:
clocks:
minItems: 3
clock-names:
minItems: 3
else:
properties:
clocks:
maxItems: 2
clock-names:
maxItems: 2
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/rk3188-cru-common.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
ethernet@10204000 {
compatible = "rockchip,rk3188-emac";
reg = <0xc0fc2000 0x3c>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
clock-names = "hclk", "macref";
rockchip,grf = <&grf>;
pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
pinctrl-names = "default";
phy = <&phy0>;
phy-mode = "rmii";
phy-supply = <&vcc_rmii>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <1>;
};
};
};
......@@ -144,6 +144,7 @@ properties:
description: If present then the reset sequence using the GPIO
specified in the "reset-gpio" property is reversed (H=reset state,
L=operation state) (optional required).
type: boolean
vpcie-supply:
description: Should specify the regulator in charge of PCIe port power.
......
......@@ -106,6 +106,9 @@ properties:
maxItems: 3
dma-coherent: true
iommu-map: true
iommu-map-mask: true
msi-parent: true
required:
- compatible
......
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/perf/arm,ccn.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM CCN (Cache Coherent Network) Performance Monitors
maintainers:
- Robin Murphy <robin.murphy@arm.com>
properties:
compatible:
enum:
- arm,ccn-502
- arm,ccn-504
- arm,ccn-508
- arm,ccn-512
reg:
maxItems: 1
interrupts:
maxItems: 1
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
ccn@20000000 {
compatible = "arm,ccn-504";
reg = <0x20000000 0x1000000>;
interrupts = <0 181 4>;
};
...
* ARM CCN (Cache Coherent Network)
Required properties:
- compatible: (standard compatible string) should be one of:
"arm,ccn-502"
"arm,ccn-504"
"arm,ccn-508"
"arm,ccn-512"
- reg: (standard registers property) physical address and size
(16MB) of the configuration registers block
- interrupts: (standard interrupt property) single interrupt
generated by the control block
Example:
ccn@2000000000 {
compatible = "arm,ccn-504";
reg = <0x20 0x00000000 0 0x1000000>;
interrupts = <0 181 4>;
};
......@@ -16,7 +16,7 @@ description: |+
- compatible: Should be the following:
"amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -16,7 +16,7 @@ description: |+
- compatible: Should be one of the following:
"aspeed,ast2400-scu", "syscon", "simple-mfd"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -17,7 +17,7 @@ description: |+
"aspeed,ast2500-scu", "syscon", "simple-mfd"
"aspeed,g5-scu", "syscon", "simple-mfd"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -16,7 +16,7 @@ description: |+
- compatible: Should be one of the following:
"aspeed,ast2600-scu", "syscon", "simple-mfd"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -2,8 +2,8 @@
# Copyright 2019 BayLibre, SAS
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/amlogic,meson-ee-pwrc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/amlogic,meson-ee-pwrc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson Everything-Else Power Domains
......@@ -17,7 +17,7 @@ description: |+
- compatible: Should be the following:
"amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -3,8 +3,8 @@
# Author: Jianxin Pan <jianxin.pan@amlogic.com>
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson Secure Power Domains
......
......@@ -10,7 +10,7 @@ maintainers:
- Hector Martin <marcan@marcan.st>
allOf:
- $ref: "power-domain.yaml#"
- $ref: power-domain.yaml#
description: |
Apple SoCs include PMGR blocks responsible for power management,
......
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/brcm,bcm63xx-power.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/brcm,bcm63xx-power.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: BCM63xx power domain driver
......
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/renesas,apmu.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/renesas,apmu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas Advanced Power Management Unit
......
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/renesas,rcar-sysc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/renesas,rcar-sysc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas R-Car and RZ/G System Controller
......
......@@ -30,11 +30,15 @@ properties:
pwrkey:
type: object
$ref: "../../input/qcom,pm8941-pwrkey.yaml#"
$ref: /schemas/input/qcom,pm8941-pwrkey.yaml#
resin:
type: object
$ref: "../../input/qcom,pm8941-pwrkey.yaml#"
$ref: /schemas/input/qcom,pm8941-pwrkey.yaml#
watchdog:
type: object
$ref: /schemas/watchdog/qcom,pm8916-wdt.yaml
required:
- compatible
......
......@@ -16,7 +16,7 @@ description: |
properties:
compatible:
const: "regulator-poweroff"
const: regulator-poweroff
cpu-supply:
description:
......
......@@ -15,7 +15,7 @@ description: |
properties:
compatible:
const: "xlnx,zynqmp-power"
const: xlnx,zynqmp-power
interrupts:
maxItems: 1
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/active-semi,act8945a-charger.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/active-semi,act8945a-charger.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Active-semi ACT8945A Charger Function
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2021 Sebastian Reichel
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/bq2415x.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/bq2415x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Binding for TI bq2415x Li-Ion Charger
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2021 Sebastian Reichel
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/bq24190.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/bq24190.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Binding for TI BQ2419x Li-Ion Battery Charger
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2021 Sebastian Reichel
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/bq24257.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/bq24257.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Binding for bq24250, bq24251 and bq24257 Li-Ion Charger
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2021 Sebastian Reichel
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/bq24735.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/bq24735.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Binding for TI BQ24735 Li-Ion Battery Charger
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2020 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/bq2515x.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/bq2515x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI bq2515x 500-mA Linear charger family
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2020 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/bq256xx.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/bq256xx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI bq256xx Switch Mode Buck Charger
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2021 Sebastian Reichel
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/bq25890.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/bq25890.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Binding for bq25890, bq25892, bq25895 and bq25896 Li-Ion Charger
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2020 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/bq25980.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/bq25980.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI BQ25980 Flash Charger
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2020 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/bq27xxx.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/bq27xxx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI BQ27XXX fuel gauge family
......
......@@ -50,6 +50,7 @@ properties:
cm-battery-stat:
description: battery status
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0 # battery always present
- 1 # no battery
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2021 Sebastian Reichel
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/cpcap-battery.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/cpcap-battery.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Motorola CPCAP PMIC battery
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2021 Sebastian Reichel
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/cpcap-charger.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/cpcap-charger.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Motorola CPCAP PMIC charger
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/dlg,da9150-charger.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/dlg,da9150-charger.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Dialog Semiconductor DA9150 Charger Power Supply bindings
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/dlg,da9150-fuel-gauge.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/dlg,da9150-fuel-gauge.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Dialog Semiconductor DA9150 Fuel-Gauge Power Supply bindings
......
......@@ -2,8 +2,8 @@
# Copyright 2019-2020 Artur Rojek
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/ingenic,battery.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/ingenic,battery.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ingenic JZ47xx battery bindings
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2021 Sebastian Reichel
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/isp1704.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/isp1704.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Binding for NXP ISP1704 USB Charger Detection
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/lego,ev3-battery.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/lego,ev3-battery.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LEGO MINDSTORMS EV3 Battery
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/lltc,lt3651-charger.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/lltc,lt3651-charger.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices LT3651 Charger Power Supply bindings
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/lltc,ltc294x.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/lltc,ltc294x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Binding for LTC2941, LTC2942, LTC2943 and LTC2944 battery fuel gauges
......
......@@ -2,8 +2,8 @@
# Copyright (C) 2020 Topic Embedded Products
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/ltc4162-l.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/ltc4162-l.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Linear Technology (Analog Devices) LTC4162-L Charger
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/maxim,ds2760.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/maxim,ds2760.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Maxim DS2760 DT bindings
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/maxim,max14656.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/maxim,max14656.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Maxim MAX14656 DT bindings
......
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/supply/maxim,max17040.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/power/supply/maxim,max17040.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Maxim 17040 fuel gauge series
......
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