Commit db0a091b authored by Anusha Srivatsa's avatar Anusha Srivatsa Committed by Jani Nikula

drm/i915/guc: Make the GuC fw loading helper functions general

Rename some of the GuC fw loading code to make them more general. We
will utilise them for HuC loading as well.
     s/intel_guc_fw/intel_uc_fw/g
     s/GUC_FIRMWARE/INTEL_UC_FIRMWARE/g

Struct intel_guc_fw is renamed to intel_uc_fw. Prefix of tts members,
such as 'guc' or 'guc_fw' either is renamed to 'uc' or removed for
same purpose.

v2: rebased on top of nightly.
    reapplied the search/replace as upstream code as changed.
v3: removed G from messages in shared fw fetch function.
v4: rebased.Updated dev to dev_priv in intel_guc_setup(), guc_fw_getch()
and intel_guc_init().
v5: rebased. Remove uint32_t fw_type to patch 2. Add INTEL_ prefix for
fields in enum intel_uc_fw_status. Remove uc_dev field since its never
used.Rename uc_fw to just fw and guc_fw to fw to avoid redundency.
v6: rebased. Remove sections of code that were commented and no longer
required.
v7: rebased. Remove uc_fw_ prefix from path and obj fields
in intel_uc_fw struct as suggested by Michal.
v8: rebased. Add declaration of intel_guc_wopcm_size() in
this patch instead of patch 3.

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Signed-off-by: default avatarAnusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: default avatarAlex Dai <yu.dai@intel.com>
Signed-off-by: default avatarPeter Antoine <peter.antoine@intel.com>
Reviewed-by: default avatarArkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1484356631-16139-2-git-send-email-anusha.srivatsa@intel.com
parent f9cda048
...@@ -2355,7 +2355,7 @@ static int i915_llc(struct seq_file *m, void *data) ...@@ -2355,7 +2355,7 @@ static int i915_llc(struct seq_file *m, void *data)
static int i915_guc_load_status_info(struct seq_file *m, void *data) static int i915_guc_load_status_info(struct seq_file *m, void *data)
{ {
struct drm_i915_private *dev_priv = node_to_i915(m->private); struct drm_i915_private *dev_priv = node_to_i915(m->private);
struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw; struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
u32 tmp, i; u32 tmp, i;
if (!HAS_GUC_UCODE(dev_priv)) if (!HAS_GUC_UCODE(dev_priv))
...@@ -2363,15 +2363,15 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data) ...@@ -2363,15 +2363,15 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data)
seq_printf(m, "GuC firmware status:\n"); seq_printf(m, "GuC firmware status:\n");
seq_printf(m, "\tpath: %s\n", seq_printf(m, "\tpath: %s\n",
guc_fw->guc_fw_path); guc_fw->path);
seq_printf(m, "\tfetch: %s\n", seq_printf(m, "\tfetch: %s\n",
intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status)); intel_uc_fw_status_repr(guc_fw->fetch_status));
seq_printf(m, "\tload: %s\n", seq_printf(m, "\tload: %s\n",
intel_guc_fw_status_repr(guc_fw->guc_fw_load_status)); intel_uc_fw_status_repr(guc_fw->load_status));
seq_printf(m, "\tversion wanted: %d.%d\n", seq_printf(m, "\tversion wanted: %d.%d\n",
guc_fw->guc_fw_major_wanted, guc_fw->guc_fw_minor_wanted); guc_fw->major_ver_wanted, guc_fw->minor_ver_wanted);
seq_printf(m, "\tversion found: %d.%d\n", seq_printf(m, "\tversion found: %d.%d\n",
guc_fw->guc_fw_major_found, guc_fw->guc_fw_minor_found); guc_fw->major_ver_found, guc_fw->minor_ver_found);
seq_printf(m, "\theader: offset is %d; size = %d\n", seq_printf(m, "\theader: offset is %d; size = %d\n",
guc_fw->header_offset, guc_fw->header_size); guc_fw->header_offset, guc_fw->header_size);
seq_printf(m, "\tuCode: offset is %d; size = %d\n", seq_printf(m, "\tuCode: offset is %d; size = %d\n",
......
...@@ -998,7 +998,7 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) ...@@ -998,7 +998,7 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv)
struct i915_gem_context *ctx; struct i915_gem_context *ctx;
u32 data[3]; u32 data[3];
if (guc->guc_fw.guc_fw_load_status != GUC_FIRMWARE_SUCCESS) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
return 0; return 0;
gen9_disable_guc_interrupts(dev_priv); gen9_disable_guc_interrupts(dev_priv);
...@@ -1025,7 +1025,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) ...@@ -1025,7 +1025,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv)
struct i915_gem_context *ctx; struct i915_gem_context *ctx;
u32 data[3]; u32 data[3];
if (guc->guc_fw.guc_fw_load_status != GUC_FIRMWARE_SUCCESS) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
return 0; return 0;
if (i915.guc_log_level >= 0) if (i915.guc_log_level >= 0)
......
This diff is collapsed.
...@@ -93,28 +93,28 @@ struct i915_guc_client { ...@@ -93,28 +93,28 @@ struct i915_guc_client {
uint64_t submissions[I915_NUM_ENGINES]; uint64_t submissions[I915_NUM_ENGINES];
}; };
enum intel_guc_fw_status { enum intel_uc_fw_status {
GUC_FIRMWARE_FAIL = -1, INTEL_UC_FIRMWARE_FAIL = -1,
GUC_FIRMWARE_NONE = 0, INTEL_UC_FIRMWARE_NONE = 0,
GUC_FIRMWARE_PENDING, INTEL_UC_FIRMWARE_PENDING,
GUC_FIRMWARE_SUCCESS INTEL_UC_FIRMWARE_SUCCESS
}; };
/* /*
* This structure encapsulates all the data needed during the process * This structure encapsulates all the data needed during the process
* of fetching, caching, and loading the firmware image into the GuC. * of fetching, caching, and loading the firmware image into the GuC.
*/ */
struct intel_guc_fw { struct intel_uc_fw {
const char * guc_fw_path; const char *path;
size_t guc_fw_size; size_t size;
struct drm_i915_gem_object * guc_fw_obj; struct drm_i915_gem_object *obj;
enum intel_guc_fw_status guc_fw_fetch_status; enum intel_uc_fw_status fetch_status;
enum intel_guc_fw_status guc_fw_load_status; enum intel_uc_fw_status load_status;
uint16_t guc_fw_major_wanted; uint16_t major_ver_wanted;
uint16_t guc_fw_minor_wanted; uint16_t minor_ver_wanted;
uint16_t guc_fw_major_found; uint16_t major_ver_found;
uint16_t guc_fw_minor_found; uint16_t minor_ver_found;
uint32_t header_size; uint32_t header_size;
uint32_t header_offset; uint32_t header_offset;
...@@ -141,7 +141,7 @@ struct intel_guc_log { ...@@ -141,7 +141,7 @@ struct intel_guc_log {
}; };
struct intel_guc { struct intel_guc {
struct intel_guc_fw guc_fw; struct intel_uc_fw fw;
struct intel_guc_log log; struct intel_guc_log log;
/* intel_guc_recv interrupt related state */ /* intel_guc_recv interrupt related state */
...@@ -179,9 +179,10 @@ int intel_guc_sample_forcewake(struct intel_guc *guc); ...@@ -179,9 +179,10 @@ int intel_guc_sample_forcewake(struct intel_guc *guc);
extern void intel_guc_init(struct drm_i915_private *dev_priv); extern void intel_guc_init(struct drm_i915_private *dev_priv);
extern int intel_guc_setup(struct drm_i915_private *dev_priv); extern int intel_guc_setup(struct drm_i915_private *dev_priv);
extern void intel_guc_fini(struct drm_i915_private *dev_priv); extern void intel_guc_fini(struct drm_i915_private *dev_priv);
extern const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status); extern const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status);
extern int intel_guc_suspend(struct drm_i915_private *dev_priv); extern int intel_guc_suspend(struct drm_i915_private *dev_priv);
extern int intel_guc_resume(struct drm_i915_private *dev_priv); extern int intel_guc_resume(struct drm_i915_private *dev_priv);
u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
/* i915_guc_submission.c */ /* i915_guc_submission.c */
int i915_guc_submission_init(struct drm_i915_private *dev_priv); int i915_guc_submission_init(struct drm_i915_private *dev_priv);
......
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