Commit dc3a0e5b authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman

powerpc/book3e: Activate KUEP at all time

On book3e,
- When using 64 bits PTE: User pages don't have the SX bit defined
so KUEP is always active.
- When using 32 bits PTE: Implement KUEP by clearing SX bit during
TLB miss for user pages. The impact is minimal and worth neither
boot time nor build time selection.

Activate it at all time.
Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/e376b114283fb94504e2aa2de846780063252cde.1634627931.git.christophe.leroy@csgroup.eu
parent ee263160
...@@ -777,6 +777,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS) ...@@ -777,6 +777,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS)
andi. r10, r11, _PAGE_USER /* Test for _PAGE_USER */ andi. r10, r11, _PAGE_USER /* Test for _PAGE_USER */
slwi r10, r12, 1 slwi r10, r12, 1
or r10, r10, r12 or r10, r10, r12
rlwinm r10, r10, 0, ~_PAGE_EXEC /* Clear SX on user pages */
iseleq r12, r12, r10 iseleq r12, r12, r10
rlwimi r13, r12, 0, 20, 31 /* Get RPN from PTE, merge w/ perms */ rlwimi r13, r12, 0, 20, 31 /* Get RPN from PTE, merge w/ perms */
mtspr SPRN_MAS3, r13 mtspr SPRN_MAS3, r13
......
...@@ -299,6 +299,8 @@ config PPC_FSL_BOOK3E ...@@ -299,6 +299,8 @@ config PPC_FSL_BOOK3E
select FSL_EMB_PERFMON select FSL_EMB_PERFMON
select PPC_SMP_MUXED_IPI select PPC_SMP_MUXED_IPI
select PPC_DOORBELL select PPC_DOORBELL
select PPC_HAVE_KUEP
select PPC_KUEP
default y if FSL_BOOKE default y if FSL_BOOKE
config PTE_64BIT config PTE_64BIT
......
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