Commit dd29c727 authored by Lennert Buytenhek's avatar Lennert Buytenhek Committed by Russell King

[ARM] 3257/1: ixp2000: map in scratch and sram

Patch from Lennert Buytenhek

For the ixp2000 netdev driver, we need to map in a chunk of SRAM (to
store the transmit and receive descriptors) and the scratch get/put
area (so that we can use the scratchpad rings in the cpu for managing
the descriptors.)  These are the final two mappings needed for the
netdev driver and the last missing piece for the driver in mainline
to work.
Signed-off-by: default avatarLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 43ecb9a3
...@@ -105,6 +105,16 @@ static struct map_desc ixp2000_io_desc[] __initdata = { ...@@ -105,6 +105,16 @@ static struct map_desc ixp2000_io_desc[] __initdata = {
.pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE),
.length = IXP2000_MSF_SIZE, .length = IXP2000_MSF_SIZE,
.type = MT_IXP2000_DEVICE, .type = MT_IXP2000_DEVICE,
}, {
.virtual = IXP2000_SCRATCH_RING_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE),
.length = IXP2000_SCRATCH_RING_SIZE,
.type = MT_IXP2000_DEVICE,
}, {
.virtual = IXP2000_SRAM0_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE),
.length = IXP2000_SRAM0_SIZE,
.type = MT_IXP2000_DEVICE,
}, { }, {
.virtual = IXP2000_PCI_IO_VIRT_BASE, .virtual = IXP2000_PCI_IO_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),
......
...@@ -26,6 +26,8 @@ ...@@ -26,6 +26,8 @@
* fc000000 da000000 16M PCI CFG0 * fc000000 da000000 16M PCI CFG0
* fd000000 d8000000 16M PCI I/O * fd000000 d8000000 16M PCI I/O
* fe[0-7]00000 8M per-platform mappings * fe[0-7]00000 8M per-platform mappings
* fe900000 80000000 1M SRAM #0 (first MB)
* fea00000 cb400000 1M SCRATCH ring get/put
* feb00000 c8000000 1M MSF * feb00000 c8000000 1M MSF
* fec00000 df000000 1M PCI CSRs * fec00000 df000000 1M PCI CSRs
* fed00000 de000000 1M PCI CREG * fed00000 de000000 1M PCI CREG
...@@ -91,6 +93,14 @@ ...@@ -91,6 +93,14 @@
#define IXP2000_MSF_VIRT_BASE 0xfeb00000 #define IXP2000_MSF_VIRT_BASE 0xfeb00000
#define IXP2000_MSF_SIZE 0x00100000 #define IXP2000_MSF_SIZE 0x00100000
#define IXP2000_SCRATCH_RING_PHYS_BASE 0xcb400000
#define IXP2000_SCRATCH_RING_VIRT_BASE 0xfea00000
#define IXP2000_SCRATCH_RING_SIZE 0x00100000
#define IXP2000_SRAM0_PHYS_BASE 0x80000000
#define IXP2000_SRAM0_VIRT_BASE 0xfe900000
#define IXP2000_SRAM0_SIZE 0x00100000
#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 #define IXP2000_PCI_IO_PHYS_BASE 0xd8000000
#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 #define IXP2000_PCI_IO_VIRT_BASE 0xfd000000
#define IXP2000_PCI_IO_SIZE 0x01000000 #define IXP2000_PCI_IO_SIZE 0x01000000
......
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